Power MOFET IRFL11N50, ihfl11n50 PRODUCT UMMRY V D (V) 500 R D(on) ( ) V G = 10 V 0.55 Q g (Max.) (nc) 51 Q gs (nc) 12 Q gd (nc) 23 Configuration ingle I 2 PK (TO262) G D FETURE Dynamic dv/dt Rating Repetitive valanche Rated Fast witching Ease of Paralleling imple Drive Requirements Compliant to RoH Directive 2002/95/EC DECRIPTION Third generation Power MOFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low onresistance and costeffectiveness. D G ORDERING INFORMTION Package Lead (Pb)free NChannel MOFET I 2 PK (TO262) IRFL11N50PbF ihfl11n50e3 BOLUTE MXIMUM RTING (T C = 25 C, unless otherwise noted) PRMETER YMBOL LIMIT UNIT Drainource Voltage V D 500 V Gateource Voltage V G ± 30 Continuous Drain Current V G at 10 V T C = 25 C 11 I D T C = 100 C 7.0 Pulsed Drain Current a I DM 44 Linear Derating Factor 1.3 W/ C ingle Pulse valanche Energy b E 390 mj Repetitive valanche Current a I R 11 Repetitive valanche Energy a E R 19 mj Maximum Power Dissipation T C = 25 C P D 190 W Peak Diode Recovery dv/dt c dv/dt 4.1 V/ns Operating Junction and torage Temperature Range T J, T stg 55 to 175 oldering Recommendations (Peak Temperature) for 10 s 300 d C Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. tarting T J = 25 C, L = 6.4 mh, R G = 25, I = 11 (see fig. 12). c. I D 11, di/dt 185 /μs, V DD V D, T J 175 C. d. 1.6 mm from case. * Pb containing terminations are not RoH compliant, exemptions may apply Document Number: 91288 www.vishay.com 111054Rev. B, 30May11 1
IRFL11N50, ihfl11n50 THERML REITNCE RTING PRMETER YMBOL TYP. MX. UNIT Maximum Junctiontombient R thj 40 C/W Maximum JunctiontoCase (Drain) R thjc 0.75 PECIFICTION (T J = 25 C, unless otherwise noted) PRMETER YMBOL TET CONDITION MIN. TYP. MX. UNIT tatic Drainource Breakdown Voltage V D V G = 0, I D = 250 μ 500 V V D Temperature Coefficient V D /T J Reference to 25 C, I D = 1 m 0.57 V/ C Gateource Threshold Voltage V G(th) V D = V G, I D = 250 μ 2.0 4.0 V Gateource Leakage I G V G = ± 30 V ± 100 n V D = 500 V, V G = 0 V 25 Zero Gate Voltage Drain Current I D V D = 400 V, V G = 0 V, T J = 150 C 250 μ Drainource Ontate Resistance R D(on) V G = 10 V I D = 6.6 b 0.55 Forward Transconductance g fs V D = 50 V, I D = 6.6 b 6.0 Dynamic Input Capacitance C iss V G = 0 V 1426 Output Capacitance C oss V D = 25 V 208 f = 1.0 MHz, see fig. 5 Reverse Transfer Capacitance C rss 9.6 pf V D = 1.0 V, f = 1.0 MHz 1954 Output Capacitance C oss V G = 0 V V D = 400 V, f = 1.0 MHz 53 Effective Output Capacitance C oss eff. V D = 0 V to 400 V c 110 Total Gate Charge Q g 51 Gateource Charge Q gs I V G = 10 V D = 11, V D = 400 V see fig. 6 and 13 b 12 nc GateDrain Charge Q gd 23 TurnOn Delay Time t d(on) 14 Rise Time t r V DD = 250 V, I D = 11 34 TurnOff Delay Time t d(off) R G = 9.1, R D = 22, see fig. 10 b 32 ns Fall Time t f 27 Between lead, D Internal Drain Inductance L D 4.5 6 mm (0.25") from package and center of nh G Internal ource Inductance L die contact 7.5 Drainource Body Diode Characteristics Continuous ourcedrain Diode Current I MOFET symbol D 11 showing the integral reverse Pulsed Diode Forward Current a G I M p n junction diode 44 Body Diode Voltage V D T J = 25 C, I = 11, V G = 0 V b 1.5 V Body Diode Reverse t rr 530 790 ns Recovery Time T J = 25 C, I F = 11, di/dt = 100 /μs b Body Diode Reverse Recovery Charge Q rr 3.4 5.1 μc Forward TurnOn Time t on Intrinsic turnon time is negligible (turnon is dominated by L and L D ) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 μs; duty cycle 2 %. c. C oss eff. is a fixed capacitance that gives the same charging time as C oss while V D is rising from 0 % to 80% V D. www.vishay.com Document Number: 91288 2 111054Rev. B, 30May11
IRFL11N50, ihfl11n50 TYPICL CHRCTERITIC (25 C, unless otherwise noted) Fig. 1 Typical Output Characteristics Fig. 3 Typical Transfer Characteristics Fig. 2 Typical Output Characteristics Fig. 4 Normalized OnResistance vs. Temperature Document Number: 91288 www.vishay.com 111054Rev. B, 30May11 3
IRFL11N50, ihfl11n50 Fig. 5 Typical Capacitance vs. Draintoource Voltage Fig. 7 Typical ourcedrain Diode Forward Voltage Fig. 6 Typical Gate Charge vs. Gatetoource Voltage Fig. 8 Maximum afe Operating rea www.vishay.com Document Number: 91288 4 111054Rev. B, 30May11
IRFL11N50, ihfl11n50 V D R D R G V G D.U.T. V DD 10 V Pulse width 1 µs Duty factor 0.1 % Fig. 10a witching Time Test Circuit V D 90 % 10 % V G t d(on) t r t d(off) t f Fig. 9 Maximum Drain Current vs. Case Temperature Fig. 10b witching Time Waveforms Fig. 11 Maximum Effective Transient Thermal Impedance, JunctiontoCase V D 15 V t p V D L Driver R G 20 V t p D.U.T. I 0.01 Ω V DD I Fig. 12a Unclamped Inductive Test Circuit Fig. 12b Unclamped Inductive Waveforms Document Number: 91288 www.vishay.com 111054Rev. B, 30May11 5
IRFL11N50, ihfl11n50 Fig. 12c Maximum valanche Energy vs. Drain Current Fig. 12d Typical Draintoource Voltage vs. valanche Current Current regulator ame type as D.U.T. 10 V Q G 12 V 0.2 µf 50 kω 0.3 µf Q G Q GD D.U.T. V D V G V G Charge Fig. 13a Basic Gate Charge Waveform 3 m Fig. 13b Gate Charge Test Circuit I G I D Current sampling resistors www.vishay.com Document Number: 91288 6 111054Rev. B, 30May11
IRFL11N50, ihfl11n50 Peak Diode Recovery dv/dt Test Circuit D.U.T. Circuit layout considerations Low stray inductance Ground plane Low leakage inductance current transformer R g dv/dt controlled by R g Driver same type as D.U.T. I D controlled by duty factor D D.U.T. device under test V DD Driver gate drive P.W. Period D = P.W. Period V G = 10 V a D.U.T. l D waveform Reverse recovery current Body diode forward current di/dt D.U.T. V D waveform Diode recovery dv/dt V DD Reapplied voltage Inductor current Body diode forward drop Ripple 5 % I D Note a. V G = 5 V for logic level devices Fig. 11 For NChannel maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for ilicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91288. Document Number: 91288 www.vishay.com 111054Rev. B, 30May11 7
Package Information TO263B (HIGH VOLTGE) (Datum ) 3 4 E 4 L1 4 D H 1 2 C 3 C L2 B B 5 Detail c2 B Gauge plane 0 to 8 L3 L L4 Detail Rotated 90 CW scale 8:1 H 1 B eating plane 2 x b2 2 x e 2 x b 0.010 M M B Plating 5 b1, b3 c ± 0.004 M B Base metal E D1 4 (c) c1 5 Lead tip (b, b2) ection B B and C C cale: none E1 View 4 MILLIMETER INCHE MILLIMETER INCHE DIM. MIN. MX. MIN. MX. DIM. MIN. MX. MIN. MX. 4.06 4.83 0.160 0.190 D1 6.86 0.270 1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420 b 0.51 0.99 0.020 0.039 E1 6.22 0.245 b1 0.51 0.89 0.020 0.035 e 2.54 BC 0.100 BC b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625 b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110 c 0.38 0.74 0.015 0.029 L1 1.65 0.066 c1 0.38 0.58 0.015 0.023 L2 1.78 0.070 c2 1.14 1.65 0.045 0.065 L3 0.25 BC 0.010 BC D 8.38 9.65 0.330 0.380 L4 4.78 5.28 0.188 0.208 ECN: 82110Rev., 15ep08 DWG: 5970 Notes 1. Dimensioning and tolerancing per ME Y14.5M1994. 2. Dimensions are shown in millimeters (inches). 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outmost extremes of the plastic body at datum. 4. Thermal PD contour optional within dimension E, L1, D1 and E1. 5. Dimension b1 and c1 apply to base metal only. 6. Datum and B to be determined at datum plane H. 7. Outline conforms to JEDEC outline to TO263B. Document Number: 91364 www.vishay.com Revision: 15ep08 1
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