CD4013BC Dual D-Type Flip-Flop



Similar documents
CD4013BC Dual D-Type Flip-Flop

CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset

CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate Quad 2-Input NAND Buffered B Series Gate

CD40174BC CD40175BC Hex D-Type Flip-Flop Quad D-Type Flip-Flop

CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate Quad 2-Input NAND Buffered B Series Gate

CD4043BC CD4044BC Quad 3-STATE NOR R/S Latches Quad 3-STATE NAND R/S Latches

MM74HC174 Hex D-Type Flip-Flops with Clear

MM74C74 Dual D-Type Flip-Flop

MM74HC273 Octal D-Type Flip-Flops with Clear

CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset

DM7474 Dual Positive-Edge-Triggered D-Type Flip-Flops with Preset, Clear and Complementary Outputs

MM74HCT373 MM74HCT374 3-STATE Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop

MM74HC14 Hex Inverting Schmitt Trigger

CD4040BC, 12-Stage Ripple Carry Binary Counters CD4060BC, 14-Stage Ripple Carry Binary Counters

DM74LS151 1-of-8 Line Data Selector/Multiplexer

DM74LS00 Quad 2-Input NAND Gate

DM74LS05 Hex Inverters with Open-Collector Outputs

74F74 Dual D-Type Positive Edge-Triggered Flip-Flop

DM74LS191 Synchronous 4-Bit Up/Down Counter with Mode Control

MM74HC4538 Dual Retriggerable Monostable Multivibrator

DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs

DM74LS157 DM74LS158 Quad 2-Line to 1-Line Data Selectors/Multiplexers

DM74LS193 Synchronous 4-Bit Binary Counter with Dual Clock

MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer

74AC139 74ACT139 Dual 1-of-4 Decoder/Demultiplexer

DM74LS169A Synchronous 4-Bit Up/Down Binary Counter

74VHC574 Octal D-Type Flip-Flop with 3-STATE Outputs

DM74LS153 Dual 1-of-4 Line Data Selectors/Multiplexers


74AC191 Up/Down Counter with Preset and Ripple Clock

MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer

CD4008BM CD4008BC 4-Bit Full Adder

74AC138 74ACT138 1-of-8 Decoder/Demultiplexer

74LS193 Synchronous 4-Bit Binary Counter with Dual Clock

DM74121 One-Shot with Clear and Complementary Outputs

74F675A 16-Bit Serial-In, Serial/Parallel-Out Shift Register

DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs

Obsolete Product(s) - Obsolete Product(s)

DM Segment Decoder/Driver/Latch with Constant Current Source Outputs

HCF4001B QUAD 2-INPUT NOR GATE

CD4093BM CD4093BC Quad 2-Input NAND Schmitt Trigger

HCC/HCF4027B DUAL-J-K MASTER-SLAVE FLIP-FLOP

5495A DM Bit Parallel Access Shift Registers

CD4511BM CD4511BC BCD-to-7 Segment Latch Decoder Driver

HCF4010B HEX BUFFER/CONVERTER (NON INVERTING)

MC14175B/D. Quad Type D Flip-Flop

HCF4070B QUAD EXCLUSIVE OR GATE

MC14008B. 4-Bit Full Adder

HCF4081B QUAD 2 INPUT AND GATE

Description. Table 1. Device summary. Order code Temperature range Package Packaging Marking

HCF4028B BCD TO DECIMAL DECODER

DM74LS373/DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops

DM74157 Quad 2-Line to 1-Line Data Selectors/Multiplexers

HCF4056B BCD TO 7 SEGMENT DECODER /DRIVER WITH STROBED LATCH FUNCTION

MC14001B Series. B Suffix Series CMOS Gates MC14001B, MC14011B, MC14023B, MC14025B, MC14071B, MC14073B, MC14081B, MC14082B

DATA SHEET. HEF40374B MSI Octal D-type flip-flop with 3-state outputs. For a complete data sheet, please also download: INTEGRATED CIRCUITS

HCC/HCF4032B HCC/HCF4038B

74VHC112 Dual J-K Flip-Flops with Preset and Clear

DM54161 DM74161 DM74163 Synchronous 4-Bit Counters

MM54C150 MM74C Line to 1-Line Multiplexer

HCC4541B HCF4541B PROGRAMMABLE TIMER

INTEGRATED CIRCUITS. 74LVC08A Quad 2-input AND gate. Product specification IC24 Data Handbook Jun 30

54191 DM54191 DM74191 Synchronous Up Down 4-Bit Binary Counter with Mode Control

54LS193 DM54LS193 DM74LS193 Synchronous 4-Bit Up Down Binary Counters with Dual Clock

Features. Applications

54157 DM54157 DM74157 Quad 2-Line to 1-Line Data Selectors Multiplexers

54LS169 DM54LS169A DM74LS169A Synchronous 4-Bit Up Down Binary Counter

Quad 2-Line to 1-Line Data Selectors Multiplexers

HIGH SPEED-10 MBit/s LOGIC GATE OPTOCOUPLERS

DATA SHEET. HEF40193B MSI 4-bit up/down binary counter. For a complete data sheet, please also download: INTEGRATED CIRCUITS

DM54LS260 DM74LS260 Dual 5-Input NOR Gate

4-bit binary full adder with fast carry CIN + (A1 + B1) + 2(A2 + B2) + 4(A3 + B3) + 8(A4 + B4) = = S1 + 2S2 + 4S3 + 8S4 + 16COUT

5485 DM5485 DM Bit Magnitude Comparators

HEF4011B. 1. General description. 2. Features and benefits. 3. Ordering information. 4. Functional diagram. Quad 2-input NAND gate

MADR TR. Single Driver for GaAs FET or PIN Diode Switches and Attenuators Rev. V1. Functional Schematic. Features.

74HC377; 74HCT General description. 2. Features and benefits. 3. Ordering information

INTEGRATED CIRCUITS. 74F74 Dual D-type flip-flop. Product specification Supercedes data of 1990 Oct 23 IC15 Data Handbook.

HEF4013B. 1. General description. 2. Features and benefits. 3. Applications. 4. Ordering information. Dual D-type flip-flop

1 TO 4 CLOCK BUFFER ICS551. Description. Features. Block Diagram DATASHEET

. MEDIUM SPEED OPERATION - 8MHz . MULTI-PACKAGE PARALLEL CLOCKING FOR HCC4029B HCF4029B PRESETTABLE UP/DOWN COUNTER BINARY OR BCD DECADE

74HC107; 74HCT107. Dual JK flip-flop with reset; negative-edge trigger

How to Read a Datasheet

. HIGH SPEED .LOW POWER DISSIPATION .COMPATIBLE WITH TTL OUTPUTS M54HCT27 M74HCT27 TRIPLE 3-INPUT NOR GATE. tpd = 9 ns (TYP.

74HC175; 74HCT175. Quad D-type flip-flop with reset; positive-edge trigger

74HC74; 74HCT General description. 2. Features and benefits. 3. Ordering information

74HC4040; 74HCT stage binary ripple counter

1-of-4 decoder/demultiplexer

CD4027BMS. CMOS Dual J-K Master-Slave Flip-Flop. Pinout. Features. Functional Diagram. Applications. Description. December 1992

.LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M74HC154 4 TO 16 LINE DECODER/DEMULTIPLEXER. HIGH SPEED tpd = 15 ns (TYP.) at VCC =5V

MADR TR. Quad Driver for GaAs FET or PIN Diode Switches and Attenuators Rev. 4. Functional Schematic. Features.

HEF4021B. 1. General description. 2. Features and benefits. 3. Ordering information. 8-bit static shift register

MC14543B. MARKING DIAGRAMS ORDERING INFORMATION. MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2.) PDIP 16 P SUFFIX CASE 648

Description. Table 1. Device summary. Order code Temperature range Package Packing Marking

CAT28C64B F R E E. 64K-Bit CMOS PARALLEL EEPROM L E A D FEATURES DESCRIPTION BLOCK DIAGRAM

DM74184 DM74185A BCD-to-Binary and Binary-to-BCD Converters

8-bit binary counter with output register; 3-state

TS555. Low-power single CMOS timer. Description. Features. The TS555 is a single CMOS timer with very low consumption:

DATA SHEET. HEF4017B MSI 5-stage Johnson counter. For a complete data sheet, please also download: INTEGRATED CIRCUITS

74HC393; 74HCT393. Dual 4-bit binary ripple counter

74LVX132 Low Voltage Quad 2-Input NAND Schmitt Trigger

Transcription:

CD4013BC Dual D-Type Flip-Flop General Description The CD4013B dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors. Each flip-flop has independent data, set, reset, and clock inputs and Q and Q outputs. These devices can be used for shift register applications, and by connecting Q output to the data input, for counter and toggle applications. The logic level present at the D input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line respectively. Features October 1987 Revised January 1999 Wide supply voltage range: 3.0V to 15V High noise immunity: 0.45 V DD (typ.) Low power TTL: fan out of 2 driving 74L compatibility: or 1 driving 74LS Applications Automotive Data terminals Instrumentation Medical electronics Alarm system Industrial electronics Remote metering Computers CD4013BC Dual D-Type Flip-Flop Ordering Code: Order Number Package Number Package Description CD4013BCM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow CD4013BCSJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide CD4013BCN N14A 14-Lead Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code. Connection Diagram Pin Assignments for DIP, SOIC and SOP Top View Truth Table CL (Note 1) No Change x = Don't Care Case Note 1: Level Change D R S Q Q 0 0 0 0 1 1 0 0 1 0 x 0 0 Q Q x x 1 0 0 1 x x 0 1 1 0 x x 1 1 1 1 1999 Fairchild Semiconductor Corporation DS005946.prf www.fairchildsemi.com

CD4013BC Schematic Diagrams Logic Diagram www.fairchildsemi.com 2

Absolute Maximum Ratings(Note 2) (Note 3) DC Supply Voltage (V DD ) 0.5 V DC to +18 V DC Input Voltage (V IN ) 0.5 V DC to V DD +0.5 V DC Storage Temperature Range (T S ) 65 C to +150 C Power Dissipation (P D ) Dual-In-Line 700 mw Small Outline 500 mw Lead Temperature (T L ) (Soldering, 10 seconds) 260 C Recommended Operating Conditions (Note 3) DC Supply Voltage (V DD ) +3 V DC to +15 V DC Input Voltage (V IN ) 0 V DC to V DD V DC Operating Temperature Range (T A ) 40 C to +85 C Note 2: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed, they are not meant to imply that the devices should be operated at these limits. The tables of Recommended Operating Conditions and Electrical Characteristics provide conditions for actual device operation. Note 3: V SS = 0V unless otherwise specified. CD4013BC DC Electrical Characteristics (Note 3) Symbol Parameter Conditions 40 C +25 C +85 C Min Max Min Typ Max Min Max Units I DD Quiescent Device V DD = 5V, V IN = V DD or V SS 4.0 4.0 30 µa Current V DD = 10V, V IN = V DD or V SS 8.0 8.0 60 µa V DD = 15V, V IN = V DD or V SS 16.0 16.0 120 µa V OL LOW Level I O < 1.0 µa Output Voltage V DD = 5V 0.05 0.05 0.05 V V DD = 10V 0.05 0.05 0.05 V V DD = 15V 0.05 0.05 0.05 V V OH HIGH Level I O < 1.0 µa Output Voltage V DD = 5V 4.95 4.95 4.95 V V DD = 10V 9.95 9.95 9.95 V V DD = 15V 14.95 14.95 14.95 V V IL LOW Level I O < 1.0 µa Input Voltage V DD = 5V, V O = 0.5V or 4.5V 1.5 1.5 1.5 V V DD = 10V, V O = 1.0V or 9.0V 3.0 3.0 3.0 V V DD = 15V, V O = 1.5V or 13.5V 4.0 4.0 4.0 V V IH HIGH Level I O < 1.0 µa Input Voltage V DD = 5V, V O = 0.5V or 4.5V 3.5 3.5 3.5 V V DD = 10V, V O = 1.0V or 9.0V 7.0 7.0 7.0 V V DD = 15V, V O = 1.5V or 13.5V 11.0 11.0 11.0 V I OL LOW Level Output V DD = 5V, V O = 0.4V 0.52 0.44 0.88 0.36 ma Current (Note 4) V DD = 10V, V O = 0.5V 1.3 1.1 2.25 0.9 ma V DD = 15V, V O = 1.5V 3.6 3.0 8.8 2.4 ma I OH HIGH Level Output V DD = 5V, V O = 4.6V 0.52 0.44 0.88 0.36 ma Current (Note 4) V DD = 10V, V O = 9.5V 1.3 1.1 2.25 0.9 ma V DD = 15V, V O = 13.5V 3.6 3.0 8.8 2.4 ma I IN Input Current V DD = 15V, V IN = 0V 0.3 10 5 0.3 1.0 µa V DD = 15V, V IN = 15V 0.3 10 5 0.3 1.0 µa Note 4: I OH and I OL are measured one output at a time. 3 www.fairchildsemi.com

CD4013BC AC Electrical Characteristics (Note 5) T A = 25 C, C L = 50 pf, R L = 200k, unless otherwise noted Symbol Parameter Conditions Min Typ Max Units CLOCK OPERATION t PHL, t PLH Propagation Delay Time V DD = 5V 200 350 ns V DD = 10V 80 160 ns V DD = 15V 65 120 ns t THL, t TLH Transition Time V DD = 5V 100 200 ns V DD = 10V 50 100 ns V DD = 15V 40 80 ns t WL, t WH Minimum Clock V DD = 5V 100 200 ns Pulse Width V DD = 10V 40 80 ns V DD = 15V 32 65 ns t RCL, t FCL Maximum Clock Rise and V DD = 5V 15 µs Fall Time V DD = 10V 10 µs V DD = 15V 5 µs t SU Minimum Set-Up Time V DD = 5V 20 40 ns V DD = 10V 15 30 ns V DD = 15V 12 25 ns f CL Maximum Clock V DD = 5V 2.5 5 MHz Frequency V DD = 10V 6.2 12.5 MHz V DD = 15V 7.6 15.5 MHz SET AND RESET OPERATION t PHL(R), Propagation Delay Time V DD = 5V 150 300 ns t PLH(S) V DD = 10V 65 130 ns V DD = 15V 45 90 ns t WH(R), Minimum Set and V DD = 5V 90 180 ns t WH(S) Reset Pulse Width V DD = 10V 40 80 ns V DD = 15V 25 50 ns C IN Average Input Capacitance Any Input 5 7.5 pf Note 5: AC Parameters are guaranteed by DC correlated testing. Switching Time Waveforms www.fairchildsemi.com 4

Physical Dimensions inches (millimeters) unless otherwise noted CD4013BC 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow Package Number M14A 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.com

CD4013BC Dual D-Type Flip-Flop Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N14A LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.