OBSOLETE. Omnidirectional Microphone with Bottom Port and Digital Output ADMP421. Data Sheet GENERAL DESCRIPTION FEATURES APPLICATIONS

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Data Sheet Omnidirectional Microphone with Bottom Port and Digital Output FEATURES Small and thin 3 mm 4 mm 1 mm surface-mount package High SNR of 61 dba High sensitivity of 26 dbfs Flat frequency response from 100 Hz to 15 khz Low current consumption: <650 µa Sleep mode for extended battery life High PSR of 80 dbfs Fourth-order Σ-Δ modulator Digital PDM output Compatible with Sn/Pb and Pb-free solder processes RoHS/WEEE compliant APPLICATIONS Smartphones and feature phones Teleconferencing systems Digital video cameras Bluetooth headsets Video phones Tablets FUNCTIONAL BLOCK DIAGRAM ADC POWER MANAGEMENT VDD GND GENERAL DESCRIPTION The is a high performance, low power, digital output bottom-ported omnidirectional MEMS microphone. The consists of a MEMS microphone element and an impedance converter amplifier followed by a fourth-order Σ-Δ modulator. The digital interface allows for the pulse density modulated (PDM) output of two microphones to be timemultiplexed on a single data line using a single clock. The has a high SNR and high sensitivity, making it an excellent choice for far field applications. The has a flat wideband frequency response, resulting in natural sound with high intelligibility. Low current consumption and a sleep mode enable long battery life for portable applications. A builtin particle filter provides high reliability. The complies with the TIA-920 Telecommunications Telephone Terminal Equipment Transmission Requirements for Wideband Digital Wireline Telephones standard. The is available in a thin 3 mm 4 mm 1 mm surface-mount package. It is reflow solder compatible with no sensitivity degradation. The is halide free. PDM MODULATOR CHANNEL SELECT L/R SELECT CLK DATA Figure 1. 07596-001 Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 2010 2011 Analog Devices, Inc. All rights reserved.

Data Sheet TABLE OF CONTENTS Features... 1 Applications... 1 General Description... 1 Functional Block Diagram... 1 Revision History... 2 Specifications... 3 Timing Characteristics... 4 Absolute Maximum Ratings... 5 ESD Caution... 5 Pin Configuration and Function Descriptions... 6 Typical Performance Characteristics... 7 PCB Land Pattern Layout... 8 Alternate PCB Land Patterns... 9 REVISION HISTORY 11/11 Rev. C to Rev. D Changed PSRR to PSR... Universal Changed Pb-Free Temperature from 245 C to 260 C, Table 4.. 5 Changes to Figure 8 and Figure 9... 8 Added Alternate PCB Land Patterns Section... 9 Changes to Temperature Humidity Bias (THB) Description, Table 6... 12 8/11 Rev. B to Rev. C Changes to Clock Frequency and Supply Voltage Parameters, Table 1... 3 Changes to Table 3 and Table 4... 5 Deleted Power-Saving Features Section... 8 Changes to Figure 9... 8 Added Applications Information Section... 9 Added Supporting Documents, Evaluation Board User Guides, Circuit Note, and Application Notes Sections... 9 Changes to Interfacing with Analog Devices Codecs Section... 9 Moved Sleep Mode Section and Power Savings When Disabling One Microphone in a Multimicrophone Application Section... 9 Changes to Figure 10... 9 Change to Pick-and-Place Equipment Section... 10 Deleted Evaluation Board Section... 10 Deleted Figure 10 and Figure 11; Renumbered Sequentially... 10 Deleted Table 6; Renumbered Sequentially... 10 Deleted Figure 12... 11 Change to Temperature Cycle Description, Table 6... 11 Changes to Ordering Guide... 12 Applications Information... 10 Interfacing with Analog Devices Codecs... 10 Sleep Mode... 10 Power Savings When Disabling One Microphone in a Multimicrophone Application... 10 Supporting Documents... 10 Handling Instructions... 11 Pick-and-Place Equipment... 11 Reflow Solder... 11 Board Wash... 11 Reliability Specifications... 12 Outline Dimensions... 13 Ordering Guide... 13 6/11 Rev. A to Rev. B Changes to Figure 1... 1 Changes to Figure 5... 7 2/11 Rev. 0 to Rev. A Changes to Features Section, Applications Section, and General Description Section... 1 Added Dynamic Range Parameter, Changes to Input Characteristics Parameter and Output Characteristics Parameter, Deleted Polarity Parameter, Table 1... 3 Changes to Table 3... 5 Changes to Table 5... 6 Added Power-Saving Features Section... 8 Updated Outline Dimensions... 13 Changes to Ordering Guide... 13 4/10 Revision 0: Initial Version Rev. D Page 2 of 16

Data Sheet SPECIFICATIONS TA = 25 C, VDD = 1.8 V, CLK = 2.4 MHz, unless otherwise noted. All minimum and maximum specifications are guaranteed. Typical specifications are not guaranteed. Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit PERFORMANCE Directionality Omni Sensitivity 1 1 khz, 94 db SPL 29 26 23 dbfs Signal-to-Noise Ratio SNR 20 khz bandwidth, A-weighted 61 dba Equivalent Input Noise EIN 20 khz bandwidth, A-weighted 33 dba SPL Dynamic Range Derived from EIN and maximum acoustic input 87 db Frequency Response 2 Low frequency 3 db point 100 Hz High frequency 3 db point 15 khz Deviation limits from flat response within 3/+2 db pass band Total Harmonic Distortion THD 105 db SPL 3 % Power Supply Rejection PSR 217 Hz, 100 mv p-p square wave 80 dbfs superimposed on VDD = 1.8 V Maximum Acoustic Input Peak 120 db SPL INPUT CHARACTERISTICS Clock Frequency CLK 1.0 2.4 3 3.3 MHz Clock Duty Ratio Clock frequency of 2.4 MHz or less 40 60 % Input Voltage High VIH 0.65 VDD V Input Voltage Low VIL 0.35 VDD V OUTPUT CHARACTERISTICS Output Voltage High VOH ILOAD = 0.5 ma 0.7 VDD VDD V Output Voltage Low VOL ILOAD = 0.5 ma 0 0.3 VDD V Latency <30 µs Wake-Up Time From sleep mode, power on 10 ms POWER SUPPLY Supply Voltage VDD 1.8 3.3 V Supply Current IS Normal mode 650 µa Sleep mode 4 50 µa 1 Relative to the rms level of a sine wave with positive amplitude equal to 100% 1s density and negative amplitude equal to 0% 1s density. 2 See Figure 5 and Figure 6. 3 The microphone operates at any clock frequency between 1.0 MHz and 3.3 MHz. Some specifications may not be guaranteed at frequencies other than 2.4 MHz. 4 The microphone enters sleep mode when the clock is turned off or the clock frequency is less than 1 khz. Rev. D Page 3 of 16

Data Sheet TIMING CHARACTERISTICS Table 2. Parameter Description Min Max Unit Input tclkin Input clock period 310 1000 ns Output t1outen DATA1 driven after falling clock edge 30 ns t1outdis DATA1 disabled after rising clock edge 20 ns t2outen DATA2 driven after rising clock edge 30 ns t2outdis DATA2 disabled after falling clock edge 20 ns Timing Diagram CLK DATA1 DATA2 t 2OUTEN t CLKIN t 1OUTEN t 2OUTDIS Figure 2. Pulse Density Modulated Output Timing t 1OUTDIS 07596-002 Rev. D Page 4 of 16

Data Sheet ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating Supply Voltage 0.3 V to 3.6 V Digital Pin Input Voltage 0.3 V to VDD + 0.3 V or 3.6 V, whichever is less Sound Pressure Level (SPL) 160 db Mechanical Shock 10,000 g Vibration Per MIL-STD-883 Method 2007, Test Condition B Temperature Range 40 C to +85 C TEMPERATURE T P T L T SMIN T SMAX t S PREHEAT RAMP-UP t25 C TO PEAK TIME Figure 3. Recommended Soldering Profile Limits Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION t P t L RAMP-DOWN CRITICAL ZONE T L TO T P Table 4. Recommended Soldering Profile Limits Profile Feature Sn63/Pb37 Pb Free Average Ramp Rate (TL to TP) 1.25 C/sec max 1.25 C/sec max Preheat Minimum Temperature (TSMIN) 100 C 100 C Maximum Temperature (TSMAX) 150 C 200 C Time (TSMIN to TSMAX), ts 60 sec to 75 sec 60 sec to 75 sec Ramp-Up Rate (TSMAX to TL) 1.25 C/sec 1.25 C/sec Time Maintained Above Liquidous (tl) 45 sec to 75 sec ~50 sec Liquidous Temperature (TL) 183 C 217 C Peak Temperature (TP) 215 C +3 C/ 3 C 260 C +0 C/ 5 C Time Within 5 C of Actual Peak Temperature (tp) 20 sec to 30 sec 20 sec to 30 sec Ramp-Down Rate 3 C/sec max 3 C/sec max Time 25 C (t25 C) to Peak Temperature 5 minute max 5 minute max 07596-003 Rev. D Page 5 of 16

Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DATA 5 1 CLK V DD 4 2 L/R SELECT 3 GND Figure 4. Pin Configuration (Bottom View) Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 CLK Clock Input to Microphone. 2 L/R SELECT Left Channel or Right Channel Select. DATA1 (right): L/R SELECT tied to GND. DATA2 (left): L/R SELECT pulled to VDD. 3 GND Ground. 4 VDD Power Supply. Placing a 0.1 µf (100 nf) ceramic type X7R capacitor between Pin 4 (VDD) and ground is strongly recommended for best performance and to avoid potential parasitic artifacts. The capacitor should be placed as close to Pin 4 as possible. 5 DATA Digital Output Signal (DATA1, DATA2). 07596-007 Rev. D Page 6 of 16

Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 10 8 6 40 50 (db) (db) 4 2 0 2 4 6 8 10 10 0 10 100 1k 10k FREQUENCY (Hz) Figure 5. Frequency Response Mask 20 100 1k 10k FREQUENCY (Hz) Figure 6. Typical Frequency Response (Measured) 07596-004 07596-005 PSR (dbfs) 60 70 80 90 100 200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) Figure 7. Typical Power Supply Rejection vs. Frequency 07596-006 Rev. D Page 7 of 16

PCB LAND PATTERN LAYOUT The recommended PCB land pattern for the should be laid out to a 1:1 ratio to the solder pads on the microphone package, as shown in Figure 8. Care should be taken to avoid applying solder paste to the sound hole in the PCB. A suggested Data Sheet solder paste stencil pattern layout is shown in Figure 9. The diameter of the sound hole in the PCB should be larger than the diameter of the sound port of the microphone. A minimum diameter of 0.5 mm is recommended. 3.80 CENTER LINE (0.30) 4 0.40 0.60 (1.000) 0.90 (0.30) CENTER LINE (0.30) 1.849 1.45 1.525 1.849 0.70 2.05 2 R0.10 ø1.70 (0.550) Figure 8. Suggested PCB Land Pattern Layout 2.45 0.9 1.000 24 24 0.35 0.375 0.7 0.35 1.498 0.248 0.35 (0.30) 0.248 0.948 (2 ) 0.398 0.298 (4 ) 0.248 1.148 (2 ) 0.248 0.498 (2 ) 1.17 1.498 0.205 WIDE 0.362 CUT (3 ) Figure 9. Suggested Solder Paste Stencil Pattern Layout ø1.10 07596-009 2.80 07596-008 Rev. D Page 8 of 16

Data Sheet ALTERNATE PCB LAND PATTERNS The s standard PCB land pattern has a solid ring around the edge of the footprint, which may make routing the microphone signals more difficult in some board designs. This ring is used to improve the RF immunity performance of the, but it is not necessary to have this full ring connected for electrical functionality. If a design can tolerate reduced RF immunity then this ring can either be broken or removed completely from the PCB footprint. Figure 10 shows an example land pattern with no enclosing ring around the edge of the part, and Figure 11 shows an example pattern with the ring broken on two sides so that the inner pads can be more easily routed on the PCB. Figure 10. Example PCB Land Pattern with No Enclosing Ring 07596-011 Figure 11. Example PCB Land Pattern with Broken Enclosing Ring Note that in both of these patterns, the solid ring around the sound port is still present; this ring is needed to ground the microphone and for acoustic performance. The pad on the package connected to this ring is ground and still needs a solid electrical connection to the PCB ground. If a pattern like one of these two examples is used on a PCB, take care that the unconnected ring on the bottom of the is not placed directly over any exposed copper. This ring on the microphone is still at ground and any PCB traces routed underneath it need to be properly masked to avoid short circuits. 07596-012 Rev. D Page 9 of 16

Data Sheet APPLICATIONS INFORMATION INTERFACING WITH ANALOG DEVICES CODECS Analog Devices ADAU1361, ADAU1761, and ADAU1781 codecs feature digital microphone inputs that support the PDM output data format. See the connection diagrams shown in Figure 12, and refer to the AN-1003 Application Note and the codecs respective data sheets for more details on the digital microphone interface. SLEEP MODE The microphone enters sleep mode when the clock is turned off or the clock frequency falls below 1 khz. In sleep mode, the microphone data output is in high impedance state and the current consumption is less than 50 µa. POWER SAVINGS WHEN DISABLING ONE MICROPHONE IN A MULTIMICROPHONE APPLICATION The has a unique power-saving feature when used in systems where two or more microphones share the same clock and/or data lines. The microphone is designed to present high impedance on both the clock and data pins when the power supply (VDD) pin is at 0 V or floating. This disabled microphone presents no load to and consumes no power from other active microphones. 0.1µF 0.1µF V DD L/R SELECT V DD CLK CLK GND DATA DATA SUPPORTING DOCUMENTS Evaluation Board User Guides UG-118, EVAL-Z Bottom Port Digital Output MEMS Microphone Evaluation Board UG-183, EVAL-Z-FLEX: Bottom-Ported Digital Output MEMS Microphone Evaluation Board Circuit Note CN-0078, imems Digital Microphone Simplifies the Interface to a SigmaDSP Audio Codec Application Notes AN-1003, Recommendations for Mounting and Connecting Analog Devices, Inc., Bottom-Ported MEMS Microphones AN-1068, Reflow Soldering of the MEMS Microphone AN-1112, Microphone Specifications Explained AN-1124, Recommendations for Sealing Analog Devices, Inc., Bottom-Port MEMS Microphones from Dust and Liquid Ingress MICBIAS 1.8V TO 3.3V AVDD ADAU1361 OR ADAU1761 BCLK/GPIO2 JACKDET/MICIN L/R SELECT GND DGND AGND 07596-010 Figure 12. ADAU1361 and ADAU1761 Stereo Interface Block Diagram Rev. D Page 10 of 16

Data Sheet HANDLING INSTRUCTIONS PICK-AND-PLACE EQUIPMENT The MEMS microphone can be handled using standard pickand-place and chip shooting equipment. Care should be taken to avoid damage to the MEMS microphone structure as follows: Use a standard pickup tool to handle the microphone. Because the microphone hole is on the bottom of the package, the pickup tool can make contact with any part of the lid surface. Use care during pick-and-place to ensure that no high shock events above 10 kg are experienced because such events may cause damage to the microphone. Do not pick up the microphone with a vacuum tool that makes contact with the bottom side of the microphone. Do not pull air out of or blow air into the microphone port. Do not use excessive force to place the microphone on the PCB. REFLOW SOLDER For best results, the soldering profile should be in accordance with the recommendations of the manufacturer of the solder paste used to attach the MEMS microphone to the PCB. It is recommended that the solder reflow profile not exceed the limit conditions specified in Figure 3 and Table 4. BOARD WASH When washing the PCB, ensure that water does not make contact with the microphone port. Blow-off procedures and ultrasonic cleaning must not be used. Rev. D Page 11 of 16

Data Sheet RELIABILITY SPECIFICATIONS The microphone sensitivity after stress must deviate by no more than 3 db from the initial value. Table 6. Stress Test Low Temperature Operating Life High Temperature Operating Life Temperature Humidity Bias (THB) Temperature Cycle High Temperature Storage Low Temperature Storage Component CDM ESD Component HBM ESD Component MM ESD Description 40 C, 500 hours, powered +125 C, 500 hours, powered +85 C/85% relative humidity (RH), 500 hours, powered 40 C/+125 C, one cycle per hour, 1000 cycles +150 C, 500 hours 40 C, 500 hours All pins, 0.5 kv All pins, 1.5 kv All pins, 0.2 kv Rev. D Page 12 of 16

Data Sheet OUTLINE DIMENSIONS 4.10 4.00 3.90 PIN 1 3.54 REF REFERENCE CORNER 0.40 0.60 (Pins 1, 2, 4, 5) 0.95 REF 2.05 0.70 1.70 DIA. 1.10 1.00 0.90 3.20 12.30 12.00 11.70 4.80 TOP VIEW SIDE VIEW 2.05 2 2.00 1.95 2.48 REF 3.10 3.00 2.90 0.72 REF 0.24 REF 0.90 0.30 REF 0.30 REF 1.05 REF 0.35 1 2 5 4 3 0.30 REF 0.30 REF 3.80 BOTTOM VIEW Figure 13. 5-Terminal Chip Array Small Outline No Lead Cavity [LGA_CAV] 4 mm 3 mm Body (CE-5-1) Dimensions shown in millimeters 3.80 8.00 2.20 4.00 1 1.60 MAX 1.50 NOM 1.50 MIN DIA DETAIL A A A 1.85 1.75 1.65 5.55 2 5.50 5.45 NOTES: 0.25 1. 10 SPROCKET HOLE PITCH CUMULATIVE TOLERANCE ± 0.20. 2. POCKET POSITION RELATIVE TO SPROCKET HOLE MEASURED AS TRUE POSITION OF POCKET, NOT POCKET HOLE. DETAIL A Figure 14. LGA_CAV Tape and Reel Outline Dimensions Dimensions shown in millimeters 0.25 0.50 R 1.10 DIA. 1.50 0.25 DIA. (THRU HOLE) R0.10(2 ) 0.20 MAX 0.35 0.35 0.30 0.25 2.80 1.60 1.30 REF SECTION A-A ORDERING GUIDE Model 1 Temperature Range Package Description Package Option 2 Ordering Quantity BCEZ-RL 40 C to +85 C 5-Terminal LGA_CAV, 13 Tape and Reel CE-5-1 5,000 BCEZ-RL7 40 C to +85 C 5-Terminal LGA_CAV, 7 Tape and Reel CE-5-1 1,000 EVAL-Z Evaluation Board EVAL-Z-FLEX Flex Evaluation Board 1 Z = RoHS Compliant Part. 2 This package option is halide free. 062408-A 06-16-2010-G Rev. D Page 13 of 16

Data Sheet NOTES Rev. D Page 14 of 16

Data Sheet NOTES Rev. D Page 15 of 16

Data Sheet NOTES 2010 2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07596-0-11/11(D) Rev. D Page 16 of 16