Mainframe Operating Systems Boot Camp



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Robert Rannie Milica Kozomara Northern Illinois University - DeKalb, IL Texas Instruments - Dallas, TX Our Agenda for the Week Mainframe Operating Systems Boot Camp From IPL to Running Programs Part 2 Session #2896 SHARE 112 in Austin, March 2009 1 #2895 - Part 1: The General Purpose Computer and!!! Interrupts #2896 - Part 2: From IPL to Running Programs #2897 - Part 3: SVCs and More SVCs #2898 - Part 4: Program Interrupts!!! (You Want An Exit With That?) #2899 - Part 5: FLIH: I/O INTERRUPTS #2894 - Mainframe Operating System Boot Camp:!!! Highlights 2 Tell em what you re gonna tell em What you need to RUN a program The Dispatcher SVC First Level Interrupt Handlers (FLIHs) What you Need to RUN a Program Just a Few Good Routines and Control Blocks (CBs) Initial Program Load (IPL) Dispatching SVC - FLIH SVC 8 (Loader) SVC 1 (Wait) Master Scheduler 3 4

What you Need to RUN a Program Set up the Following Routines and CBs PSA ( Low Core ) The CVT (Memory label = MYCVT ) Other Routines & CBs (in SOS-A) Dynamic memory area stack (CB100s), Size X 100 TCBs & RBs (In dynamic memory areas X 0 X 8 X 10 What you Need to RUN a Program IPL PSW Restart New PSW IPL CCW1 Restart Old PSW IPL CCW2 A(MYCVT) Required Initialization X 18 X 20 X 28 X 30 X 38 X 40 External Old PSW Supervisor Call Old PSW Program Check Old PSW Machine Check Old PSW Input/Output Old PSW Channel Status Word X 48 CAW A(MYCVT) X 50 CLOCK Trace Info X 58 X 60 X 68 X 70 X 78 External New PSW Supervisor Call New PSW Program Check New PSW Machine Check New PSW Input/Output New PSW Four 64 byte save areas One for each, EX, SV, PC, and IO 4 F 0 at TCBWORDS - DSECT is IEATCBP 5 6 What you Need to RUN a Program Typical Locations X 1200 MYCVT X 1300 SVC TABLE X 1800 Dispatcher X 1C00 IPL Program X 2000 5 FLIH (One for each Interrupt type) What you Need to RUN a Program Typical Locations X 6000 Location for SVC Modules SVCs 1, 3, and 8 in Instructor Supplied Macro Library: 'WAITS', 'EXIT' & 'LOADERX' X E200 Master Scheduler (MS) X F000 Pool of CB100s 7 8

What you Need to RUN a Program IPL Program The IPL process consists of I/O Phase - loads OS into memory PSW Loading Phase - load current PSW At this point it as if you are at the top of the BIF loop What you Need to RUN a Program 3 Ways to a New Current PSW Via an Interrupt Via Load PSW Instruction (LPSW) Via Initial Program Load (IPL) process 9 10 Establish Addressability 11 12

Set Storage Key on all Blocks of Memory SSK - Set Storage Key SSK X igigighh X igaddress (bytes ig are ignored) 8 bits of 'hh' are: 0-3 = key, 4 = fetch protection 13 14 Set Highest Available Machine Byte Acquire 4 CBs 15 16

Fields to Define in the TCBs The TCB Chain (no RBs yet) TCB - MS A(RB) F 0' A(Next TCB on the chain or 0) F 0 - Wait TCBBACK TCBBACK A(Previous TCB on the chain or 0) 17 18 Fields to Define in the RBs The TCB Chain with RBs RBFLGS3 bit 0 set to 1 for a PRB bit 0 set to 0 for an SVRB PRB - MS RBWCF = 0 TCB - MS F 0' RBLINK X'FF0401190F',AL3(MS) for MS RB X'FFE601190F',AL3(LEVELABN) for WAIT RB Byte 0 is RBWCF and it must be zero Bytes 1-3 are address portion:! for a PRB, this will be"the AL3(TCB) PRB - Wait RBWCF = 0 F 0 - Wait TCBBACK 19 20

Fields to Define in the CVT (MYCVT) CVTTCBP A( TCB-Words )!! DSECT = IEATCBP PSATOLD IEATCBP+4!!! (set by Dispatcher) CVTSVCTA A(SVCTABLE) CVTHEAD A(1ST TCB IN CHAIN)! (set by IPL) CVTC100H A(CB100HDR)! Header Address for CB100 CBs CVT0DS A(Dispatcher) CVTEXIT SVC 3!!!! An instruction (!) CVTBRET BCR 15,14!!! An instruction (!) Fields to Define in the CVT (MYCVT) Build TCB chain for Dispatching Point CVTHEAD to MS-TCB Chain TCBs Down from MS-TCB via (lowest = 0) Up from Wait-TCB via TCBBACK (highest TCBBACK = 0) 21 22 The TCB Chain with RBs and CVTHEAD IPL Basics Have Been Accomplished CVTHEAD PRB - MS RBWCF = 0 TCB - MS PRB - Wait RBWCF = 0 F 0 TCB - Wait TCBBAC K F 0' 23 24

The Dispatcher Basic Functions Enter Dispatcher with R12! - A(beginning of Dispatcher) R3!- A(MYCVT) The Dispatcher Basic Functions Dispatcher runs down the chain of TCBs searching each TCB for: 1. Non-zero A(TCB)! If A(TCB) == 0, then abend 2. Non-zero A(RB) in TCB! If A(RB) == 0, do Job End Code 3. If RBWCF == 0, Do Dispatch! 25 26 The Dispatcher Entry Code The Dispatcher Dispatch Code 27 28

The Dispatcher Job End Code Not until we introduce SVC 3 in Part 3 Why? Our objective is to get a user's job running Thus we require SVCs 1 & 8 within the Master Scheduler First we discuss SVC-FLIH in greater detail SVC First Level Interrupt Handler Role of the First Level Interrupt Handler Duties 1. Save the Essence of the Interrupted Program 2. Direct execution to appropriate module 3. Direct execution to code to restore Program from Essence 29 30 SVC First Level Interrupt Handler Register Convention of SVC FLIHs R3 R4 R5 R6 R12 A(MYCVT) A(TCB) A(RB) A(SVC Routine/Module) Base register, if needed A(dispatcher) for return SVC First Level Interrupt Handler Register Convention of SVC FLIHs GPRs 13, 15, 0, 1! Input Parameter registers GPRs 15, 0, 1!!! Output/Return Parameter registers SVC Routines may use (store into) the area designated by GPR13, but they will not modify GPR13 31 32

SVC First Level Interrupt Handler SVC Table Pointed to by CVTSVCTA Each entry is 8 bytes in length SVC First Level Interrupt Handler The Code AL4(SVC000) AL4(SVC008) AL4(SVC255) 33 34 SVC First Level Interrupt Handler SVC 1 (Wait) Input Parameters: R0 - Number of events R1 - A(Event Control Block) SVC 1 may increment RBWCF in RB of the issuing program SVC 1 with SVC 2 uses ECB to control the running of a program SVC First Level Interrupt Handler SVC 1 (Wait) Suffice it to say: Issue SVC 1 when bit 1 of the ECB is '0' (the issuing program STOPs!) Issue SVC 1 when bit 1 of the ECB is '1' (the issuing program keeps running) 35 36

SVC First Level Interrupt Handler SVC 8 (Loader) Input Parameters: R0 - Load Address R1 - Available Memory SVC First Level Interrupt Handler SVC 8 (Loader) Output Parameters: R0 - Entry Point Address (EPA) of executable load module R1 - Actual size of loaded program R15 - Return Code Typical:! 0 = OK!! 4, 8,... = Not OK 37 38 Entry into MS Recall: IPL branches into Dispatcher Dispatcher dispatches (LPSW) MS TCB/ RB to begin execution of Master Scheduler at MS-EPA Program Logic STEP 0 Assemble Master Scheduler Resident Data Area (MSDA) A(first 4K user program region) SSK Byte Pad Byte Set MS-ECB (MECB) to X 7F,C ECB 39 40

STEP 1 (EPA) Program Logic SVC 1 with R0=1 & R1=A(MECB) RECALL:! if MECB bit 1=0, SVC 1 increments MS-RBWCF by 1!!! (MS not Dispatchable)!! if MECB bit 1=1, SVC 1 doesn t change MSRBWCF!!! (MS remains Dispatchable ) Operation The MS reads a record from the input file If End of File (EOF) is found, SOS has finished If there are records in the input file! MS will prepare to run the job (first record of each job contains 'Parm Field') WHILE (MS is Dispatchable) Dispatch the MS 41 42 Program Logic STEP 2 & STEP 3 pad (MVCL) 4K region with pad byte issue SSKs to set protect key for two 2K portions of region Program Logic STEP 4 & STEP 5 move 'Parm Field' into a Parm Area at highest location in the 4K region establish next lower 72 bytes as 18 fullword save area for the user 43 44

User Program Region Before SVC 8 R0 - X 00A000 A Unused areas in 4K region Z 72 byte Save Area X 88 byte Parm. Area with Header X 00B000 R1 - Avail Memory from A to Z Program Logic STEP 6 R1 = amount of available space remaining in 4K user region R0 = A(start of 4K region) issue SVC 8 to read object module records from input convert them into an executable load module in the region 45 46 Program Logic Upon return from the SVC 8 test RC (in R15) for successful load retrieve Entry Point Address of the loaded program from R0 User Program Region After SVC 8 R0 - X 00A000 Loaded program is here EPA A Unused areas in 4K region Z 72 byte Save Area X 88 byte Parm. Area with Header X 00B000 R1 - Length of loaded program (A - X 00A000 ) 47 48

Program Logic STEP 7 If ( successful load ) obtain and initialize TCB/RB pair!!!!!!! (just like in IPL) X FFk501190F, AL3(EPA) User PSW I/O mask enabled FF Protect key no longer '0', now a non-zero value, k, from MSDA field State Bit now set to 1 indicating 'Problem State' A(EPA) of loaded program (returned in R0 from SVC 8) The user program gets dispatched -! It can issue SVCs and is I/O-External interrupt enabled Channel Masks E PSW key c m w p Interruption Code 49 0 7 8 12 16 31 ILC CC Program mask Instruction Address 32 34 36 40 63 50 User TCB & RB PRB RBWCF = 0 X FFk501190F, AL3(EPA) TCB - User TCBBACK Dispatching User Program Some GPRs in the user field must be set R1 - A(Parm Area) R15 - EPA (must be in R15 AND PSW) R14 - A(CVTEXIT) = A(MYCVT+X'50') R13 - A(OS provided Save Area) 51 52

Program Logic (Continued) STEP 8 [SOS] generate job start message Assist-V XPRNT now, SVC 0 later STEP 9 update fields in MSDA for future jobs increment the CUrent number of Initiators (CURI) Program Logic (Continued) STEP 10 Chain user TCB just after MS-TCB STEP 11 Not until we get to multiprogramming 53 54 TCB Chain with User TCB PRB - MS RBWCF = 0 PRB - User RBWCF = 0 TCB - User TCB - MS X FFk501190F, AL3(EPA) TCBBACK PRB - Wait RBWCF = 0 TCB - Wait CVTHEAD F 0 TCBBACK F 0' Dispatching User Program With three TCBs in the chain, Dispatcher picks first one: MS-TCB To dispatch User-TCB, MS-TCB must be made non-dispatchable To do this: Set MECB to 0 Issue SVC 1 against MECB 55 56

Program Logic (Continued) STEP 12 (bottom of MS Loop) set MECB to 0 (XC) branch to SVC 1 instruction at top of MS Loop Dispatching User Program Issuing SVC 1 with zero MECB makes MS-TCB non-dispatchable SVC 1 increments RBWCF (MS RB now waiting on 1 task) With MS-TCB non-dispatchable dispatcher now picks User-TCB 57 58 TCB Chain with User TCB CVTHEAD PRB - MS RBWCF = 1 TCB - MS F 0' PRB - User RBWCF = 0 X FFk501190F, AL3(EPA) PRB - Wait RBWCF = 0 TCB - Wait TCB - User TCBBAC K Hooray! The Program is Running F 0 TCBBAC K 59 60

Sneak Preview Part 3: SVCs and More SVCs SVC Types: Enabled or Disabled Scheduling and Dispatching the SVRB SVC 3 - RB Killer The valve (SVC 1 & SVC 2) SVC 8 - Loader SVC 13 - ABEND Questions rrannie@cs.niu.edu m-kozomara@ti.com www.cs.niu.edu/~rrannie 61 62