A 0.18µm CMOS Low-Power Charge-Integration DPS for X-Ray Imaging



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IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 1/23 A 0.18µm CMOS Low-Power Charge-Integration DPS for X-Ray Imaging Roger Figueras 1, Justo Sabadell 2, Josep Maria Margarit 1, Elena Martín 1, Lluís Terés 1 and Francisco Serra-Graells 1 paco.serra@imb-cnm.csic.es 1 Integrated Circuits and Systems (ICAS) Instituto de Microelectrónica de Barcelona, IMB-CNM(CSIC) 2 X-Ray Imatek S.L. November 2009

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 2/23 1 Introduction 2 Lossless A/D Conversion 3 Dark Current Cancellation 4 Gain Programmability and Built-in Test 5 Local Bias Generation 6 CMOS Integration and Results 7 Conclusions

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 3/23 1 Introduction 2 Lossless A/D Conversion 3 Dark Current Cancellation 4 Gain Programmability and Built-in Test 5 Local Bias Generation 6 CMOS Integration and Results 7 Conclusions

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 4/23 Introduction Hybrid X-ray digital imagers Low-energy (<20keV) medical applications: mammography digital X-ray imager V com X-ray particle hit DPS circuits for visible spectrum: e /h + collection Pulsed X-ray input current (typ. 15ke /hit@10µs) Dark current + gain FPN Built-in test I sens time DPS Si or CdTe X-ray sensor bump bonding CMOS circuit I sens e/h - + cloud Few DPS for X-ray based on photon-counting: Saturation due to pile-up Losses from charge sharing with neighbors

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 5/23 Introduction Hybrid X-ray digital imagers Low-energy (<20keV) medical applications: mammography Novel X-ray DPS proposal based on charge-integration to solve all plus: Self-biasing Lossless A/D conversion I sens time digital X-ray imager DPS Si or CdTe X-ray sensor bump bonding CMOS circuit V com I sens X-ray particle hit e/h - + cloud V com I sens Dark current cancellation I dark I test Built-in test I adc Gain programming A/D conversion Local bias generation Digital I/O digital program-in b in b out digital read-out... subthreshold operation and circuit reuse for a low-power and compact DPS!

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 6/23 1 Introduction 2 Lossless A/D Conversion 3 Dark Current Cancellation 4 Gain Programmability and Built-in Test 5 Local Bias Generation 6 CMOS Integration and Results 7 Conclusions

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 7/23 Lossless A/D Conversion Predictive scheme: Under real low-power operation: Pulse density modulator Low-pass digital filter T frame b init I adc V int Vref -Vth - + V pulse q adc (a) V int V pulse T pulseideal 1 2 3 4 5 6 7 Vref -Vth 0 b init (b) Vint V pulse Tres 1 2 3 4 5 6 Vref -Vth n adcideal = q adc = n adcideal T frame T pulseideal = T frame C intv th Ī adc e.g. 10bit and T frame =10ms require T res<5ns! (c) V int V pulse T res < 1 2 3 4 5 6 7 n adcreal = T frame 2q 2 fullscale n adcideal 1 + Tres T frame n adcideal for <0.5LSB error Vref -Vth

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 8/23 Lossless A/D Conversion Predictive scheme: Pulse density modulator Low-pass digital filter b init Under real low-power operation: T frame I adc V int Vref -Vth - + V pulse q adc (a) V int V pulse T pulseideal 1 2 3 4 5 6 7 Vref -Vth 0 (b) Vint Vref -Vth b init V pulse Tres 1 2 3 4 5 6 b init C int (c) V int Vref -Vth V pulse 1 2 3 4 5 6 7 I adc V int n adcreal n adcideal V pulse V pulse T res independent C reset/cds Vref -Vth min(t res) for charge redistribution max(f pulse )= 1 2T res

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 9/23 Lossless A/D Conversion CMOS proposal: I adc b init M5 C int M3 M1 M7 b reset M2 I bias M4 M6 b reset C reset/cds b reset b reset b h/ e Capacitive TransImpedance M14 M15 Amplifier (CTIA) = M10 M11 M13 M12 M1-4 + C int V int M8 I bias I bias M9 Vref V pulse +(-1) b h/ e Vth Non-overlapped reset by M6-7 b h/ē for controlling collection polarity Inherent Correlated Double Sampling (CDS)

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 10/23 1 Introduction 2 Lossless A/D Conversion 3 Dark Current Cancellation 4 Gain Programmability and Built-in Test 5 Local Bias Generation 6 CMOS Integration and Results 7 Conclusions

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 11/23 Dark Current Cancellation C dark2 M3 V dark2 S2 M4 S3 I sens S4 M6 M5 C int b h/ e I sens> 0 I sens< 0 Á 1 Current copiers based I dark auto-calibration V int Á 2 M1 V S1 dark1 C dark1 M2 PDM parts Á 3 Á 4 coarse fine hold coarse fine hold Coarse + fine for charge injection compensation M3 I sens C dark2 Á 4 Á 2 V M16 M13 dark2 M14 Á 2 M15 Á 2 M4 M7 M5 M6 M8 Á 1 V int C int Composite switches for long retention time (up to 1s) Dual operation for b h/ē ADC PDM parts reused M1 M11 Á 1 M10 V dark1 M12 M9 M2 PDM parts CTIA offset independent C dark1 Á 3 Á 1

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 12/23 1 Introduction 2 Lossless A/D Conversion 3 Dark Current Cancellation 4 Gain Programmability and Built-in Test 5 Local Bias Generation 6 CMOS Integration and Results 7 Conclusions

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 13/23 Gain Programmability FPN compensation via individual V th control: Á 2 Á3 Á 2 V prog C mem Á 1 Á 1 Á 1 C samp b init C int Á 2 +Á 3 V int M1 Vref PDM parts +(-1) b h/ e Vth b h/ e I sens> 0 I sens< 0 b init q dac(0... B-1) q dac(0... B-1) b in SC DAC based Serial program-in during read-out (no speed losses), for C samp C mem: V prog = V DD B 1 i=0 q dac (i) 2 B i 0 Polarity + storage: V th = Cmem C int V DD B 1 i=0 q dac (i) 2 B i b in Á 1 Á 2 Á 3 programming hold programming hold init sample init sample ADC PDM reused Built-in test through charge injection...

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 14/23 1 Introduction 2 Lossless A/D Conversion 3 Dark Current Cancellation 4 Gain Programmability and Built-in Test 5 Local Bias Generation 6 CMOS Integration and Results 7 Conclusions

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 15/23 Local Bias Generation I bias and DPS generator M11 X M7 M M5 1 M6 1 M10 1 PTAT core M1-M4 in weak inversion saturation: V bias = U t ln P M3 M4 P 1 I bias M8 and M9 in strong inversion saturation and conduction: I bias = QI S9 I S9 = 2nβ 9Ut 2 [ ( )] 2 ln P M Q = 2(M + 1) N + M N + M + 1 M12 Y M8 N M9 1 M1 M2 P 1 V bias M12 in strong inversion saturation: QX = 2n Y Ut + V TO I S -based I bias for low dependence on technology thermal compensation

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 16/23 1 Introduction 2 Lossless A/D Conversion 3 Dark Current Cancellation 4 Gain Programmability and Built-in Test 5 Local Bias Generation 6 CMOS Integration and Results 7 Conclusions

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions CMOS Integration I DPS cell layout: Dark current X-ray sensor cancellation bumping pad I Ibias =250nA A/D conversion Local bias (PDM-CTIA) generation I Vref =670mV 20¹m I Cint, Creset/CDS, Cmem and Csamp =100fF I B=(10+1)bit I 40mV<Vth <400mV A/D conversion Gain programming (PDM-control) and built-in test A/D conversion (filter-counter) and digital I/O A/D conversion (PDM-comparator) R. Figueras et al. IMB-CNM(CSIC) and X-Ray Imatek S.L. 17/23

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 18/23 CMOS Integration DPS test oriented circuit: DPS matrix for crosstlak studies 500¹ m DPS single experiments I bias =250nA =670mV C int, C reset/cds, C mem and C samp=100ff B=(10+1)bit 40mV<V th <400mV Single transistor I sens emulators 0.18µm 1P 6M triple-well CMOS technology

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 19/23 Experimental Results PDM transfer function: DPS performance: f pulse [Hz] 10M 1M 100k 10k 1k 100 10 T res =0.4 ¹ s Parameter Value Units Supply voltage 1.8 V Dark current range 0.01 to 20 na Transfer gain <1/50 LSB/ke Equivalent noise charge 1.5 to 18 ke rms Integration time 10 to 1000 ms Output dynamic range 10 bit Crosstalk <0.5 LSB Program-in/read-out speed 50 Mbps Static power consumption 5 µw Bias mismatching (±σ) <10 % Silicon area 100 100 µm 2 1 1p 10p 100p 1n 10n 100n I sens [A]... for V th =0.4V ( 00010010110 ).

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 20/23 Experimental Results Overall transfer function: DPS performance: N pulse [LSB] 10k 1k 100 10 T frame =10ms 1023 Parameter Value Units Supply voltage 1.8 V Dark current range 0.01 to 20 na Transfer gain <1/50 LSB/ke Equivalent noise charge 1.5 to 18 ke rms Integration time 10 to 1000 ms Output dynamic range 10 bit Crosstalk <0.5 LSB Program-in/read-out speed 50 Mbps Static power consumption 5 µw Bias mismatching (±σ) <10 % Silicon area 100 100 µm 2 1 1p 10p 100p 1n 10n I sens [A]... for V th =0.4V ( 00010010110 ).

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 21/23 1 Introduction 2 Lossless A/D Conversion 3 Dark Current Cancellation 4 Gain Programmability and Built-in Test 5 Local Bias Generation 6 CMOS Integration and Results 7 Conclusions

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions 22/23 Conclusions Novel charge-integration DPS for X-ray digital imaging In-pixel lossless A/D conversion Dark current automatic compensation FPN cancellation through digital gain programmability Built-in test capabilities Local analog bias and references for low crosstalk Very low-power CMOS circuits Preliminary test results in 0.18µm 1P 6M triple-well CMOS technology

IEEE BioCAS 2009 Intro ADC Dark Gain Bias Results Conclusions Future Work I Scaling, scaling and scaling! 20¹m 100¹m 100¹m tested 70¹m 70¹m (50%) being integrated 50¹m 50¹m (25%) under development... thanks for your attention. R. Figueras et al. IMB-CNM(CSIC) and X-Ray Imatek S.L. 23/23