Improved SMT Performance of Tantalum Conductive Polymer Capacitors with Very Low ESR

Transcription

1 Imprved SMT Perfrmance f Tantalum Cnductive Plymer Capacitrs with Very Lw ESR Randy Hahn, Jim Piller, and Dr. Philip Lessner KEMET Electrnics Crp PO Bx 5928 Greenville, SC Tel: Fax: [email protected] Abstract KEMET Electrnics Crp has implemented several prcess and material imprvements in rder t imprve the surface munt (SMT) perfrmance f lw ESR cnductive plymer tantalum capacitrs. This includes large case size (up t ) capacitrs with ESR as lw as 5 mω. Six Sigma methdlgies (DMAIC: define-measure-analyze-imprve-cntrl) were used t structure the imprvement prcess. This paper describes the prject gals (define phase), new measurement techniques that had t be develped (measure phase), the cnceptual mdel t explain SMT failures (analyze phase), prcess and material imprvements (imprve phase), and new cntrl measures put in place (cntrl phase). Intrductin Capacitrs serve numerus functins in the electrnic devices n the market tday. These functins include filtering, tuning, energy strage, vltage mdulatin, etc. In many f these applicatins the number f cmpnents required t meet the circuit design criteria is determined by the capacitance and ESR f the capacitr 1. In applicatins such as utput filters n switch mde pwer supplies industry trends tward lwer circuit vltages perated at higher frequencies and higher current demands are driving the demand fr lw ESR, high capacitance cmpnents. Several ther characteristics f the capacitr are imprtant t the circuit designer. High surge currents are inherent in the applicatins which require lw ESR capacitrs. The use f an external resistance placed in series with the capacitr t reduce the surge current is nt an ptin. The capacitr must have the ability t withstand high current surges withut the benefit f resistance added elsewhere in the circuit. Miniaturizatin f electrnic devices, especially in the cnsumer electrnics industry, cntinues unabated. Cmpnents with high vlumetric efficiency are required t cntinue the trend tward smaller, mre highly functinalized lap tps, cell phnes, and ther prtable cmmunicatin devices. Tantalum capacitrs utilizing an intrinsically cnductive plymer as the slid cathde electrlyte prvide lw ESR, high capacitance, vlumetric efficiency, and excellent ability t withstand high surge currents. These capacitrs prvide the lwest cst slutin t meet the design requirements fr several applicatins. Recent Eurpean legislatin (RHS- Restrictin f Hazardus Substances) has fueled the push in the industry fr Pb free cmpnents. Remving the lead frm surface munt tantalum capacitrs was nt a prblem (althugh many high reliability custmers are very cncerned abut the ptential fr tin whiskers with 100% tin cated terminatins). Hwever, in rder t be a Pb free capable device the cmpnent must be able t withstand the higher surface munt temperatures custmers use t attach the cmpnents t bards using Pb free slders. Strategies utilized t manufacture ultra lw ESR tantalum capacitrs have been described previusly 2. In rder t enhance the reliability f lw ESR cnductive plymer tantalum capacitrs during a Pb free slder prcess, Kemet utilized a Six Sigma prcess imprvement methdlgy. This paper describes hw Kemet applied this methdlgy t imprve the SMT perfrmance f cnductive plymer tantalum capacitrs t meet the requirements f a Pb free bard munt prcess. Six Sigma Methd The six sigma prcess imprvement prcess is generally brken dwn int five phases referred t by the acrnym DMAIC: define, measure, analyze, imprve, and cntrl 3. The gals f the prject are specified in the design phase. In the measurement phase existing tls fr measuring key metrics required t achieve the bjectives specified in the define phase are analyzed t insure they are valid and reliable. The existing measurement tls are imprved and new

2 tls develped as needed based n measurement system analysis. In the analyze phase experiments are run t identify ways t eliminate the gap between the current perfrmance and the desired gal. Additinal experiments are run t ptimize the levels f the key factrs impacting perfrmance in the imprve phase. Imprvements t the prcess are institutinalized by incrprating them int perating prcedures, raw material specificatins, cntrl charts, etc. in the cntrl phase. Thrughut the prject statistical tls are used t analyze the data and determine if the differences in the data are real, r can be attributed t randm variatin. Define Phase The vice f the custmer was critical t establishing the gal f the prject. A Quality Functin Deplyment tl (QFD) was used t select the gal. A QFD prvides a structure fr ensuring that custmer s needs and wants are heard, then directly translated int prject gals. Based n the input frm key custmers and distributrs the prject team decided t fcus n eliminating SMT shrts during a Pb free munting prcess. Temperature :00:00 0:00:30 B 0:01:00 A F 0:01:30 0:02:00 0:02:30 Time E C 0:03:00 G D 0:03:30 0:04:00 cverage and SMT perfrmance. This relatinship can easily be demnstrated by intentinally applying thin external cnductive plymer catings t capacitrs and mnitring leakage perfrmance befre and after bard munting. Althugh plymer cverage was knwn t be a critical characteristic impacting SMT perfrmance, n quantitative measure f plymer cverage was knwn. In-huse experts were cnsulted t develp a tl t reliably measure plymer cverage. This tl was critical t the effrt t imprve plymer cverage and ultimately SMT perfrmance. Once a tl fr measuring plymer cverage was develped, measurement system analysis (MSA) was run t insure the new measurement system was adequate. Figure 2. Gage R&R results fr plymer cverage measurement system. Due t the lw ppm failure rate fr SMT shrts, large sample sizes are required t measure SMT perfrmance directly. Since the SMT test is a destructive test (nce parts are munted t a bard they can nt be remved frm the bard and sld t custmers), a methd fr measuring differences in SMT failure rates withut munting was required. A nn-destructive simulated SMT test was develped t allw the prject team t evaluate ptential prcess changes. The simulated SMT test is represented schematically in Figure 1. Figure 1. Pb free munting prfile specificatin. Custmers demand bth lw ESR and high reliability, s ESR perfrmance culd nt be cmprmised. Frm the QFD, the gal f the prject t eliminate SMT shrts frm all f Kemet s cnductive plymer prducts was identified. This includes Kemet s T530 multiple ande series with industry leading ESR levels belw 5 mω, and T520 series f single ande capacitrs with ESR levels as lw as 7 millihms. Frm the varius phases f the QFD, the technical requirements, critical part and prcess characteristics, and prcess cntrl methds were identified t meet the gal. Measure Phase Prir experience with cnductive plymer had demnstrated the relatinship between plymer Screen ut Failures Reflw pass Test parts fr Failures Figure 3. Schematic representatin f simulated SMT test. In rder t accurately simulate bard munting the temperature prfile f the reflw ven is mdified during a simulated SMT test t cmpensate fr the lack f a test bard which acts as a heat sink during actual bard munting. A thermcuple was placed inside the mlded case t measure the temperature f the capacitr within the case during the reflw pass. The reflw ven heaters were adjusted s the capacitr was expsed t the desired temperature prfile. In an effrt t priritize the imprvement effrt a failure site density map was cnstructed during the analyze phase f the prject. The classical methd f leakage failure site identificatin is t strip away the mlded case and apply a negative bias t andes in a dilute slutin f cpper sulfate. Leakage sites are

3 identified by lking fr places where cpper plates nt the ande. Hwever, this methd was fund t be unreliable. A new prcedure was develped t allw the lcatin f failure sites t be identified. The applicatin f a very high current fr sufficient time causes the ande t disclr at the failure site as it heats up due t Jule heating. After stripping away the mlded case the lcatin f the failure site can be identified. A prgram was written t cntrl the vltage applied t a failed part based n the leakage current. The prgram starts at 1 vlt and slwly ramps t the vltage where the current exceeds 3 amps. It hlds fr 5 secnds then discharges. Once discharged, the epxy case, lead frame, and external cathde layers are stripped away using acid slutins revealing the failure site. Figure 4. Picture f Stripped Capacitr Revealing Failure Site at Tp Edge f Ande As will be discussed further in the sectin describing the analyze phase, the leakage site density map indicated the bulk f the failures were lcated n the edges f the andes. T drive the effrt t reduce the sensitivity f the edges f andes t mechanical stress a methd fr measuring edge sensitivity was develped. An apparatus was designed and fabricated t measure the frce applied t the edge f an ande while measuring the leakage f the capacitr. Electrical cntact t the edge f the ande is established thrugh a pad munted at a 45 angle t the edge f the ande as shwn in Figure 4. A predetermined level f frce is applied t the edge f the ande using a Chatilln frce gage. Rated vltage is applied t the ande and the initial DC leakage is read and recrded. The applied vltage is remved frm the ande and the cntacting pad is rubbed acrss the edge f the ande. Rated vltage is again applied t the ande and the DC leakage is recrded. If the leakage is less than that defined as a shrt, the applied frce is increased in predetermined increments. At each new frce setting the leakage is read befre and after the edge is rubbed with the cntacting pad. The frce required t cause the part t shrt is recrded and the data generally pltted n a prbability plt. Figure 5. Prttype Edge Sensitivity Tester A gage R&R study was cnducted t determine if the test was reliable. This study indicated that 5.8% f the variability in test results was due t variatin between successive tests by the same peratr n parts pulled frm the same grup (repeatability). Variatin due t differences between peratrs (reprducibility) accunted fr 0.1% f the variability in the test results. The remaining variability was due t differences between the grups tested. This indicated the edge sensitivity tester culd be used t drive effrts t reduce the susceptibility f parts t therm-mechanical stress n the edges f the ande.

4 Figure 6. Results f gage R&R study n prttype edge sensitivity tester. Analyze Phase The gal f the analyze phase was t develp a cnceptual mdel t describe the mechanism respnsible fr SMT shrts and highlight pprtunities fr imprvement in the imprve phase f the prject. Therm-mechanical stresses resulting frm differences in cefficients f thermal expansin f the varius materials used in the cnstructin f a tantalum capacitr have lng been pstulated as the cause f leakage failures at SMT 4. In rder t demnstrate the rle therm-mechanical stress plays in SMT leakage failures, an experiment was run during the develpment f a new part type. This part type was a particularly challenging part type due t several factrs including the vltage rating, ESR specificatin, CV, and gemetric requirements. The SMT failure rate at this stage in the develpment prcess was still quite high (>1000 ppm). Leakage was measured n a batch f parts prir t encapsulatin f the ande in a mlded case. The batch was passed thrugh a reflw ven and leakage was read again. Virtually n change in leakage ccurred as a result f the reflw pass. The batch was then prcessed thrugh the encapsulatin and aging prcesses. The parts were screened t ensure any leakage failures incurred as a result f the encapsulatin prcess were remved. Fllwing the screening prcess the batch was sent back thrugh a reflw ven. During the pst reflw leakage screen several failures were detected. CTE (ppm/ C) Epxy Ta ande Alpha Alpha Table 1. Typical cefficients f thermal expansin fr a tantalum ande and mld epxy used t encapsulate surface munt capacitrs. Jhn Prymak hypthesized that the mismatch in cefficients f thermal expansin (CTE) between the epxy mlded case and the tantalum ande culd result in therm-mechanical stress n the ande during the cl dwn phase f SMT 5. In rder t cnfirm Jhn s hypthesis a series f experiments were run during which leakage current and temperature were read as capacitrs traveled thrugh a reflw ven setup with a Pb free munting prfile. A thermcuple placed in a slder jint n a surface munt test bard was cnnected t a data lgger which recrded the temperature during the reflw pass. A very high temperature slder was used s that the slder wuld nt reflw during the reflw pass. Half rated vltage was applied t singulated capacitrs n a lead frame strip by attaching clips t the lead frame and running cnnecting wires t a pwer supply. The leakage current was recrded by measuring the vltage drp acrss a 1K Ω resistr in series with the strip and pwer supply as the strip f parts and surface munt test bard were passed thrugh the reflw ven simultaneusly. A plt f leakage versus temperature fr the majrity f parts exhibits an expnential crrelatin as shwn in Figure 7a. Figure 7b is a plt f a capacitr which failed during the test. Althugh very few capacitrs failed during these tests, all failures which did ccur, failed during the cl dwn phase f the reflw pass. These results cnfirm the hypthesis that CTE mismatches in the cnstructin f a tantalum capacitr play in SMT leakage failures. The team cncluded that a lw CTE mld epxy was needed t reduce these failures. During the imprve phase the team wrked clsely with an epxy supplier t develp a frmulatin suitable fr this applicatin. Figure 7. Plt f leakage versus temperature during heat up f a typical part shwing expnential crrelatin (a) and leakage versus temperature f a part that failed during the cl dwn after reflw (b).

5 In rder t gain an understanding f ther factrs that might cntribute t SMT shrts, SMT failures generated during in-line testing are rutinely submitted fr failure analysis. One element f the failure analysis was t determine the lcatin n the ande f the failure sites. As described in the measure phase a methd was develped t allw the team t determine the lcatin f failure sites n the ande. Infrmatin frm the failure site analysis is stred in a database. In additin t dcumenting the lcatin f the failure site the database cntains infrmatin n part type, lt number, and critical prcess and material set infrmatin. Analysis f the data in the failure site database allwed the team t cnstruct a failure site density map. The failure site density map indicated the majrity f failures ccurred n the edges and crners f the ande. This finding is cnsistent with the rle that CTE mismatches play in SMT leakage failures, since the greatest stress during thermally induced expansin and cntractin ccurs n crners and edges. In additin t reducing the stress n the edges by reducing the mismatch in cefficients f thermal expansin f the ande and mlded case, this analysis highlighted the need t reduce the sensitivity t stress n the edges thrugh material and prcess imprvements during the imprve phase f the prject. Figure 8. Example f a failure site density map fr SMT shrts. Red indicates areas f high failure density n bttm crners; yellw mderate failure density n side edges; green lw failure density. An imprtant characteristic f the intrinsically cnductive plymer, which serves as the primary cathde material in ultra lw ESR slid electrlytic capacitrs, is the ability t transfrm t a less cnductive state in the vicinity f a leakage site due t Jule heating. This characteristic f the intrinsically cnductive plymer is respnsible fr the healing mechanism f these capacitrs. The carbn and silver cntained in the subsequent layers f a tantalum capacitr cnstructin d nt psses this prperty. If the carbn r silver cme in cntact with the dielectric the capacitr will be a shrt. A thin r prus primary cathde layer can allw carbn r silver t penetrate t the dielectric layer as these layers mve due t expansin and cntractin during the SMT prcess. In rder t demnstrate that a thin cnductive plymer layer can result in an increase in shrts at SMT the standard prcess was mdified t generate parts with reduced levels f external plymer buildup and prcessed thrugh a simulated SMT prcess as described previusly. The results frm this experiment are pltted in Figure 9. Figure 9. Plt f SMT shrts versus plymer buildup In rder t better understand the surces f variatin in plymer cverage a cmpnents f variatin (COV) study was cnducted. The initial study determined the relative imprtance f variatin: between ande lts within ande lts between frmatin lts between cnductive plymer lts within cnductive plymer lts. Fllw-up COV experiments further narrwed the surce f variatin in plymer cverage t specific steps in the manufacturing prcess. Cmprehensive prcess maps f these steps were generated t assist in the identificatin f pssible factrs t be cnsidered during the imprve phase f the prject. Imprve Phase The analyze phase f the prject pinted t several pprtunities t imprve the SMT perfrmance f Kemet s lw ESR cnductive plymer prducts: Optimize the ande design t better withstand the therm-mechanical stress f SMT Imprve the plymer cverage Reduce variatin in plymer cverage Develp materials and prcesses t reduce the susceptibility f the edge f the ande t therm-mechanical stress Reduce therm-mechanical stress n the ande by mre clsely matching the CTE f the tantalum ande and the mlding epxy used t encapsulate the ande Implement an in-line Pb free reflw prfile t pre-stress capacitrs The analyze and measure phases f the prject laid the fundatin fr imprving plymer cverage in the imprve phase. The prcess maps and QFD helped investigatrs select factrs t be investigated further in

6 a series f designed experiments (DOE). The ability t quantify plymer cverage allwed the results f the DOE s t be analyzed bjectively using a statistical analysis sftware prgram. As a result f these experiments several prcess mdificatins were identified which resulted in imprved plymer cverage. withut degrading ESR perfrmance. A series f DOE s were run t investigate resin chemistry, resin t cnductive filler ratis, cnductive filler particle size distributins, etc. As a result f these DOE s new carbn and silver frmulatins were develped with reduced edge sensitivity and lwer ESR fllwing Pb free munting prfiles. Hypthesis testing was emplyed t demnstrate the differences in perfrmance between the ld and new carbn and silver frmulatins were statistically significant. Figure 10. Prbability plt f plymer cverage befre and after imprvements In additin t identifying prcess factrs t be cnsidered in rder t imprve plymer cverage, the prcess maps develped during the analyze phase identified key raw material characteristics t be investigated. Althugh all f the materials were within the raw material specificatins, a cntrl chart f the variability f a critical raw material characteristic revealed the presence f nn-randm variatin in incming lts f material. The raw material supplier was cntacted and infrmatin requested regarding the capability f their manufacturing prcess. These discussins led t a new, tighter raw material specificatin based n the capabilities f the supplier s manufacturing prcess. Other characteristics f the raw material specificatin were reviewed and tightened based n the supplier s prcess capability. Figure 11. Cntrl chart f critical raw material characteristic indicating the presence f nn-randm variatin. The team wrked clsely with raw material suppliers t develp new carbn and silver frmulatins t imprve the edge sensitivity f cnductive plymer capacitrs Figure 12. Edge sensitivity prbability plt fr imprved carbn/silver frmulatin The team als wrked clsely with the supplier f epxy mlding cmpund t develp a lw CTE frmulatin suitable fr this applicatin. Althugh experiments in the analyze phase had indicated that mismatches in cefficients f thermal expansin between the varius elements f the capacitr were respnsible fr SMT leakage failures, several ther factrs must be cnsidered when refrmulating the mlding cmpund. These factrs include glass transitin temperature, misture adsrptin characteristics, shrinkage, shelf life, cst, printability, lead frame adhesin, and clr t name a few. The results f designed experiments were statistically analyzed and prcess factrs mst critical t cnsistent high quality mld epxy were identified. Cntrl charts f critical characteristics were established and mnitred t ensure cnsistent prduct was manufactured. Slid electrlytic capacitrs are typically subjected t an in-line reflw pass t pre-stress the andes prir t the final custmer packaging peratins. In rder t meet the new lead free requirements these in-line reflw prfiles had t be mdified t crrespnd t a lead free prfile. Material and prcess imprvements were required t minimize the ESR shift during the higher in-line reflw pass. As a result f the wrk f the Six Sigma SMT Imprvement team and the ESR reductin team a 10 fld reductin in SMT shrts was achieved while cntinuing t drive ESR fr single ande capacitrs belw 7 mω.

7 Figure 14. Cntrl chart f plymer cverage. Figure 13. Imprvement in SMT perfrmance Cntrl Phase The SMT Imprvement Team cntinues t utilize Six Sigma tls t further reduce SMT shrts as part f Kemet s cmmitment t cntinuus quality imprvement. Hwever, it was vital that the imprvements already realized were incrprated int perating prcedures, raw material specificatins, cntrl charts, etc. Raw material specificatins f all critical characteristics have been reviewed and the raw material specificatin mdified based n the suppliers prcess capability. Prcess imprvements have been incrprated in perating prcedures and training prgrams. Internal reprts have been written t dcument the wrk carried ut by the team. These reprts dcument bth what has been learned and the limitatins f what has been learned, t serve as the basis fr further imprvements. Cntrl charts f critical prcess characteristics have been established, bth internally and by raw material suppliers. In mst cases these cntrl charts track characteristics whse impact n SMT perfrmance was nt previusly recgnized r which culd nt previusly be quantified. Cnclusins KEMET Electrnics Crp has utilized Six Sigma imprvement methdlgies t reduce SMT shrts by an rder t magnitude. Only 2 r 3 tantalum capacitr manufacturers in the wrld have the technlgy required t prduce capacitrs with single digit ESR levels, leading edge cap and vltage ratings, and utstanding SMT perfrmance. Thrugh the use f Six Sigma methdlgies Kemet intends t remain a technlgy leader in these areas. References 1. E. K. Reed, J. C. Marshall, and Jhn Prymak, Lwest ESR Tantalum Chip Capacitr, Prceedings f the 18 th Capacitr and Resistr Technlgy Sympsium, p. 22 (1998) 2. R. Hahn and K. Pritchard, Strategies fr Manufacturing Ultra Lw ESR Ta Capacitrs, Prceedings f the 18 th Eurpean Capacitr and Resistr Technlgy Sympsium, p. 166 (2004) 3. T. Pyzdek, Six Sigma Handbk McGraw- Hill Cmpany, D. M. Edsn and J. B. Frtin, Imprving Thermal Shck Resistance f Surface Munt Tantalum Capacitrs, Prceedings f the 14 th Capacitr and Resistr Technlgy Sympsium, p. 169 (1994) 5. J. Prymak, Pwer-On Failures in Tantalum and Aluminum SMT Capacitrs, Prceedings f the 22 nd Capacitr and Resistr Technlgy Sympsium, (2002)