Ultra Low Noise, Precision Voltage Reference

Transcription

1 Ultra Low Noise, Precision Voltage Reference ISL9 The ISL9 is a ultra low noise, high DC accuracy precision voltage reference with wide input voltage range. The ISL9 uses the new Intersil Advanced Bipolar technology to achieve sub.µv P-P (.5V option).hz to Hz noise with an initial voltage accuracy of.% (.5V option). The ISL9 offers.5v,.5v, 5.V and 7.5V output voltage options with 7ppm/ C temperature coefficient and also provides excellent line and load regulation. These devices are offered in an 8 Ld SOIC package. The ISL9 is ideal for high-end instrumentation, data acquisition and processing applications requiring high DC precision where low noise performance is critical. Applications High-end instrumentation Precision voltage sources for data acquisition system, industrial control, communication infrastructure Process control and instrumentations Active source for sensors Features Reference output voltage option -.5V,.5V, 5.V and 7.5V Initial accuracy: - ISL ±.% - ISL ±.% - ISL ±.5% - ISL ±.5% Output voltage noise (.Hz to Hz) µV P-P typ (.5V option) Supply current µA (.5V option) Temperature coefficient ppm/ C max Output current capability ma Line regulation ppm/v (.5V option) Load regulation ppm/ma (.5V option) Operating temperature range C to Related Literature See AN7, ISL9XXEVZ User s Guide VIN µf.µf DNC VIN COMP GND DNC DNC VOUT TRIM VREF.µF TYPICAL TEMPERATURE COEFFICIENT CURVE FOR UNITS SERIAL CLOCK CHIP SELECT VDD SCLK CSb VREF OUTxS OUTxF DACOUTx SERIAL DATA I/O SDIO DAC GND TEMPERATURE ( C) FIGURE. ISL9 TYPICAL APPLICATION DIAGRAM FIGURE. V OUT vs TEMPERATURE (.5V OPTION) February 7, FN99.5 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures INTERSIL or Copyright Intersil Americas LLC -. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners.

2 ISL9 Pin Configuration ISL9 (8 LD SOIC) TOP VIEW DNC DNC 8 VIN DNC 7 COMP VOUT GND TRIM 5 Pin Descriptions PIN NUMBER PIN NAME DESCRIPTION, 7, 8 DNC Do Not Connect VIN Input Voltage Connection COMP Compensation and Noise Reduction Capacitor GND Ground Connection 5 TRIM Voltage Reference Trim input VOUT Voltage Reference Output Ordering Information PART NUMBER (Notes,, ) PART MARKING V OUT OPTION (V) GRADE (%) TEMPCO (ppm/ C) TEMP RANGE ( C) PACKAGE TAPE & REEL (Pb-Free) PKG. DWG. # ISL9BFB8Z-TK 9 BFZ to +5 8 Ld SOIC M8.5E ISL9BFB85Z-TK 9 BFZ to +5 8 Ld SOIC M8.5E ISL9BFB85Z-TK 9 BFZ to +5 8 Ld SOIC M8.5E ISL9BFB875Z-TK 9 BFZ to +5 8 Ld SOIC M8.5E NOTES:. Please refer to TB7 for details on reel specifications.. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and % matte tin plate plus anneal (e termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-.. For Moisture Sensitivity Level (MSL), please see device information page for ISL9B, ISL9B5, ISL9B5, ISL9B75. For more information on MSL please see Tech Brief TB. FN99.5 February 7,

3 ISL9 Absolute Maximum Ratings Max Voltage V IN to GND V to +V V OUT to GND (s) v to V OUT +.5V Voltage on any Pin to Ground V to +V OUT +.5V Voltage on DNC pins No connections permitted to these pins Input Voltage Slew Rate (Max) V/µs ESD Ratings Human Body Model (Tested per JESD-AF) kv Machine Model (Tested per JESD-A5-C) V Charged Device Model (Tested per JESD-CD) kv Latch-up (Tested per JESD-78B; Class, Level A) at Thermal Information Thermal Resistance (Typical) θ JA ( C/W) θ JC ( C/W) 8 Ld SOIC Package (Notes, 5) Continuous Power Dissipation (T A = ) mW Maximum Junction Temperature (T JMAX ) C Storage Temperature Range C to +5 C Recommended Operating Conditions Temperature Range (Industrial) C to CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES:. θ JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB79 for details. 5. For θ JC, the case temp location is taken at the package top center.. Post-reflow drift for the ISL9 devices can exceed µv to.mv based on experimental results with devices on FR double sided boards. The system engineer must take this into account when considering the reference voltage after assembly. Electrical Specifications V IN = 5V (.5V option), I OUT =, C L =.µf and C C =.µf, unless otherwise specified. Boldface limits apply over the operating temperature range, - C to. PARAMETER DESCRIPTION CONDITIONS MIN (Note 7) TYP MAX (Note 7) UNIT V OUT Output Voltage V IN = 5V,.5 V V OA V OUT T A = (Note ) V OUT =.5V % TC V OUT Output Voltage Temperature Coefficient (Note 8) ISL9 B grade 7 ppm/ C V IN Input Voltage Range V OUT =.5V.7 V I IN Supply Current.75.8 ma ΔV OUT /ΔV IN Line Regulation V IN =.7V to V, V OUT =.5V 7 ppm/v ΔV OUT /ΔI OUT Load Regulation Sourcing: ma I OUT ma.5 7 ppm/ma V D Dropout Voltage (Note 9) V OUT ma.7.5 V I SC+ Short Circuit Current T A =, V OUT tied to GND 5 ma t R Turn-on Settling Time 9% of final value, C L =.µf, C C = open 5 µs Ripple Rejection f = Hz 9 db e np-p Voltage Noise.Hz f Hz, V OUT =.5V. µv P-P V n Broadband Voltage Noise Hz f khz, V OUT =.5V. µv RMS e n Noise Voltage Density f = khz, V OUT =.5V 5 nv/ Hz ΔV OUT /Δt Long Term Stability T A = ppm FN99.5 February 7,

4 ISL9 Electrical Specifications V IN = 5V (.5V option), I OUT = unless otherwise specified. Boldface limits apply over the operating temperature range, - C to. PARAMETER DESCRIPTION CONDITIONS MIN (Note 7) TYP MAX (Note 7) UNIT V OUT Output Voltage V IN = 5V.5 V V OA V OUT T A = All V OUT options % TC V OUT Output Voltage Temperature Coefficient ISL9 B grade 7 ppm/ C V IN Input Voltage Range V OUT =.5V.7 V I IN Supply Current.9.8 ma ΔV OUT /ΔV IN Line Regulation V IN =.7V to V, V OUT =.5V 8 8 ppm/v ΔV OUT /ΔI OUT Load Regulation Sourcing: ma I OUT ma.5 7 ppm/ma Sinking: -ma I OUT ma.5 7 ppm/ma V D Dropout Voltage (Note 9) V OUT ma..7 V I SC+ Short Circuit Current T A =, V OUT tied to GND 55 ma I SC- Short Circuit Current T A =, V OUT tied to V IN - ma t R Turn-on Settling Time 9% of final value, C L =.µf, C C = open 5 µs Ripple Rejection f = Hz 9 db e np-p Noise Voltage.Hz f Hz, V OUT =.5V.9 µv P-P V n Broadband Voltage Noise Hz f khz, V OUT =.5V. µv RMS e n Noise Voltage Density f = khz, V OUT =.5V 5 nv/ Hz ΔV OUT /Δt Long Term Stability T A = ppm Electrical Specifications V IN = V (5.V option), I OUT = unless otherwise specified. Boldface limits apply over the operating temperature range, - C to. PARAMETER DESCRIPTION CONDITIONS MIN (Note 7) TYP MAX (Note 7) UNIT V OUT Output Voltage V IN = V, 5. V V OA V OUT T A = (Note ) V OUT = 5.V.5.5 % TC V OUT Output Voltage Temperature Coefficient (Note 8) ISL9 B grade 7 ppm/ C V IN Input Voltage Range V OUT = 5.V 7 V I IN Supply Current.9. ma ΔV OUT /ΔV IN Line Regulation V IN = 7V to V, V OUT = 5.V 8 8 ppm/v ΔV OUT /ΔI OUT Load Regulation Sourcing: ma I OUT ma.5 7 ppm/ma Sinking: -ma I OUT ma.5 7 ppm/ma V D Dropout Voltage (Note 9) V OUT = ma..7 V I SC+ Short Circuit Current T A =, V OUT tied to GND ma I SC- Short Circuit Current T A =, V OUT tied to V IN -75 ma t R Turn-on Settling Time 9% of final value, C L =.µf, C C = open 5 µs Ripple Rejection f = Hz 9 db e np-p Output Voltage Noise.Hz f Hz, V OUT = 5.V. µv P-P V n Broadband Voltage Noise Hz f khz, V OUT = 5.V. µv RMS e n Noise Voltage Density f = khz, V OUT = 5.V nv/ Hz ΔV OUT /Δt Long Term Stability T A = ppm FN99.5 February 7,

5 ISL9 Electrical Specifications V IN = 5V (7.5V option), I OUT = unless otherwise specified. Boldface limits apply over the operating temperature range, - C to. PARAMETER DESCRIPTION CONDITIONS MIN (Note 7) TYP MAX (Note 7) UNIT V OUT Output Voltage V IN = 5V, 7.5 V V OA V OUT T A = (Note ) V OUT = 7.5V.5.5 % TC V OUT Output Voltage Temperature Coefficient (Note 8) ISL9 B grade 7 ppm/ C V IN Input Voltage Range V OUT = 7.5V 9 V I IN Supply Current.9. ma ΔV OUT /ΔV IN Line Regulation V IN = 9V to V, V OUT = 7.5V. 8 ppm/v ΔV OUT /ΔI OUT Load Regulation Sourcing: ma I OUT ma.5 7 ppm/ma Sinking: -ma I OUT ma 9 7 ppm/ma V D Dropout Voltage (Note 9) V OUT = ma..8 V I SC+ Short Circuit Current T A =, V OUT tied to GND 5 ma I SC- Short Circuit Current T A =, V OUT tied to V IN -9 ma t R Turn-on Settling Time 9% of final value, C L =.µf, C C = open 5 µs Ripple Rejection f = Hz 9 db e np-p Output Voltage Noise.Hz f Hz, V OUT = 7.5V. µv P-P V n Broadband Voltage Noise Hz f khz, V OUT = 7.5V.8 µv RMS e n Noise Voltage Density f = khz, V OUT = 7.5V 5 nv/ Hz ΔV OUT /Δt Long Term Stability T A = ppm NOTES: 7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 8. Over the specified temperature range. Temperature coefficient is measured by the box method whereby the change in V OUT is divided by the temperature range; in this case, - C to = +5 C. 9. Dropout Voltage is the minimum V IN - V OUT differential voltage measured at the point where V OUT drops mv from V IN = nominal at T A =. 5 FN99.5 February 7,

6 I IN (µa) I IN (µa) ISL9 Typical Performance Curves (ISL9-.5V) UNIT 75 UNIT 7 UNIT FIGURE. I IN vs V IN, THREE UNITS C FIGURE. I IN vs V IN, THREE TEMPERATURES UNIT.5 UNIT.99 UNIT FIGURE 5. LINE REGULATION, THREE UNITS C FIGURE. LINE REGULATION, THREE TEMPERATURES C L = nf C L = nf FIGURE 7. LINE TRANSIENT WITH nf LOAD (ΔV IN = ±5mV) FIGURE 8. LINE TRANSIENT WITH nf LOAD (ΔV IN = ±5mV) FN99.5 February 7,

7 Z OUT (Ω) ISL9 Typical Performance Curves (ISL9-.5V) (Continued) ΔV OUT (PPM) C SOURCING I LOAD (ma) FIGURE 9. LOAD REGULATION, THREE TEMPERATURE nf µf FIGURE. LOAD TRANSIENT (ΔI LOAD = ±ma) 5 5 V IN V IN C L =.µf C L = µf FIGURE. TURN ON TIME WITH.µF FIGURE. TURN ON TIME WITH µf C L = nf C L = nf - nf -.. C L = µf PSRR (db) - -8 µf. C L = µf C L = nf. k k k M M FREQUENCY (Hz) FIGURE. Z OUT vs FREQUENCY (COMP =.µf) - - k k k M M FREQUENCY (Hz) FIGURE. PSRR AT DIFFERENT CAPACITIVE LOADS 7 FN99.5 February 7,

8 ISL9 Typical Performance Curves (ISL9-.5V) (Continued) - -5 X = s/div Y =.5µV/DIV CURRENT (ma) C FIGURE 5. SHORT CIRCUIT TO GND FIGURE. V OUT vs NOISE,.Hz TO Hz C C FIGURE 7. DROPOUT WITH -ma LOAD 8 FN99.5 February 7,

9 I IN (µa) I IN (µa) ISL9 Typical Performance Curves (ISL9-.5) 98 UNIT 9 9 UNIT 9 9 UNIT FIGURE 8. I IN vs V IN, THREE UNITS C FIGURE 9. I IN vs V IN, THREE TEMPERATURES UNIT UNIT UNIT C FIGURE. LINE REGULATION, THREE UNITS FIGURE. LINE REGULATION, THREE TEMPERATURES - - C L = nf - - C L = nf FIGURE. LINE TRANSIENT WITH nf LOAD (ΔV IN = ±5mV) FIGURE. LINE TRANSIENT WITH nf LOAD (ΔV IN = ±5mV) 9 FN99.5 February 7,

10 ISL9 Typical Performance Curves (ISL9-.5) (Continued) 8 ΔV OUT (PPM) C - C L = NO LOAD C L = nf C L = µf (SOURCING) I LOAD (ma) (SINKING) FIGURE. LOAD REGULATION, THREE TEMPERATURES - 8 FIGURE 5. LOAD TRANSIENT (ΔI LOAD = ±ma) 5 5 V IN V IN C L =.µf C L = µf FIGURE. TURN-ON TIME WITH.µF FIGURE 7. TURN-ON TIME WITH µf Z OUT (Ω). C L = nf. k k k M M FREQUENCY (Hz) FIGURE 8. Z OUT vs FREQUENCY C L = NO LOAD C L = nf C L = nf PSRR (db) - C - L = nf - C L = nf C L = nf C L = NO LOAD - k k k M M FREQUENCY (Hz) FIGURE 9. PSRR AT DIFFERENT CAPACITIVE LOADS FN99.5 February 7,

11 PPM ISL9 Typical Performance Curves (ISL9-.5) (Continued) C CURRENT (ma) C CURRENT (ma) FIGURE. SHORT-CIRCUIT TO GND FIGURE. SHORT-CIRCUIT TO V IN.5.55 TYPICAL TEMPERATURE COEFFICIENT CURVE FOR UNITS X = s/div Y = µv/div TEMPERATURE ( C) FIGURE. V OUT vs TEMPERATURE, UNITS FIGURE. V OUT vs NOISE,.Hz TO Hz C - C FIGURE. DROPOUT WITH -ma LOAD TIME (Hrs) FIGURE 5. LONG TERM STABILITY FN99.5 February 7,

12 ISL9 Typical Performance Curves (ISL9-5.) 5 UNIT I IN (µa) 5 UNIT 95 9 UNIT FIGURE. I IN vs V IN, THREE UNITS I IN (µa) C FIGURE 7. I IN vs V IN, THREE TEMPERATURES UNIT UNIT UNIT C FIGURE 8. LINE REGULATION, THREE UNITS FIGURE 9. LINE REGULATION, THREE TEMPERATURES - C L = nf - C L = nf FIGURE. LINE TRANSIENT WITH nf LOAD (ΔV IN = ±5mV) FIGURE. LINE TRANSIENT WITH nf LOAD (ΔV IN = ±5mV) FN99.5 February 7,

13 ISL9 Typical Performance Curves (ISL9-5.) (Continued) ΔV OUT (PPM) C (SOURCING) I LOAD (ma) (SINKING) FIGURE. LOAD REGULATION, THREE TEMPERATURES C L = nf C L = µf 8 8 FIGURE. LOAD TRANSIENT (ΔI LOAD = ±ma) 8 V IN 8 V IN C L =.µf C L = µf FIGURE. TURN-ON TIME WITH.µF FIGURE 5. TURN-ON TIME WITH µf Z OUT (Ω). C L = nf C L = C L = nf C L = nf PSRR (db) C L = nf C L = C L = nf C L = nf. k k k M M FREQUENCY (Hz) FIGURE. Z OUT vs FREQUENCY - k k k M M FREQUENCY (Hz) FIGURE 7. PSRR AT DIFFERENT CAPACITIVE LOADS FN99.5 February 7,

14 ISL9 Typical Performance Curves (ISL9-5.) (Continued) CURRENT (ma) C FIGURE 8. SHORT-CIRCUIT TO GND CURRENT (ma) C FIGURE 9. SHORT-CIRCUIT TO V IN OUTPUT NOISE VOLTAGE (µv) TIME (s) C FIGURE 5. V OUT vs NOISE,.Hz TO Hz FIGURE 5. DROPOUT WITH -ma LOAD FN99.5 February 7,

15 ISL9 Typical Performance Curves (ISL9-7.5) I IN (ma).. UNIT. UNIT. 9. UNIT FIGURE 5. I IN vs V IN, THREE UNITS I IN (ma) C FIGURE 5. I IN vs V IN, THREE TEMPERATURES ΔV OUT (PPM) UNIT - UNIT UNIT FIGURE 5. LINE REGULATION, THREE UNITS ΔV OUT (PPM) C FIGURE 55. LINE REGULATION, THREE TEMPERATURES - - C L = nf - - C L = nf FIGURE 5. LINE TRANSIENT WITH nf LOAD (ΔV IN = ±5mV) FIGURE 57. LINE TRANSIENT WITH nf LOAD (ΔV IN = ±5mV) 5 FN99.5 February 7,

16 ISL9 Typical Performance Curves (ISL9-7.5) (Continued) ΔV OUT (PPM) C (SOURCING) I LOAD (ma) (SINKING) FIGURE 58. LOAD REGULATION, THREE TEMPERATURES C L = nf C L = µf 8 8 FIGURE 59. LOAD TRANSIENT (ΔI LOAD = ±ma) 8 V IN 8 C L =.µf V IN 8 C L = µf FIGURE. TURN-ON TIME WITH.µF FIGURE. TURN-ON TIME WITH µf Z OUT (Ω). C L = C L = nf C L = nf C L = nf PSRR (db) C L = C L = nf C L = nf C L = nf. K K K M M FREQUENCY (Hz) FIGURE. Z OUT vs FREQUENCY - K K K M M FREQUENCY (Hz) FIGURE. PSRR AT DIFFERENT CAPACITIVE LOADS FN99.5 February 7,

17 ISL9 Typical Performance Curves (ISL9-7.5) (Continued) CURRENT(mA) C FIGURE. SHORT-CIRCUIT TO GND CURRENT (ma) 9 - C FIGURE 5. SHORT-CIRCUIT TO V IN OUTPUT NOISE VOLTAGE (µv) TIME (s) FIGURE. V OUT vs NOISE,.Hz TO Hz C FIGURE 7. DROPOUT WITH -ma LOAD 7 FN99.5 February 7,

18 ISL9 Device Operation Precision Bandgap Reference The ISL9 uses a bandgap architecture and special trimming circuitry to produce a temperature compensated, precision voltage reference with high input voltage capability and moderate output current drive. Low noise performance is achieved using optimized biasing techniques. Key features for precision low noise portable applications, such as handheld meters and instruments, are supply current (9µA) and noise (.Hz to Hz bandwidth).µv P-P to.µv P-P. Data Converters in particular can utilize the ISL9 as an external voltage reference. Low power DAC and ADC circuits will realize maximum resolution with lowest noise. The device maintains output voltage during conversion cycles with fast response, although it is helpful to add an output capacitor, typically μf. In the case of the.5v option, a.µf capacitor must be added to the COMP (pin ) for stabilization purposes, and a minimum of.µf capacitor must be added at the output. Applications Information Board Mounting Considerations For applications requiring the highest accuracy, the board mounting location should be reviewed. The device uses a plastic SOIC package, which subjects the die to mild stresses when the printed circuit (PC) board is heated and cooled, which slightly changes the shape. Because of these die stresses, placing the device in areas subject to slight twisting can cause degradation of reference voltage accuracy. It is normally best to place the device near the edge of a board, or on the shortest side, because the axis of bending is most limited in that location. Mounting the device in a cutout also minimizes flex. Obviously, mounting the device on flexprint or extremely thin PC material will likewise cause loss of reference accuracy. Board Assembly Considerations Some PC board assembly precautions are necessary. Normal output voltage shifts of µv to 5µV can be expected with Pb-free reflow profiles or wave solder on multi-layer FR PC boards. Precautions should be taken to avoid excessive heat or extended exposure to high reflow or wave solder temperatures. Noise Performance and Reduction The output noise voltage in a.hz to Hz bandwidth is typically.9µv P-P (V OUT =.5V). The noise measurement is made with a bandpass filter. The filter is made of a -pole high-pass filter, with a corner frequency at.hz, and a -pole low-pass filter, with a corner frequency (db) at 9.9Hz, to create a filter with a 9.9Hz bandwidth. Noise in the Hz to khz bandwidth is approximately.µv RMS (V OUT =.5V), with.µf capacitance on the output. This noise measurement is made with a decade bandpass filter. The filter is made of a -pole high-pass filter with a corner frequency at Hz of the center frequency, and -pole low-pass filter with a corner frequency at khz. Load capacitance up to µf can be added but will result in only marginal improvements in output noise and transient response. Turn-On Time Normal turn-on time is typically 5µs, as shown in Figure 7. The circuit designer must take this into account when looking at power-up delays or sequencing. Temperature Coefficient The limits stated for temperature coefficient (Tempco) are governed by the method of measurement. The overwhelming standard for specifying the temperature drift of a reference is to measure the reference voltage at two temperatures, take the total variation, (V HIGH V LOW ), and divide by the temperature extremes of measurement (T HIGH T LOW ). The result is divided by the nominal reference voltage (at T = ) and multiplied by to yield ppm/ C. This is the Box method for specifying temperature coefficient. Output Voltage Adjustment The output voltage can be adjusted above and below the factory-calibrated value via the trim terminal. The trim terminal is the negative feedback divider point of the output op amp. The positive input of the amplifier is about.v, and in feedback, so will be the trim voltage. The trim terminal has a 5Ω resistor to ground internally, and in the case of the.5v output version, there is a feedback resistor of approximately 5Ω from V OUT to trim. The suggested method to adjust the output is to connect a very high value external resistor directly to the trim terminal and connect the other end to the wiper of a potentiometer that has a much lower total resistance and whose outer terminals connect to V OUT and ground. If a MΩ resistor is connected to trim, the output adjust range will be ±.mv. It is important to minimize the capacitance on the trim terminal to preserve output amplifier stability. It is also best to connect the series resistor directly to the trim terminal, to minimize that capacitance and also to minimize noise injection. Small trim adjustments will not disturb the factory-set temperature coefficient of the reference, but trimming near the extreme values can. 8 FN99.5 February 7,

19 Revision History ISL9 The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest revision. DATE REVISION CHANGE February, FN99.5 Electrical Spec Table on page - Noise Voltage Density changed Typ from 5. to 5 Removed Sinking: -ma I OUT ma and ISC- Short Circuit Current Added Long Term Stability to options.5v, 5V and 7.5V on pages and 5 Updated Figure 9 on page 7 by removing I LOAD (ma) and Sinking and x-axis numbering changed from -5 to 5 to -5 to. Removed Figure which was titled Short Circuit to V IN January 9, FN99. Added 7.5V option to Ordering Information table on page. Added 7.5V option Electrical Specifications table to page 5. Added 7.5V Typical Performance Curves section on page 5. August, FN99. Added 5.V option Typical Performance Curves table to page. Removed 7.5V and V option Electrical Specs May, FN99. Added 5.V option Electrical Specifications table to page 5. Added 7.5V option Electrical Specifications table to page 5. Added.V option Electrical Specifications table to page 5. March 5, FN99. Added.5V option Electrical Specifications table to page. Added.5V Typical Performance Curves section on page. Changed MIN limit for V IN.5V option on page. June 8, FN99. Initial Release About Intersil Intersil Corporation is a leader in the design and manufacture of high-performance analog, mixed-signal and power management semiconductors. The company's products address some of the fastest growing markets within the industrial and infrastructure, personal computing and high-end consumer markets. For more information about Intersil or to find out how to become a member of our winning team, visit our website and career page at For a complete listing of Applications, Related Documentation and Related Parts, please see the respective product information page. Also, please check the product information page to ensure that you have the most updated datasheet: ISL9B, ISL9B5, ISL9B5, ISL9B75 To report errors or suggestions for this datasheet, please go to: Reliability reports are available from our website at: For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO9 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see 9 FN99.5 February 7,

20 Package Outline Drawing M8.5E 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev, 8/9 ISL9.9 ±. A DETAIL "A". ±. B. ±..9 ±. PIN NO. ID MARK 5.7. ±.7 (.5) x 5 ± TOP VIEW.5 MCA B SIDE VIEW B.75 MAX.5 ±..75 ±.75 SIDE VIEW A.5 GAUGE PLANE C SEATING PLANE. C. ±. (.7) (.) DETAIL "A" (.5) NOTES:. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. (5.) Dimensioning and tolerancing conform to AMSE Y.5m-99. Unless otherwise specified, tolerance : Decimal ±.5 Dimension does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed.5mm per side. The pin # identifier may be either a mold or mark feature. Reference to JEDEC MS-. TYPICAL RECOMMENDED LAND PATTERN FN99.5 February 7,