Technical Workbook for AIC

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1 Technical Workbook for AIC Rev.03 L.4 Division September, 203

2 Legal Disclaimer Information in this presentation is provided in connection with Seoul Semiconductor products and/or business operation. While Seoul Semiconductor has made every attempt to ensure that the information contained in this presentation has been obtained from reliable sources, Seoul Semiconductor is not responsible for any errors or omissions, or for the results obtained from the use of this information. All information in this presentation is provided "as is" with no guarantee of completeness, accuracy, timeliness or of the results obtained from the use of this information, and without warranty of any kind, express or implied, including, but not limited to warranties of merchantability, performance, and fitness for a particular purpose, or any warranty otherwise arising out of any proposal, specification, or sample. In no event will Seoul Semiconductor, its related corporations, or the employees thereof be liable to you or anyone else for any decision made or action taken in reliance on the information in this presentation or for any consequential, special or similar damages, even if advised of the possibility of such damages.

3 2 IC Introduction

4 IC Comparison 2 Driver IC 2, st : Fully integrated IC 2, 2 nd : Improved EMI and Thermal characteristics of IC Package Table. Specification Comparisons Item 2 ( st Generation) 2 (2 nd Generation/2+) Power Factor > 0.97 > 0.97 THD < 25% < 5% Power Adjust 4W & 8W (None - Power by IC Type) W ~ 6W Switching Step Dimming 20Vrms 2Step, 40~50V (Per step) 4Setp, 20 65V (Per step) 220Vrms 4Step, 40~65V (Per step) (Free voltage IC) AC Triac/Phase Cut Performance based on Dimmer Improved but still based on Dimmer 0 to 0V Analog Dimming No Optional Over Temperature Protection T j Min. 40 ~ Max. 50 JC 20 ) T j Min. 40 ~ Max. 50 JC 35 ) Package Type 4W 8W LGA. 6mmX6mm (Embedded Bridge Diode with TVS) LGA. 8mmX8mm (Embedded Bridge Diode with TVS) ~6W/Max.7W QFN. 6mmX6mm (External Bridge Diode)

5 IC Comparison 2 Driver IC Table. 2 Typical Application 2 ( st Gen.) Block Diagram 220V 8W Block Diagram 220V 4W Block Diagram 20V 8W Block Diagram Circuit 20V 4W 2 (2 nd Gen.) Wider range voltage and Power Block Diagram W ~ 6W (Input AC Voltage is limited by total V F)

6 IC Comparison 2 Driver IC Table.2 Functional Block Diagram 2 ( st Gen.) Bleeder D D Stage Current Source ~4 Stage Current Source 2 (2 nd Gen.) VP(+) 4 Bandgap& Bias Internal Bias 7 NC NC 3 VN(-) 2 Over Temperature Protection Analog Dimming Control LED Current Setting 6 NC 2 ADIM Rset

7 Understanding 2 IC

8 Main feature of 2 Our approach is to simplify LED lamp design Reduce lamp weight Low circuit cost Life time (2 Solution : 50,000hr Vs. DC LED Lamp : 5,000hr) Flicker improvement Dimming support

9 Basic mechanism of Module How IC works in 2 Current follows voltage wave form which improved THD And PF Current- Limited Steps Increase Efficacy AC voltage Input IC Controller-Type Light Output

10 Basic mechanism of Module Functional Description of 2 (Ex. 220V 8W application) Circuit Diagram of 2 AC Input Current Wave ( = s Driving Current ) 220Vac AC line voltage Group Group 5 Region Group 2 Group 3 IC Group 6 Group AC input current Phase Group 4 Group 8 Description of the s Operation Operation of the group ~4 same as a group 5~8 Operation table of each group ( phase 0 ~ 80 ) Region Group ON ON ON ON ON ON ON Group 2 OFF ON ON ON ON ON OFF Group 3 OFF OFF ON ON ON OFF OFF Group 4 OFF OFF OFF ON OFF OFF OFF

11 VP(+) VP(+) Bleeder N.C N.C D RSET 0 2+ Module Configuration 2+ 20Vrms/08W D D3 ADIM ADIM (+) (+) RIN RIN CL CL D5 D6 Input Voltage : 20Vrms Condition 8W (LED Q ty) Array Circuit Series Parallel Stage 2 4 Stage2 2 4 Stage3 3 Stage4 2 No. of LED 2ea VN VN (-) (-) VP VP (+) (+) RL RL 2 3 U5 ADIM 2 Rset 2+ VN(-) 2+ VN(-) N.C N.C D3 D3 9 8 N.C N.C 7 D7 D9 D D3 D D5 D9 D3 D7 D5 0 D8 D0 D6 D6 D0 D8 D3 D7 D D5 D9 D8 D6 Stage Stage2 Stage3 Stage4 D7 D8 D9 0 Note. U : 2.5+ IC, (DT300X) LED ~ LE : MJT 5630 PKG (SAW8KG0B)

12 2+ Module Configuration RSET 4 4 VP(+) VP(+) 5 5 D D Bleeder Bleeder N.C N.C 2+ 20Vrms/2W D D3 Input Voltage : 20Vrms Condition 2W (LED Q ty) Array Circuit Series Parallel Stage 2 5 Stage2 2 5 Stage3 5 ADIM ADIM (+) (+) VN VN (-) (-) RIN RIN CL RL 2 3 U5 ADIM 2 Rset 9 9 D3 D VN(-) 8 8 N.C N.C N.C 7 D5 D D7 D6 D9 D D D6 D8 D7 D0 D3 D8 D3 D9 D5 D0 D5 Stage Stage2 Stage4 5 No. of LED 30ea VP VP (+) (+) D6 D3 D5 6 D7 D7 2 D6 7 D8 D8 3 8 D D30 Stage3 Stage4 D9 0 Note. U : 2.5+ IC, (DT300X) LED ~ LED30 : MJT 5630 PKG (SAW8KG0B)

13 VP(+) VP(+) Bleeder N.C N.C D RSET 0 2+ Module Configuration 2+ 20Vrms/6W D D3 ADIM ADIM (+) (+) RIN RIN CL CL D5 D6 Input Voltage : 20Vrms Condition 6W (LED Q ty) Array Circuit Series Parallel Stage 2 7 Stage2 2 7 Stage3 7 Stage4 7 No. of LED 42ea VN VN (-) (-) VP VP (+) (+) RL RL 2 3 U5 ADIM 2 Rset 2+ VN(-) 2+ VN(-) N.C N.C D3 9 8 N.C N.C 7 D7 D9 D D3 D D8 D5 2 9 D5 D36 D8 D0 D6 D9 D6 3 D30 D37 D3 D0 D7 4 D3 D38 D D8 5 D32 D39 D5 D9 6 D33 0 D6 D3 0 7 D34 D7 8 D35 2 Stage Stage2 Stage3 Stage4 D7 D8 D9 0 Note. U : 2.5+ IC, (DT300X) LED ~ LE2 : MJT 5630 PKG (SAW8KG0B)

14 4 5 6 VP(+) Bleeder N.C D RSET 0 2+ Module Configuration Vrms/08W D D3 Stage Input Voltage : 220Vrms Condition 8W (LED Q ty) Array Circuit Series Parallel Stage 3 2 ADIM (+) RIN CL RL D5 D7 D6 D8 Stage2 3 2 Stage3 3 2 Stage4 3 VN (-) 2 3 U ADIM 2 Rset D VN(-) 8 N.C N.C 7 D9 D D0 Stage2 No. of LED 2ea D3 VP (+) D5 D6 Stage3 D7 D8 D9 0 Stage4 Note. U : 2.5+ IC, (DT300X) LED ~ LE : MJT 5630 PKG (SAW8KG0B)

15 4 5 6 VP(+) Bleeder N.C Vrms/2W D RSET 0 2+ Module Configuration D D3 D5 D6 Stage Condition Input Voltage : 220Vrms 8W (LED Q ty) ADIM (+) RIN CL D7 D8 D9 Array Circuit Series Parallel Stage 3 3 RL D0 D Stage2 3 3 Stage3 3 2 Stage4 3 2 VN (-) 2 3 U ADIM 2 Rset D VN(-) 8 N.C N.C 7 D3 D6 D7 D5 D8 Stage2 No. of LED 30ea D9 0 VP (+) 2 Stage Stage4 Note. U : 2.5+ IC, (DT300X) LED ~ LED30 : MJT 5630 PKG (SAW8KG0B) 9 D30

16 4 5 6 VP(+) Bleeder N.C Vrms/6W D3 D5 D RSET 0 2+ Module Configuration D D6 D7 D8 Stage Condition Input Voltage : 220Vrms 8W (LED Q ty) ADIM (+) RIN CL D9 D0 D Array Circuit Series Parallel Stage 3 4 RL D3 D5 D6 Stage2 3 4 Stage3 3 3 Stage4 3 3 VN (-) 2 3 U ADIM 2 Rset D VN(-) 8 N.C N.C 7 D7 D8 2 D Stage2 No. of LED 42ea VP (+) 8 9 D30 Stage3 D3 D32 D33 D34 D35 D36 D37 D38 D39 Stage4 0 2 Note. U : 2.5+ IC, (DT300X) LED ~ LE2 : MJT 5630 PKG (SAW8KG0B)

17 2, Surge Protection Circuit Feature -. Operating Voltage : 20V ~ 230Vac/Single Phase 2Wire -. Rated Power : 4 ~ 2W -. Max. Surge Voltage (.2/50us) :.2kV F RS Schematic L MOV C AC N AC2 PCB Layout. PCB Spec. - FR4, Layer, Oz (L)x7(W)x.6(t) [Unit : mm] Part list of material : Please contact your nearest distributor or one of our Seoul semiconductor sales offices.

18 2, Surge Protection Circuit Feature RF -. Operating Voltage : 20V ~ 230Vac/Single Phase 2Wire RF2 F RF -. Rated Power : 4 ~ 6W F VP(+) RF2 L-. Max. Surge Voltage (.2/50us) DB :.2kV N MOV L C MOV F L Schematic N 4 TVS C 3 + F MOV L C VN(-) 3 + VP(+) DB RF RF2-4 TVS RF VP(+) RF2 DB - 4 TVS MOV C 3 + DB VN(-) - 4 TVS VP(+) N VN(-) N VN(-) PCB Layout. PCB Spec. - FR4, Layer, Oz - 27(L)x8.5(W)x.6(t) [Unit : mm] Part list of material : Please contact your nearest distributor or one of our Seoul semiconductor sales offices.

19 Performance Test Conditions & Test Results 2 SPC (Surge Protection Circuit) is generally uses electrical fuse, MOV (Metal Oxide Varistor) and TVS. The circuit configuration and component values should be selected suitably according to target protection specification. Combination Wave IEC Line to Line Rise time Duration Open circuit Voltage.2us 50us Short Circuit Current 8us 20us Surge Voltage Phase Angle ±0.5kV x 5Pulses Phase Angle) 0, 90, 80, 270 Table. Test Conditions Figure. Combination wave, Open Surge Voltage (IEC )

20 Specification of 2+ (DT300X) Features & Typical Application Circuit Features High Power Factor > 0.95 VIN R IN LEDStage Rated Power : 4W/8W/2W/6W RL CL 2 0 Low Total Harmonic Distortion <20% Over Temperature Protection Adjustable LED Driving Current with External Resistors RSET 2 RSET D VN(-) 2+ D NC VP(+) RBLD NC NC DIM A LEDStage 2 LEDStage 3 Analog Dimming Function (ADIM) Thermally Enhanced 2 QFN (6 x 6 mm) VAC 2 LED Stage 4 GND RBLD VAC Figure. Typical Application Circuit Table. Package Thermal Characteristics Parameter Symbol Value Unit Junction to ambient thermal resistance θ JA C/W Junction to case thermal resistance θ JC.25 C/W Junction to Board θ JB C/W *Test conditions - θ JA : The package thermal impedance is calculated in accordance with JESD θ JC : The package thermal impedance is calculated in accordance with JESD θ JB : The package thermal impedance is calculated in accordance with JESD 5-8

21 Specification of 2+ (DT300X) Pinning Information Table 2. Pin Descriptions Pin Symbol Descriptions Rset Resistor Connection for Driver Current Setting 2 VN(-) Voltage input (-) 3 N.C No Connection 4 VP(+) Voltage input (+) 5 RBLD Bleeder Resistor Connection 6 N.C No Connection 7 N.C No Connection 8 Driver output-4 9 D3 Driver output-3 0 Driver output-2 D Driver output- Figure. 2 Package Top View 2 DIM ADIM, Analog Dimming Pin (Posistive) Note : Exposed pad on bottom surface is thermal pad. Therefore, It must be not connected to any electrical node. (Electrically Isolated)

22 Specification of 2+ (DT300X) Block Diagram & Absolute Maximum Ratings Bleeder D D Stage Current Source ~4 Stage Current Source VP(+) 4 Bandgap& Bias Internal Bias 7 NC NC 3 VN(-) 2 Over Temperature Protection Analog Dimming Control LED Current Setting 6 NC 2 ADIM Rset Figure. 3 Block Diagram Table. 3 Absolute Maximum Ratings Parameter Symbol Value Unit VP(+) to VN(-), D~, Bleeder to VN(-) V HV -0.3 ~ +450 V Dim to VN(-), Rset to VN(-) V LV -0.3 ~ +6.5 V Operating Ambient Temperature T A -30~+00 C Storage Temperature T STG -40 ~ +20 C Board Temperature T B 25 C Maximum Junction Temperature T J -55~+50 C ESD (HBM) V HBMV.5 kv

23 Specification of 2+ (DT300X) Electrical Characteristics Driver Output Driver Stage (Typ.) Operating Conditions () Peak Current [ma] Table. Driving Current (4 channels / stages) (2) Max. Peak Transient [ma] Driver Output Driver Stage (Typ.) Operating Conditions () Peak Current [ma] (2) Max. Peak Transient [ma] I D st I D st I 2 nd I 2 nd I D3 3 rd I D3 3 rd I 4 th I 4 th Driver Output Driver Stage (Typ.) Operating Conditions () Peak Current [ma] (2) Max. Peak Transient [ma] Driver Output Driver Stage (Typ.) Operating Conditions () Peak Current [ma] (2) Max. Peak Transient [ma] I D st I D st I 2 nd I 2 nd I D3 3 rd I D3 3 rd I 4 th I 4 th Driver Output Driver Stage (Typ.) Operating Conditions () Peak Current [ma] (2) Max. Peak Transient [ma] Driver Output Driver Stage (Typ.) Operating Conditions () Peak Current [ma] (2) Max. Peak Transient [ma] I D st I D st I 2 nd I 2 nd I D3 3 rd I D3 3 rd I 4 th I 4 th Note : () Driver stage current is based on the circuit of Seoul Semiconductor's LED array. (2) The Maximum peak current value for the transient within00us). Therefore, Under normal operating mode is not guaranteed.

24 Specification of 2+ (DT300X) Recommended R SET Values IC Version Voltage[V] Current [ma] Power [W] Rset [KΩ] Voltage [V] Current [ma] Power [W] Rset[KΩ] A-version (DT300A) IC version Voltage[V] Current [ma] Power [W] Rset [KΩ] Voltage [V] Current [ma] Power [W] Rset[KΩ] B-Version (DT300B) 220 Table. 5 Recommended Rset Values, DT300A Table. 6 Recommended Rset Values, DT300B

25 Specification of 2+ (DT300X) Package Outline & Dimensions

26 Design of 2+ Module Selection of LED Current (Module Power Consumption) R SET VAC 2 RSET 2 3 RSET VN(-) 2+ NC 2 VP(+) 4 D RBLD 5 0 NC 6 Table. Recommended IC-Type VIN R IN RL CL DIM A D3 NC LEDStage LEDStage 2 LEDStage 3 LED Stage 4 Input Voltage [Vrms] IC-Type 2+ Module Power [W] R SET [kω] ±% A A 8.54 B B A A A 2.8 B 6.65 * LED Current setting is based of the circuit of Seoul Semiconductor s LED Array GND RBLD ( MJT 5630 PKG) VAC Figure. Typical Application Circuit. LED output current setting module s current can be controlled by Rset value. (Plz refer Table and Recommended Rset value for reference) Seoul semiconductor highly recommends to designers to decided Rset value based on actual sample -. Rset value needs to be carefully chosen with each component's permitable error range to meet targeted module power

27 Design of 2+ Module Design of ADIM (voltage divider circuit) ADIM VIN R IN RL CL RSET 2 RSET 2 DIM D VN(-) 2+ D NC VP(+) RBLD NC NC A 0 LEDStage LEDStage 2 LEDStage 3 2 IC(DT300) Support ADIM(Analog Dimming) Applying a voltage source on ADMI Adjust the light output by external dimming signal 2 module circuit is non isolated The Dimming circuit need to be connected with same ground or isolation circuit VAC 2 LED Stage 4 GND RBLD VAC Figure. 2 Typical Application Circuit. LED output current setting 2. Analog Dimming Setting (ADIM) - R IN needs to be set 2kΩ and R L to be decided by Dimming voltage with following formula. R L R V IN IN Note. [].5V input to #2 pin : LED Flux output00% [2] R IN, R L is voltage parting circuit. Fix R IN value as 2kΩ to minimize IC power [3] C L as ADIM s smoothing circuit. Recommends 00nF (0.~uF) V V ADIM ADIM Calculation example Case : V IN = 0 ~ 4V R L 2kΩ.5V 4V.5V 7.2kΩ Case 2 : V IN = 0 ~ 0V R L 2kΩ.5V 0V.5V 2.kΩ Where - V IN : External dimming voltage signals - V ADIM :.5V (Constant value [] ) - R L : 2kΩ (Fixed value [2] ) - C L : 00nF [3]

28 ADIM Voltage[Vdc] 2 + Analog Dimming Solution Design Example ADIM Resistor Calculator -. In case of DC linear voltage Key User Entered Parameters Parametric Calculations Fixed Data Where - V IN : External dimming voltage signals - V ADIM :.5V (Constant value [] ) - R L : 2kΩ (Fixed value [2] ) - C L : 0.uF [3] R RL V IN IN V V ADIM ADIM Dimming Input Voltage vs. ADIM Voltage(IC-pin) Case Case 2 Case 3 Note. [] When the V ADIM is.5v[pin,2] the LED Flux reaches the 00%. [2] RIN and RL is Voltage divider circuit. Then total resistance is limited in order to minimize IC power consumption. [3] C L is voltage compensation capacitor. (~0uF) Case Case 2 Case 3 V IN 3.0 V V IN 4.0 V V IN 0.0 V V ADIM.5 V V ADIM.5 V V ADIM.5 V R IN 2.0 KΩ R IN 2.0 KΩ R IN 2.0 KΩ R L 2.0 KΩ R L 7.2 KΩ R L 2. KΩ DImming Input Voltage [Vdc]

29 2 + Analog Dimming Solution D/A Output Voltage [Vdc] Design Example -. In case of PWM voltage (fixed frequency) Key Design of D/A Converter (Digital to Analog) User Entered Parameters Parametric Calculations Fixed Data Input Voltage 0.0 Vpeak PWM, Aplitude Input Frequency 20.0 khz Fixed Freq. RIN 2.0 kω RL 2. kω CL 00 nf Fc 0.33 khz Cut-off Freq. Time Constant us PWM Dimming, D/A output voltage Vout [Vdc] 6.0 Duty [%] Vout [Vdc] Ton [us] Toff [us] V OUT value can be calculated as following formula. Duty T ON Duty [%] TON T OFF V OUT V IN D Where - V IN : 0V, Input Voltage (PWM) - V OUT : D/A Output voltage - T ON : PWM, Pulse On-time - T OFF : PWM, Pulse Off-time

30 2 + Analog Dimming Solution Relative Light Output[%] Dimming Performance Voltage Current Light Output 0~0V Dimming signal LED Current Dimmer Input Voltage 20% Flux t 00% 80% Max. Voltage 0V 60% Dimming Sgnal 0 ~ 0V Min. Voltage 0V (0V = off/min. Dimming ragne) t 40% 20% 2+ LED Current Max. Current Dim. Signal, 0V) Half. Current Dim. Signal, 5V) Min. Current Dim. Signal, 0V) t Max. Dimming Dim. Signal, 0V) 0% ADIM Voltage[V] Figure 2. Analog Dimming Curve (Measurements performed at 6W Module) 2+ Light Output Half. Dimming Dim. Signal, 5V) Min. Dimming Dim. Signal, 0V) t Figure. Analog Dimming Timing chart Table. Specification of ADIM Input Signal DC Voltage [V] PWM (Pulse Width Module) Relative Light Output [%] Minimum 0 Max. Amplitude : 0V 2~5 (Typ. 5%) Maximum 0 Duty Ratio : 0~00% 00

31 T(+82) , M(+82) THANK YOU! For more information, please contact below :

32 - Appendix - Safety standard - UL, TUV/CE 4W-UL 8W-UL 2W-UL 6W-UL 6W-UL, TUV/CE 7W-UL, TUV/CE

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