Eng. Ayman Metwali

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2 Recall the Von Neumann model : A Memory stores both data and program instructions (both binary!) The CPU fetches, decodes, and executes program instructions sequentially The CPU components can be divided into two main parts: The datapath: It groups the arithmetic-logic unit (arithmetic and logical operations), registers (storage units) and data buses (moving data from place to place). The control unit: It is responsible for sequencing operations and making sure the correct data is where it needs to be at the correct time. Registers Registers are places to store a wide variety of data Numerical data, Addresses, Control information, General Purpose registers are the registers available to the programmer. Special Purpose registers registers are those that always stores the same type of data Examples: Index registers, status registers, etc. Recall that registers can be implemented using D Flip-flops! Registers are located on the processor so information can be accessed very quickly The control unit directly accesses data inside the registers Most computers have registers of a certain size (16, 32 or 64 bits) The size of registers fixes the word size Data processing on a computer is usually done on these words (fixed size data) stocked inside the CPU registers The arithmetic Logic Unit ALU The ALU carries out logical and arithmetic operations as directed by the control unit. The Control Unit The control unit is the policeman or traffic manager of the CPU. It fetches and decodes sequentially the instructions stocked in the main memory. It also monitors the execution of these instructions and the transfer of all information. 2

3 The Bus The CPU communicates with the other components via a Bus. A Bus is a set of wires that simultaneously convey a single bit along each line (parallel movement). A Bus connects multiple subsystems within the system A Bus can be Point-to-Point or Common Pathway (also referred to as multipoint bus ) A point-to-point bus connects two specific components multipoint bus is shared by several devices Bus protocols are used to manage the bus access by these devices A typical bus consists of three main components Data lines: are dedicated to moving data (the actual information that must be moved). Control lines: indicate which device has permission to use the bus and for what purpose (reading or writing from memory or from an I/O device, ) Address lines: indicate the location (in memory, for example) that the data should be either read from or written to. Power lines are also required to provide the electrical power necessary 3

4 Buses have also been divided into different types Examples: Processor-memory buses are short, high-speed buses that are closely matched to the memory system on the machine to maximize the bandwidth (data transfer). I/O buses are typically longer than processor-memory buses and allow for many types of devices with varying bandwidths Final Question: What are the differences between a point-to-point bus and a multipoint bus? Sol. Multipoint bus is a shared resource; access to it is controlled through protocols, which are built into the hardware. While Point- to Point bus provides direct connection between two resources. Thus the difference is that point to point is dedicated bus or link between two resources while multipoint bus is shared Final Question: What is the difference between a point to point bus and a multipoint bus? And what are the main three components of a typical bus? Briefly explain each of them. (7.5 Marks) Sol. A point-to-point bus connects two specific components while a multipoint bus is shared by several devices. (3 Mark) The three main components of typical bus are: Data bus: are dedicated to moving data Control bus: indicate which device has permission to use the bus and for what purpose Address bus: indicate the location (in memory, for example) that the data should be either read from or written to. Questions: Final Question: The... of a bus contain information about the location that the data should be either read from or written to. a- control lines c- data lines b- Address lines d- power lines Final Question: The registers are interconnected, and connected with main memory through a: a. common data bus b. CPU c. ALU d. CU Final Question: The CPU shares data with other system components by way of A) a data pulse. B) a data sharing. C) a data bus. D) Not applicable. Final Question: The access to a multipoint bus is controlled through, which are built into the hardware. a) Protocols b) Programs c) Buses d) disk controller Final Question: The groups three CPU major components: the arithmetic-logic unit, registers and data buses. a) datapath b) cache memory c) control unit d) main memory 4

5 Clocks Every computer contains at least one clock that synchronizes the activities of its components. The CPU requires a fixed number of clock ticks to execute each instruction Instruction performance is often measured in clock cycles instead of seconds The clock frequency, measured in megahertz or gigahertz, determines the speed with which all operations are carried out. Clock cycle time is the reciprocal of clock frequency: T= 1/F Example: An 800 MHz clock has a cycle time of 1/(800x 10 6 ) seconds = 1.25 ns. Example 2: If a machine has a 2ns cycle time, then it is a 500MHz machine. It seems reasonable to assume that if we speed up the clock, the machine will run faster? Well yes, BUT: Suppose we want to transfer data from a register (output) to another (input) The data is transferred electrically inside the bus If the clock cycle is less than the propagation delay between the registers we can end up with some values not reaching the destination register (before the next clock tick)! What if we shorten the distance between registers to shorten the propagation delay? We could do this by adding registers between the output registers and the corresponding input registers. But recall that registers cannot change values until the clock ticks, so we have, in effect, increased the number of clock cycles!! So, the time to execute an instruction depends on both The clock cycle time and the number of clock cycles per instruction The time needed to execute a whole program is given by: Interrupts Interrupts: are events that alter(or interrupt) the normal flow of execution in the system. Interrupts can be triggered for a variety of reasons: I/O requests arithmetic errors (such as division by zero) when an invalid instruction is encountered. An interrupt can be initiated by the user or the system. Two types of interrupts Maskable interrupts: disabled or ignored Non-maskable interrupts are high-priority interrupts that cannot be ignored. 5

6 The Input/Output Subsystem A computer communicates with the outside world through its input/output (I/O) subsystem. I/O devices connect to the CPU through various interfaces. I/O can be memory-mapped, where the I/O device behaves like main memory from the CPU s point of view.(its speed but uses up memory space) Or I/O can be instruction-based, where the CPU has a specialized I/O instruction set. (does not use memory space, It requires specific I/O Instructions) Memory Organization and Addressing A Computer memory can be seen as a matrix of bits: a linear array of addressable storage cells that are similar to registers. Each row has a length typically equivalent to the word size of the machine. Two types of memories are available: Byte addressable: Each byte has its own address (each memory row contains 8 bits only) Word addressable: Each word has a unique address (each memory row contains one word that can be lager than 8 bits). What if the word size is larger than a single byte but the system still employ a byte-addressable architecture? Byte addressable: Still each byte has its own address! When accessing a word (that uses multiple bytes), the byte with the lowest address determines the address of the entire word. Now how many addresses do we have in a given memory? And how many address bits? To answer this question we should be aware of: The type of addressing? - word addressable or byte addressable The word size? - Examples: 8, 16, 32, 64 bits? The storage capacity of the memory? - Memory is often referred to using the notation L x W (length x Width) Important: 4M x 16 means the memory is 4M long (number of words) and it is 16 bits wide (word size) 6

7 Example 1: How a 4M x 16 word addressable memory is organized? 16 bits is the word size. 4M means that we have 4 x 2 20 = 2 2 x 2 20 = 2 22 different words. These 2 22 words are numbered from 0 to , each number represents the address of only one word. So each address is represented with at least 22 bits Example 2: How many bits would you need to address a 2M 32 memory if: a) The memory is byte-addressable? b) The memory is word-addressable? Solution: a) There are 2M 4 bytes which equals 2 * 2 20 * 2 2 bytes = 2 23 bytes, so 23 bits are needed for an address b) There are 2M words which equals words = 2 21 words, so 21 bits are required for an address Usually, computers physical Memory (RAM) is not made from a single high capacity chip, but a group of lower capacities chips. Access is more efficient when memory is organized into banks of chips with the addresses interleaved across the chips Example: How to build a 32Kx16 word addressable RAM memory with only 2Kx8 RAM chips? Solution: To create the 32K words, we need 16x2K words. A 32Kx16 word addressable RAM memory can be created with 32 different 2Kx8 RAM chips: We could connect 16 rows and 2 columns of chips together Final Question: How many bits would have been used to address a 2M X 32 Memory if [ 7 MARKS] : a) The memory is byte addressable There are 2M X 4 BYTES = 2 x 2 20 x 2 2 = 2 23, so 23 bits b) The memory is word addressable. 2M words which equals to 2 x 2 20 = 2 21 so 21 bits 7

8 MARIE Introduction We are now familiar with computer components but how these are connected together? How these work together? MARIE stands for: A Machine Architecture that is Really Intuitive and Easy. MARIE will help us to understand how computer functions (even the more complex computers) and how computer components connected together? The MARIE architecture has the following characteristics: Binary, two's complement data representation. Stored program, fixed word length data and instructions. 4K x 16 word-addressable main memory. 16-bit instructions: 4 bits for the opcode, 12 bits for the address. A 16-bit arithmetic logic unit (ALU). Seven registers for control and data movement. Registers and Buses AC: Accumulator, a 16-bit register that holds a conditional operator (e.g., "less than") or one operand of a two-operand instruction. MAR: Memory address register, a 12-bit register that holds the memory address of an instruction or an operand of an instruction. MBR: Memory buffer register, a 16-bit register that holds the data after its retrieval from, or before its placement in memory. PC: Program counter, a 12-bit register that holds the address of the next program instruction to be executed. IR: Instruction register, a 16-bit register that holds an instruction immediately preceding its execution. InREG: Input register, an 8-bit register that holds data read from an input device. OutREG: Output register, an 8-bit register that holds data that is ready for the output device. The MARIE architecture is shown in the figure below: MARIE cannot transfer data or instructions into or out of registers without a bus. In MARIE, we assume a common bus scheme Each device on the bus is identified by a unique number. If the device is required to use the common bus, Its number is set on the control lines. Some direct pathways (without using the common bus) are also available to speed up execution MAR Memory ; AC ALU ; AC MBR ; MBR ALU. 8

9 The Data path in MARIE is shown in this figure Note that a data word (that is an instruction) in the main memory travels a relatively long path before achieving the IR! The Instruction Set Architecture MARIE has a very simple, yet powerful, instruction set. The Instruction Set Architecture (ISA) specifies the format of its instructions and the primitive operations that the machine can perform. The ISA is an interface between a computer s hardware and its software. Some ISAs include hundreds of different instructions for processing data and controlling program execution. For MARIE, each instruction consists of 16 bits These bits are organized as follows: Opcode: 4 bits (bits 12 to 15), specifies the instruction to be executed (which allows for a total of 2 4 =16 instructions, but only 13 are used) Address: 12-bits (bits 0 to 11), forms an address. The fundamental MARIE instructions are: 9

10 Example: Consider the following binary instruction: What is the job of this instruction? Solution: The first four MSB forms the opcode It corresponds to a LOAD instruction. The remaining 12 bits indicate the address of the value we are loading, which is address 3 in main memory. This instruction causes the data value found in main memory, address 3, to be copied into the AC One important instruction is SKIPCOND When the Skipcond instruction is executed, the value stored in the AC must be inspected. The next instruction is skipped (resp. not skipped), if the condition tested is True (resp. False). Bits 11 and 10 (say b 11 b 10 ) in the AC specify the condition to be tested, if: - b 11 b 10 = 00: The CPU tests if AC < 0 - b 11 b 10 = 01: The CPU tests if AC = 0 b 11 b 10 = 10: The CPU tests if AC > 0 Example: Consider the following binary instruction: What is the job of this instruction? Solution: The opcode 1000 corresponds to a skipcond b 11 b 10 = 10, so the instructions job is to skip the next instruction if AC > 0. In general we use: SKIPCOND 000 which means skip the next instruction if the AC <0. SKIPCOND 400 which means skip the next instruction if the AC =0. SKIPCOND 800 which means skip the next instruction if the AC >0. Note that 000, 400 and 800 are in base 16, They are equivalent to 12bits (Address part)! 10

11 A Simple Program The figure below shows a program written in assembly language for MARIE What does this program do? This program simply adds two numbers and stores the result in the main memory. It loads the value stored at the location address into AC (the value is = ) It adds this value to the value stored at the location address (the value is FFE9 16 = (-23) 10 ) Stores the sum into the location address So what will be stored in the location address ? Now let us discover what happens during each Fetch, decode, execute cycle. Question. List the hexadecimal code for the following program (hand assemble it). Ans What are the contents of the symbol table for the preceding program? Sol. 11

12 Questions: Question. Decipher the following MARIE machine language instructions (write the assembly language equivalent): i) ii) iii) Sol. i) Store 007 ii) Jump 00B iii) Add 009 Question. Write the following code segment in MARES assembly language Sol. If x>0 then Z = x + y End if; Question. List the separate steps to do each of the following using Marrie's commands: Sol. 1- x := 1 load one store x 2- x > 10 Load X subt 10 skipcond X := X + 1; Load x Add one Sotre x Advanced Question: Write the following code segment in MARES assembly language Sol. If x>1 then z = x + y Else if x<1 then z = x - y Else Z = x End if Final Question: Write the proper code to implement the expression: A= 2B - (D - E) using MARIE ISA, and write their proper addresses, given than the following directive is given : ORG 10A. Sol. Load B Add B Subt D Add E Store A Question. Write the following code segment in MARES assembly language Sol. If x>1 then Z = x + y End if; Question. Write the following code segment in MARES assembly language Sol. If x>1 then z = x + y Else z = x - y End if Advanced Question: Write the following code segment in MARES assembly language Sol. if x>1 then y= x+x; x=0; endif; y=y+1; 12

13 Final Question: Write the following code segment in MARES assembly language [ 8 marks] If x > 1 then Y = X + X; X = 0; End if ; Y = Y +1; Sol : Question. Write the following code segment in MARIE assembly language: (A hint, not a solution, was given to students on this problem.) Sum := 0; for X := 1 to 10 do Sum := Sum + X; 13

14 Final Question: Given the following MARIE assembly program: ORG 200 Load Var1 Store X Subt Var2 SkipCond 400 Jump Finish1 Store Y Finish1, Load Y Output Clear Halt Y, Dec 5 X, Dec 0 Var1, Dec 5 Var2, Dec 1 Instructions Content of The AC a) At what address does the program begin? At address 200 b) Give the content of the AC (accumulator register) after the execution of each of the above program s selected instructions. To do so, copy the above table in your answer sheet and replace the? symbols with the appropriate decimal values. Hint: Write NOT EXECUTED in front of a non-executed instruct Instructions Content of The AC ORG 200 Load Var1 5 Store X 5 Subt Var2 4 SkipCond Jump Finish1 4 Store Y Finish1, Load Y 5 Output 5 Clear 0 Halt Y, Dec 5 X, Dec 0 Var1, Dec 5 Var2, Dec 1 NOT EXECUTED 14

15 Final Question: Given the following MARIE assembly program: Instructions Content of the AC ORG 200 XXXXXXXXXXXXXXXXXXXXX Load X? Subt TEN? IF, Skipcond 800? Jump ELSE? Load X? Subt Y? Jump END? ELSE, Load X? Add Y? END, Store Z? Output? Halt XXXXXXXXXXXXXXXXXXXXX X, Dec 15 XXXXXXXXXXXXXXXXXXXXX Y, Dec 4 XXXXXXXXXXXXXXXXXXXXX TEN, Dec 10 XXXXXXXXXXXXXXXXXXXXX Z, Dec 0 XXXXXXXXXXXXXXXXXXXXX a) Give the content of the AC (accumulator register)after the execution of each of the above program s selected instructions. To do so, copy the above table in your answer sheet and replace the? symbols with the appropriate decimal numbers. Hint: Write NOT EXECUTED in front of a non-executed instruction. Instructions Content of the AC ORG 200 XXXXXXXXXXXXXXXXXXXXX Load X 15 Subt TEN 5 IF, Skipcond Jump ELSE NOT EXECUTED Load X 15 Subt Y 11 Jump END 11 ELSE, Load X NOT EXECUTED Add Y NOT EXECUTED END, Store Z 11 Output 11 Halt XXXXXXXXXXXXXXXXXXXXX X, Dec 15 XXXXXXXXXXXXXXXXXXXXX Y, Dec 4 XXXXXXXXXXXXXXXXXXXXX TEN, Dec 10 XXXXXXXXXXXXXXXXXXXXX Z, Dec 0 XXXXXXXXXXXXXXXXXXXXX a) What is the output of this program? (2 Marks) The output is : M[X]-M[Y]=15-4 = 11. b) What would be the new output if X, Dec 15 is replaced by X, Dec 9? The program adds instead of subtracting. The new output is =

16 Question. Giving the following code, what is the equivalent equation? Final Question: MARIE Assembly program (12.5 Marks) Consider the following program written in MARIE assembly language: Org 100 Load X Subt Y Store Z if, Skipcond 000 Jump Else Then, Clear Subt Z Else, Output Halt X, DEC 3 Y, DEC 5 Z, HEX 0000 a) What is the job of the underlined instructions? b) What is the data value stored at the address Z after the execution of Store Z instruction? And what is the value stored in the AC after the execution of Store Z instruction? (2 Marks) The value is the same as in AC. It is 3-5 = -2 in decimal. c) What is the output of this code in decimal? In hexadecimal? (2 Marks) The output of this code is 2 in decimal and 0002 in hexadecimal. d) So what does this code do in general? (2 Marks) This code calculates X-Y. e) What is the RTL of Halt instruction? (1.5 Marks) Halt instruction does not include any RTL. 16

17 Register Transfer Notation MARIE instruction appears to be very simplistic Actually, at the component level, each instruction involves multiple operations called microoperations Register Transfer Language (RTL), or Register Transfer Notation (RTN) specifies the exact sequence of microoperations that are carried out by an instruction. In the MARIE RTL we will use the following : M[X]: to indicate the actual data value stored in memory location X : to indicate the transfer of bytes to a register or memory location In the following few slides we will present the RTL for each of the instructions in the ISA for MARIE Load X (loads the contents of memory location X into the AC) MAR X Place the address X in MAR; MBR M[MAR] The data M[MAR] at location address MAR is moved into the MBR; AC MBR The content of MBR is placed in the AC. Store X (stores the contents of AC into the memory location X) MAR X Place the address X in MAR; MBR AC M[MAR] MBR Place the content of AC in MBR Place the content of MBR in the memory location MAR (M[MAR] is replaced by MBR) Add X (The data value stored at address X is added to the AC). MAR X Place the address X in MAR; MBR M[MAR] Place the data M[MAR] at location address MAR in MBR; AC AC + MBR Place the sum AC + MBR in AC Subt X (The data value stored at address X is subtracted from AC). MAR X Place the address X in MAR; MBR M[MAR] Place the data M[MAR] at location address MAR in MBR; AC AC - MBR Place AC - MBR in AC Input (Inputs a value from the keyboard into AC) AC InREG Place the content of InREG (contains the input) in the AC. Output (Output the value in AC to the display) OutREG AC Place the content of AC (contains the output) in the OutREG (to sent data to the display) Halt (Terminate the program) no need for any RTL! Jump X (unconditional branch to the given address, X) PC X Load X into the PC Skipcond if IR[11 10] = 00 then {if bits 10 and 11 in the IR are both 0} if AC < 0 then PC PC+1 else if IR[11 10] = 01 then {if bit 11 = 0 and bit 10 = 1} if AC = 0 then PC PC

18 else if IR[11 10] = 10 then {if bit 11 = 1 and bit 10 = 0} if AC > 0 then PC PC + 1 Important Notes Any instruction is firstly placed into the instruction register IR where: - IR[15-12] contains the opcode - IR[11-0] contains the operand (address) In all the previous RTL, X can be replaced by IR[11-0]! Example: - The RTL for Jump X can be written as follows: PC IR[11-0] MARIE, like any other computer architecture, follow the basic machine cycle: The fetch, decode, and execute cycle 18

19 Interrupts An important issue (that is not covered here for MARIE) is interrupt handling Most computers provide a way of interrupting a running program Examples of interrupts: A user break is issued (e.g., Ctrl+C) I/O is requested by the user or a program A critical error occurs Practically, when an interrupt occurs a special bit in the status register or flag register of the CPU is set. The CPU checks this bit at the beginning of every machine cycle If the bit is set, the CPU processes an interrupt as follows: Pause the execution of the current program Run the interrupt s appropriate routine Continue the execution of the previously paused program (after finishing the interrupt s routine) If the bit is not set, the CPU performs a normal new fetch, decode, execute cycle of the program currently being executed. When the CPU finishes the interrupt s routine, it must return to the exact point at which it was running in the original program. Before the CPU switches to the interrupt service routine, it must save: The contents of the PC The contents of all other registers in the CPU Any status conditions that exist for the original program. 19

20 What do Assemblers do? Assembly language can be understood by the programmer but not the computer! Assembly language must be converted into Machine Codes (binary codes) before being executed or even stored in the main memory. An Assembler is used to translate assembly language into machine code It reads a source file (assembly program) and convert it to an object file (Machine code) Assembler VS Compiler An assembler translates each mnemonic instruction (written in assembly) to exactly one machine code. With compilers, this is not usually the case Going back to our simple program, what really happens inside the CPU during each fetch, decode, execute cycle? Load 104: Add 105: Store 106: An assembler directive is an instruction that is not supposed to be translated into machine code 20

21 Consider the following program: 100 Load X 101 Add Y 102 Store z 103 OUTPUT 104 Halt X, 105 HEX 0023 Y, 106 HEX 0023 Z, 107 HEX 0000 The following table represent the RTN for Load instruction during fetch, decode, execute cycle Using the above code write the missing values and Steps in the following table: Step RTN PC IR MAR MBR AC (initial values) 100 MA RPC 100 IR M [MAR] 100 PC PC + 1 MAR IR[11-0] (Decode IR[15-12] MBR M[MAR] AC MBR Step RTN PC IR MAR MBR AC (initial values) 100 Fetch MA RPC IR M [MAR] PC PC Decode MAR IR[11-0] (Decode IR[15-12] Get operand MBR M[MAR] Execute AC MBR

22 Example: base 16 is the default base when writing assembly program for MARIE, to specify the used base we can use constant directives such as DEC (decimal) or HEX (Hexadecimal) In assembly language we can also use labels in order to clarify the program Extending our instruction set For MARIE, we have seen only 9 instructions while we have 4 bits, so we can have 16 different instructions. We will now extend our ISA by adding 4 new instructions: JnS, Clear, LoadI, StoreI, AddI and JumpI Instruction Number (hex) 0 A B C D E Table 4.6: MARRIE's Extended Instruction Set Instruction Meaning JnS X Clear AddI X JumpI X LoadI X StoreI X Store the PC at address X and Jump to X + 1 Put all zeros in AC. Add indirect: Go to address X. Use the value at X As the actual address of the data Operand to add to AC. Jump indirect: Go to address X. Use the value at X As the actual address of the location to Jump to. Load indirect: Go to address X. Use the value at X as the actual address of the operand to Load into the AC. Store indirect: Go to address. Use the value at X and the destination address for storing The value in the accumulator. JnS: Jump-and-Store instruction Allows us to store a pointer and then proceeds to set the PC to a different instruction This enables us to call procedures and other subroutines, and then return to the calling point in our code once the subroutine has finished. Clear: This instruction moves all zeros into the accumulator. This saves the machine cycles that would otherwise be expended in loading a 0 operand from memory. 22

23 So far, all of the MARIE instructions that we have discussed use a direct addressing mode. This means that the address (not the value!) of the operand is explicitly stated in the instruction. It is often useful to employ a indirect addressing The address of the address of the operand is given in the instruction. This means that the content of the given address is the address of the needed value. If you have ever used pointers in a program, you are already familiar with indirect addressing. LoadI, StoreI use indirect addressing Their RTL are shown in the table below What are the differences between LoadI X and Load X? StoreI X and Store X? LoadI RTL StoreI RTL MAR X MAR X JumpI and MBR M[MAR] MBR M[MAR] AddI use indirect addressing MAR MBR MAR MBR Their RTL MBR M[MAR] MBR AC are shown in the table below AC MBR M[MAR] MBR What are the differences between JumpI X and Jump X? AddI X and Add X? JumpI RTL AddI RTL MAR X MAR X MBR M[MAR] MBR M[MAR] PC MBR MAR MBR MBR M[MAR] AC AC + MBR 23

24 Exercise: 1. Write a program that calculates 2X + Y - Z where X, Y, Z are three different numbers in three different memory locations. Store the result in the main memory and display it. 2. Implement your code in MARIE simulator. 3. Check if you have errors. 4. Correct your errors and run your program. Makeup Final Question a) moves data within the computer. The faster the bus the better. This one runs at 400MHz. A system bus b) consists of an arithmetic-logic unit and storage units (registers) that are interconnected by a data bus that is also connected to main memory. The datapath c) The bit pattern for a LOAD 3 instruction as it would appear in the IR d) is the brain of the system. It executes program instructions. This one is a Pentium (Intel) running at 4.20GHz. The microprocessor e) The instruction number (Binary, Hexa) and the meaning separated by a space for skipcon instruction is skip next instruction on condition Makeup Final Question: Write down the RTL for the ADD instruction given value X MAR <- X MBR <-[MAR] AC <- AC + MBR Final Question: Write the MARIE Register Transfer Language for ADDI instruction. MAR X (1 Mark) MBR M[MAR] (1 Mark) MAR MBR (2 Mark) MBR M[MAR] (2 Mark) AC AC + MBR (1. 5 Ma Final Question: Write down the RTL for the ADD instruction given value X MAR <- X MBR <-[MAR] AC <- AC + MBR Final Question: Memory Organization and Addressing 24 (16 Marks) A. A computer systemuses a 128K x 16 main memory. How many bits do we need to address one memory location if: a) the memory is word addressable? (3 Marks) Each memory location contains 16 bits, so the memory contains: 128x2 10 x16/16 = 2 7 x 2 10 locations = 2 17 memory locations. 17 bits are needed to address one memory location. b) the memory is byte addressable? (3 Marks) Each memory location contains 8 bits, so the memory contains: 128x2 10 x16/9 = 2 7 x 2 10 x 2 locations = 2 18 memory locations. 18 bits are needed to address one memory location. Makeup Final Question: Consider the following assembly program ORG 100 Load One Store X Loop, Load X Subt Ten

25 SkipCond 000 Jump Endloop Load Sum Add X Store Sum Load X Add One Store X Jump Loop Endloop, Load Sum Output Halt Sum, Dec 0 X, Dec 0 One, Dec 1 Ten, Dec 10 END a) Present the register transfer notation (RTN) for each of the following instructions: - Load X - Store X - Add X - Subt X Sol. Load x MAR X {transfer address x to MAR} MBR M[MAR] {transfer data of address in MAR to MBR} AC MBR {transfer data in MBR to AC} - Store X MAR X {transfer address x to MAR} MBR AC {transfer data in AC to MBR } M[MAR] MBR {transfer data in MBR to address in MAR } - Add X MAR X {transfer address x to MAR} MBR M[MAR] {transfer data of address in MAR to MBR} AC AC + MBR { add the contents of MBR to the contents of AC} - Subt X MAR X {transfer address x to MAR} MBR M[MAR] {transfer data of address in MAR to MBR} AC AC - MBR { subtract data in MBR from AC} B) Describe the output of the above program. Answer: The output will be 45 which is the sum of 1 to 9 (loop) Some explanation is needed. especially the work of the loop C) Draw the connection of MARIE s Load instruction. Load has a binary number 0001 from table 4. P193 The signal patterns for the load instruction: P 0 P 1 P 2 P 3 T 0 : MAR X P 3 P 4 T 1 : MBR M[MAR] P 0 P 1 P 5 A 0 T 2 : AC MBR C r T 3 : [Reset counter] 25

26 Now, from the signal patterns we can draw the combinational logic circuit: Final Quesstion: Draw the timing Diagram for the Micro operations of MARE S Add instruction [ 8] 26