Unit I - Embedded Design with Microcontrollers

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1 ET7104 Design of Embedded Systems ME(C&IE) I semester (R2013) Unit I - Embedded Design with Microcontrollers PART A 1. Define embedded system. (BTL -1) 2. How do the performance tools differ from design and development tools? (BTL -2) 3. Name the different phases involved in the embedded system design life cycle. (BTL -1) 4. What will happen if partitioning decision is not properly done? (BTL-6) 5. List any four factors for selecting the RTOS. (BTL -1) 6. Differentiate microprocessor and microcontroller. (BTL -2) 7. List two techniques that improve power conservation in microcontrollers. (BTL -1) 8. Summarize the need for bench-marking in product design. (BTL -5) 9. What do you understand by the term memory substitution? (BTL -2) 10. Relate the significance of Time to market factor with embedded system design. (BTL -3) 11. Give the three broad categories of tools needed in evaluating the tool chain. (BTL -2) 12. What is meant by benchmarking? What is Dhrystone benchmark? (BTL -1) 13. Analyze what lead into the development of EEMBC benchmark. (BT L-4) 14. Illustrate the use of device drivers. (BTL -3) 15. Name the hardware and software debugging tools. Illustrate its purpose. (BTL -3) 16. Point out the issues involved in the Hardware Software integration of embedded system design. 17. Point out the issues that impact the selection of processor for an application. (BTL-4) 18. Summarize the three requirements for debugging an embedded system. (BTL -5) 19. Quote any four features for the selection of compilers. (BTL -1) 20. Compare the source code with object code. (BTL -5) PART B 1 (i) Explain the tasks involved in determining product specification to build an embedded system. (ii) List the software tools used for an embedded system design. Mention the significance of each tool. (BTL -1) 2 (i) While integrating hardware and software, if the performance is not met, which we need to modify? (Software/hardware) why? (BTL -6) (ii) Discuss why microcontrollers dominate the entire embedded world. (BTL -2) (8) (5) M.E. Control and Instrumentation Engineering I semester (R2013) Page 1

2 3 (i) Explain hardware and software design of embedded system in detail. (BTL (10) -4) (ii) List the product specification details needed for an embedded system design. (BTL -1) (3) 4 (i) With suitable example, illustrate the concept of hardware/software partitioning. (BTL -3) (ii) Discuss about the tasks are carried out in iteration and implementation phase in embedded design. (BTL -2) 5 Explain about the architecture of microprocessor-based embedded system and microcontroller-based embedded system with neat diagram. 6 Sketch the embedded system design life cycle diagram and enumerate the step by step development of an embedded system. 7 Discuss the following briefly: (BTL -2) (i) Product testing and release. (ii) Maintaining and upgrading existing products. 8 List out the various selection process in embedded system. With examples briefly discuss the selection process at each stage in embedded system design cycle. (BTL -2) 9 (i) List and illustrate about major tests to be done in selecting the processor for an embedded application. (BTL -3) (ii) Explain about the performance comparison of microprocessors made using Dhrystone benchmark with relevant chart. Also discuss about the limitation of this benchmark. (BTL -5) 10 (i) Explain the following terms shortly (1) Multitasking OS (2) IP core (3) System on Chip (4) ASSP (ii) List out the tests of five industry-specific tests suite of EEMBC benchmark tests list. (BTL -1) (9) (4) (7+6) (8) (5) 11 (i) Illustrate about running benchmarks. (BTL -3) (3) (ii) Describe about the features that improve the usability of a cross compiler. (10) (BTL -2) 12 (i) With a neat sketch explain the RTOS and microcontroller in detail. (BTL - (9) 5) (ii) Write short notes on tool chain availability. (BTL -1) (4) 13 (i) Examine which application needs RTOS microcontroller? Why? Give (5) M.E. Control and Instrumentation Engineering I semester (R2013) Page 2

3 (ii) example for the same. (BTL -3) Explain why the power and energy management play a vital role in the selection of processors? Also mention the other issues involved in the selection of processors. (8) 14 Write short notes on the following: (BTL -1) (i) Compilers. (ii) Hardware and software debugging tools. (6+7) PART C 15 With relevant benchmarking analyze about performance measuring tools in embedded system design cycle. 16 (i) What are the major phases, an embedded product undergo? Consider a (10) sample product for design and development and analyze the challenges faced at each phase. (BTL -6) (ii) Why should the embedded system RTOS be scalable. (5) 17 Explain product integration and the challenges to be addressed upon product integration with example. (BTL -5) 18 Briefly discuss the factors that an embedded system designer should consider to help him to decide which RTOS is appropriate for his application. (BTL -5) Unit II - Partitioning Decision PART A 1. Which are the specific features of firmware? (BTL -1) 2. Write the sequence of tasks carried out by the processor while asserting an interrupt signal. (BTL -6) 3. Express about the term HW/SW duality. (BTL -2) 4. What is ASIC revolution? (BTL -1) 5. Name the two hardware description languages. (BTL -1) 6. Describe about virtual hardware/software integration. (BTL -2) 7. Explain the need for co-verification in embedded product development. 8. Summarize the tasks carried out in sequence upon system startup. (BTL -2) 9. Show the memory mapping of dynamically allocated objects and variables. (BTL -3) 10. Define reentrant function. (BTL -1) 11. Illustrate how speed and code density is optimized. (BTL -3) M.E. Control and Instrumentation Engineering I semester (R2013) Page 3

4 12. Discuss about co-design and co-verification. (BTL -2) 13. What is meant by stub code? (BTL -1) 14. Point out the need for H/W-S/W partitioning. 15. What is called bus functional model? (BTL -1) 16. Point out three rules needed to be applied to decide reentrant function. 17. How design cycle can be shortened in embedded system design? (BTL -5) 18. Examine how memory mapping is useful to microcontroller. (BTL -3) 19. What is silicon compilation? Summarize the importance of ASIC in embedded system. (BTL -5) 20. Prepare code for basic AND function using C and Verilog. (BTL -6) PART B 1 (i) With suitable example, describe the concept of partitioning decision. (BTL -2) (ii) Illustrate how to code the hardware in the view of HW/SW duality. (BTL -3) 2 Explain the hardware/ software design flow in detail highlighting the similarity between the activities followed in each design. (8) (5) 3 (i) How the hardware / software duality, makes the partitioning decision possible? Explain. (ii) Write short notes on risk management in partitioning decision. (BTL -1) 4 (i) On what basis partitioning of both hardware and software is made? Why? Explain it with example. (BTL -5) (ii) Classify and comment shortly on each category of ASIC. (BTL -3) 5 (i) Explain co-verification process with example. (ii) List the three major architectural details regarding the execution environment that the embedded developer must know to write embedded system code. Discuss about any one. (BTL -2) 6 (i) Explain how memory organization and memory enhancement is done in a (9) product design. (ii) Narrate briefly on the need of memory enhancement. (BTL -2) (4) 7 (i) Discuss briefly how Interrupts service routines are handled in embedded systems with an example. (BTL -2) (ii) Discuss about the requirement for enhancement from polling loop to interrupt driven. (BTL -2) 8 (i) Explain how data space is created and organized in 68K family processor. M.E. Control and Instrumentation Engineering I semester (R2013) Page 4

5 (ii) (BTL -6) Explain how embedded system handles function calls and maintains /manages Stack frame. (BTL -5) 9 (i) When In-line assembly is preferred? Explain with example code. (BTL -1) (ii) Explain the concept of storage class modifier volatile with example. 10 Describe the memory access procedure. What is the use of chip select function? (BTL -1) 11 (i) Write short notes on memory mapped access. (BTL -1) (ii) Illustrate how an embedded system addresses the issue of different startup codes used for an embedded system and desktop environment? (BTL -3) 12 (i) Write briefly about nested interrupts and reentrancy. (BTL -1) (ii) What is firmware? Explain how it is useful in embedded system design? 13 (i) Write briefly about Object Placement. (BTL -1) (8) (ii) List and explain any five linker commands. (BTL -1) (5) 14 (i) Illustrate the sequence of process carried out by a processor upon startup with example. With relevant flowchart also explain how startup code is developed. (BTL -3) (ii) How does the general computing system differ from embedded system in the Booting and startup process? (BTL -2) PART C 15 Analyze about ASIC revolution and its impact on revision cost and risk management. 16 Consider a memory map for an exemplary embedded system a smart card needing a 2kB memory 256 byte RAM mainly for the stacks, EEPROM 512B for storing the balance amount under credit or debit and the previous transaction records on the card. Design the address decoding logic for 16 bit processor having 16 address lines for communication. (BTL -6) 17 Analyze about the performance of an embedded system, based on the special software techniques that are considered by embedded system programmers, when developing software for the application. 18 (i) Evaluate, in what type of applications we need to concentrate on speed? (8) M.E. Control and Instrumentation Engineering I semester (R2013) Page 5

6 (ii) Similarly in which application we need to concentrate on code density? Why? (BTL -5) What is the purpose of bitwise operations? Explain how bitwise operations are performed in embedded system. (BTL -4/5) Unit III -Functionalities for System Design PART A 1. What is ROM emulator? What does it do? (BTL -1) 2. Discuss about shadow register. (BTL -2) 3. Discriminate debug kernel from debugger front end. (BTL -5) 4. What makes flash memories attractive? (BTL -1) 5. Express about In-system programming. (BTL -2) 6. Differentiate between Host based debug and remote debug in terms of resources. 7. Tabulate the advantages and disadvantages of debug kernel. (BTL -1) 8. List the elements of ROM emulator. Also give limitations of it. (BTL -2) 9. List the three independent programs that are mapped into the flash memory. (BTL -1) 10. How watch-dog timers are different from conventional timers? (BTL -3) 11. What is logic analyzer? Give the limitations of logic analyzer. (BTL -2) 12. Name the two resources needed for the debug kernel from the target device? (BTL-1) 13. How does the Host-based debugging perform? Examine the problems associated with this debugging. (BTL -3) 14. What is intrusion? List the kinds of intrusion. (BTL -1) 15. Explain how microprogrammer approach is used. State its advantages and disadvantages. 16. Illustrate about embedded programmer. Mention its advantage and disadvantages. (BTL -3) 17. How does call to ISR differ from a function (Routine) call? 18. Explain how break point is implemented. (BTL -5) 19. Write the minimum requirements of special debug tools, used in system integration. (BTL - 6) 20. Write the function of triggers in logic analyzer. (BTL -6) PART B 1 Discuss about flash programming and also explain how the code corruption be avoided during reprogramming phase. (BTL -2) 2 (i) Tabulate the necessity of Flash memory and RAM used in embedded system. (BTL -1) (ii) Explain about In system programming, M.E. Control and Instrumentation Engineering I semester (R2013) Page 6

7 3 (i) Explain how firmware is integrated with hardware. (BTL -5) (ii) Tabulate the advantages and disadvantages of In-System Programming and In-Application Programming. (BTL -1) 4 (i) Illustrate the difference between In System programming and In Application programming. (BTL -3) (ii) Explain about In Application programming. 5 Explain with an application how to do host based debugging. Also discuss about the problems associated with it. 6 With neat schematic explain briefly about remote debuggers and debug kernels. (BTL -1) 7 (i) Draw the functional block diagram of a logic analyzer and list the major features of logic analyzer. (BTL -1) (ii) Explain how a debugger formulates a breakpoint in read/write memory with example. (BTL -6) (8+5) 8 (i) With a neat block diagram, explain the operation of ROM emulator. (8) Differentiate its functionality from ICE. (ii) Write the advantages and disadvantages of debug kernel. (BTL -1) (5) 9 (i) Write short notes on symbolic triggering (BTL -1) (ii) Explain how triggers work in logic analyzers. 10 Discuss about the following in the trigger system of logic analyzer. (BTL -2) (i) resources (ii) state transition (7+6) 11 (i) Discuss about the limitations of logic analyzer. (BTL -2) (4) (ii) Compose about the cost benefit feature of logic analyzer. (BTL -6) (3) (iii) Tabulate the advantages and disadvantages of ROM emulator. (BTL -1) 12 Discuss about the following: (BTL -2) (i) Difficulty in physical connections in logic analyzer. (ii) Logic analyzers and caches. (5+8) 13 Explain in detail on the JTAG emulator. 14 Generalize compiler optimization and statistical profiling in debugging process in detail. (BTL -6) PART C 15 Explain the need for watch dog timer in an embedded application. Explain M.E. Control and Instrumentation Engineering I semester (R2013) Page 7

8 how it protects the system with example. 16 (i) Explain the ways by which an embedded developer will evaluate the execution time of time critical ISR. State the importance of this evaluation. (BTL -5) (ii) Mention the tasks of Integrated Development Environment. Relate the required native and cross tools with the tasks to be completed. (BTL -3) (8) 17 What are the two states of operation of Logic analyzer? How does its functioning differ in both of the states? Elaborate with timing diagrams. 18 Explain about the following problems and conclude with the solution to these problems that are encountered in real-time debugging. (BTL -5) (i) Signal Intrusion Physical Intrusion (ii) Unit IV - In Circuit Emulators PART A 1. Name the methods for finding the bug in the single line and block of the given code. (BTL - 1) 2. Discuss, where do we use triggers in emulation? Why? (BTL -2) 3. Recommend the solutions to overcome timing constraints of emulators. (BTL -5) 4. Define In-circuit emulator. (BTL -1) 5. Describe about overlay memory. (BTL -2) 6. What does ISS stands for? (BT -1) 7. What are called personalities? How it is associated with memory mapping? (BTL -2) 8. What is called NMI? How it differs from RESET? 9. Give the advantages of emulator. (BTL -2) 10. Illustrate how NMI control logic works in ICE. (BTL -3) 11. What is the need for break point in debugging? How it is integrated with the program? (BTL -6) 12. List out the details provided by the statistical profiling. (BTL -1) 13. What is substitution memory? Examine why is it called so? (BTL -3) 14. What is called MMU? (BTL -1) 15. Summarize the role of memory steering logic in ICE. (BTL -5) 16. What is bullet-proof run control? (BTL -1) 17. Explain how emulators steering circuitry interposed between processor and the target system. M.E. Control and Instrumentation Engineering I semester (R2013) Page 8

9 18. Who is firmware developer? (BTL -1) 19. What do you mean by distributed emulators? Pointout the limitations of distributed emulation? 20. Prepare about the list of usage issues encountered in In-circuit emulators. (BTL -6) PART B 1 (i) How bullet-proof run control is done in emulation? Why it is necessary? (BTL -1) (ii) What is overlay memory? How it is helpful in emulation? (BTL -1) 2 With neat block describe about the emulation control system in detail. (BTL -4) 3 Recommend how to fix hardware break-point? What are the advantages of fixing hardware breakpoint? Explain it with example. (BTL -5) 4 Discuss the following briefly (i) Overlay memory of ICE (BTL -2) (ii) Memory- mapper circuit for emulation memory. (BTL -2) 5 Briefly discuss the comparison in implementation issues and downloading facility between substitution memory and overlay memory. (BTL -5) 6 (i) Mention where NMI control logic, memory steering logic and shadow ROM and RAM blocks are used. Discuss about the purpose and importance of each block. (BTL -2) (ii) When wait states are added with memory access time? Explain, what will happen if wait states are not included in accessing memory. (BTL -6) 7 Describe about the following capabilities needed for hardware and software integration (BTL -1) (i) Real time trace (ii) Memory substitution 8 Which three units must be brought together to provide the functionality similar to ICE. How to call this system? Discuss the limitations of this system. Explain how it differs from ICE. 9 List the two main obstacles that limit emulators use. Describe them in detail. (BTL -1) 10 Discuss briefly on memory management of overlap memory on cache replacement techniques. (BTL -2) (6+7) (8+7) 11 (i) Illustrate about the timing constraints obtained in ICE during debug (8) M.E. Control and Instrumentation Engineering I semester (R2013) Page 9

10 operation. (BTL -3) (ii) Illustrate about the usage issues associated with ICE in detail. (BTL -3) (5) 12 (i) Show how triggers must be set to get optimum results. (BTL -3) (9) (ii) Describe the term hardware debug. (BTL -1) (4) 13 (i) Explain the functional difference between in-circuit debugger and in-circuit emulator? (ii) Examine what exactly is a flash emulator. How does it work? (BTL -3) 14 (i) Write the comparison between in-circuit emulators and source-level debuggers. (ii) Describe why emulators are not used more for debugging. (BTL -1) PART C 15 Elaborate the design of bullet proof run control architecture in an In Circuit Emulator. (BTL -6) 16 Analyze about the issues in making connection between ICE and target system and also explain how they are addressed. 17 Design the memory-mapper circuit for a processor with 32-bit address bus to access 1MB emulation or overlay memory with the smallest accessible block size of 16kB. (BTL -6) 18 What is distributed emulator? Evaluate its performance with respect to ICE. (BTL -6) Unit V- Embedded Design Life Cycle and Testing PART A 1. Quote the various approaches adopted in modeling EDLC. (BTL -1) 2. Find out the integrity issues in PCB design. 3. What is EDLC? Give three primary objectives of EDLC. (BTL -2) 4. Explain how retirement phase is fixed for any embedded product. 5. Differentiate between control dominated and data dominated systems. (BTL -2) 6. List the phases of embedded life cycle that starts from testing. (BTL -1) 7. Illustrate about the process algorithm for integrating functional and coverage testing. (BTL - 3) 8. Name the two coverage test techniques available. (BTL -1) 9. Summarize the various risks and cost in testing of embedded system design. (BTL -2) M.E. Control and Instrumentation Engineering I semester (R2013) Page 10

11 10. How do you conclude that testing maximizes the performance of the system? (BTL -5) 11. Express the need for maintenance and upgrade. (BTL -2) 12. What is regression testing? (BTL -1) 13. How do you design the test case? (BTL -6) 14. What is meant by Bug tracking? (BTL -1) 15. Illustrate how functional test is implemented? Give Example. (BTL -3) 16. List and classify the types of test to be carried out in EDLC. (BTL -3) 17. Explain how electromagnetic interference is eliminated while designing a PCB for embedded application. 18. What is unit testing? (BTL -1) 19. Assess about the causes of hard real-time failure and soft real-time failure in embedded systems. (BTL -5) 20. Write the traits that separate embedded software from application software. (BTL -2) PART B 1 (i) List the different phases of EDLC and mention the significance of each phase. (BTL -1) (ii) Explain the various activities involved in conceptualization phase. 2 (i) Prepare a list on various requirements that need to be addressed during requirement analysis phase of embedded product design. (BTL -6) (ii) Develop a suitable diagram to explain the activities performed during design phase of EDLC and explain. (BTL -6) 3 (i) Give list of modeling techniques suitably suggested in EDLC process. (3) (BTL -2) (ii) Give the advantages and major drawbacks of linear/waterfall model. Also (5) discuss, this model is suitable for what kind of specification? (BTL -2) (iii) Discuss how iterative model is advantageous over linear model. (BTL -2) (5) 4 Explain how prototyping model differs from iterative model. Give the major drawbacks of this model. 5 (i) Illustrate the system design process in host machine and in target machine. (BTL -3) (ii) Which is the risk minimized EDLC model? Explain how it is achieved. 6 (i) Categorize the types of CPU and communication protocols according to the selective embedded application. Also comment broadly on each. (BTL - 5) (ii) Discuss about the comparison between data dominated system and control dominated system. (BTL -2) (8) (5) M.E. Control and Instrumentation Engineering I semester (R2013) Page 11

12 7 (i) Explain the PCB design, manufacturing & assembly process. (ii) What are the advantages of functional tests, coverage tests and programming tests? (BTL -1) 8 Write short notes on : (BTL -1) (i) Unit testing (ii) Regression testing (iii) Functional testing (4+4 +5) 9 (i) Write short note on Infamous software bugs. (BTL -1) (ii) Illustrate Black-box tests with example. (BTL -3) 10 Explain how statement coverage can be measured using software logging? Discuss about the limitation of this method. Also mention two more techniques used to improve the statement coverage. (BTL -5) 11 (i) What is testing? List the type of tests. Under what condition each test is preferred. Mention its advantages and disadvantages. (BTL -2) (ii) Discuss the use of DC and MCDC in testing embedded system. (BTL -2) 12 (i) When White-box tests can be designed? Show how this testing is done with example. (BTL -3) (ii) Describe how Gray-box test is performed. (BTL -2) 13 Explain the following (BTL -1) (i)testing embedded software (ii) Real time failure modes 14 Explain performance testing and its importance in maintenance and upgrade phases of embedded system design life cycle. (7+6) PART C 15 Explain the objective, need, different phases and modeling of EDLC. 16 (i) What is bug tracking? Analyze it with respect to technology, time, cost and (10) tools. (ii) Compare White-box tests with Black-box tests. (BTL -5) (5) 17 Is it possible to test every possible behavior of a system? If not, explain how testing should be done in such cases and also analyze the performance. 18 Analyze the measurement of test coverage in embedded systems using software instrumentation and hardware instrumentation. M.E. Control and Instrumentation Engineering I semester (R2013) Page 12

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