Introduction to Computer Design

Transcription

1 CMPT-150 Introduction to Computer Design SFU, Harbour Centre, Spring 2007 Lecture 16: Mar. 6, 2007 Memory Basics Random Access Memory (RAM) Computer Design Basics General Purpose Computer Instruction Set Architecture Memory Definitions Memory: A collection of storage cells together with the necessary circuits to transfer information to and from them. Memory : a bit or a collection of bits to be stored into or accessed from memory cells. Typical data elements: Bit: a single binary digit. Byte: a collection of 8 bits. Word: a collection of bits that is the a typical unit of access for the memory. Usually a power of two multiple of bytes (e.g., 1 byte, 2 bytes, 4 bytes, 8 bytes, etc.) path Memory Definitions (cont ) Memory size is measured by the number of bytes or words. Kilo (Kb): 1024 bytes = 2 10 bytes Megabyte (Mb): 1024 Kilobyte = 2 20 bytes Gigabyte (Gb): 1024 Megabyte = 2 0 bytes Terabyte (Tb): 1024 Gigabyte = 2 40 bytes Memory Organization: Usually organized as an indexed array of words. Index = ess. Memory Operations: operations on memory data supported by the memory unit. Usually, Read and Write. Random Access Memory (RAM): Time to access memory cells is independent of their address. Not random access: Example 1K x 16 RAM: 1K words, each of size 16 bits. There are 1024 addresses (0-102 decimal, or binary). Reading the word at address 1021 = we get

2 Memory Block Diagram Memory Block Diagram (cont ) k address lines are decoded to address 2 k words of memory. Each word has n bits. When Read=1 the n output data contain n k n the data at the address specified by the k address lines. When Write=1 the content of the memory at the address specified by the k address lines is changed to the data specified by n input data lines. Example: enables the memory. determines whether memory is read or written. 64K = = address bits The size of a word stored in memory is 8 bits 8 output bits. Implementation Constructing Large RAMs from Small RAMs Small memories can be constructed from registers and combinatorial components. For large memories, other technologies are used. Example: 8 x 1 RAM 8 words of size 1. A 8 decoder is used to enable writing to exactly one cell. An 8 1 Mux is used to select the cell to read. Alternatively, use a bus. n s can be used to construct 8xn RAM 8x RAM Actually, no need to duplicate the Decoder.

3 Constructing Large RAMs from Small RAMs (cont ) n s can be used to construct 8nx1 RAM 16x1 RAM 2 1 Decoder EN bus General Purpose Computer So far we design digital circuits that perform specific tasks. This approach is useful for: Simple tasks resulting in small circuits Large numbers of such circuits are required Sometimes it s better to design a general purpose circuit (computer), which can perform different sets of instructions (programs). Instructions are: Given through input devices (keyboard, Hard Disk) Kept in memory Performed by the Central Processing Unit (CPU) General Purpose Computer (cont ) Instructions a typical CPU is capable of performing: transfer: values can be transferred between registers in the CPU and external memory. Arithmetic: values stored in registers can be combined using arithmetic operations. Logic: values in registers can be combined using logic operations. Shifting the content of registers. Testing: the results of operations can be tested to detect conditions such as overflow, carry, negative result, zero. Input/output: values can be retrieved from external devices or displayed on them. Branching: Changing the sequence of executed instruction during execution. General Purpose Computer (cont ) Instruction Set Architecture (ISA): The set of instructions the CPU can perform. This is the lower-level appearance of the computer to a (software) programmer. Corresponds to Machine/Assembly Language. Computer Architecture: High-level description of the hardware (CPU) that implements the ISA. Usually, divided to path and Control Unit. path: Performs the data-processing operations. Control Unit: Determines the sequence of operations. path Registers file Control Unit ALU System

4 path Block Diagram Arithmetic and Logic Unit (ALU) The main components of the datapath are the Register File and the Arithmetic and Logic Unit (ALU). ALU: the combinatorial part that performs the arithmetic and logic operations. The operands of the ALU are (the values in) in at most two registers selected by the control. Control signals determine the operation performed by the ALU. bus connects the main memory and the register file. Implements a variety of binary (2 operands) and unary (1 operand) arithmetic and operations. Carry out Negative Zero Overflow path: Example Instruction Set Architecture A possible instruction*: ADD R1,R2,R; (sum the values in R2 and R and write the result to R1) To implement it: A select = R2 B select = R G select = A+B MF select = ALU MD select = F Destination select = R1 Load enable = 1 * Not necessarily a real command. ISA is the language understood by the CPU. Every CPU has its own ISA. (Software) programmers can use the ISA to write programs to be executed by the CPU. Example: Opcode is a binary codeword for the instruction. An instruction usually has several parameters. Example: Subtract R1 R R2 R1 R R2

5 The Fetch-Execute Cycle The steps perform by the control unit when executing a program: 1. Fetch the next instruction to be executed from memory. 2. Decode the instruction: a combinatorial part that determines the control signals.. Execute the instruction and (possibly) store the result. 4. Go to step 1.