Integration of SIVA T into Requirements Traceability Matrix. NRC Audit June 8-10, 2010 Aipharetta, GA A AREVA. AREVA NP Non-Proprietary
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1 Integration of SIV T into Requirements Traceability Matrix NRC udit June 8-10, 2010 ipharetta, G REV NP Non-Proprietary REV
2 Current RTM Plans lo Currently 0 REV follows Operating Instruction , TXS System - Requirements Traceability Matrix, for the development of the RTM c0 REV developed two Requirements Traceability Plans for the ONS RPS/ESFS upgrade project " Software Requirements Traceability Plan, and " Hardware Requirements Traceability Plan Futu re Projects W ill -ha-ve Simila r Docu-m'entationi for both Hardware and Software (ppropriate to the Project Requirements) NRC udit -June 8-10, 2010 Requirements Tracing REV NP Non-Proprietary p.2 REV
3 Level of Tracing Il The RTM provides every requirement OP The traces include: <" software requirements " software design description " actual code > hardware requirements 0 hardware design K0 inspection K analysis <* tests " system and cceptance Testing (FT) " software cceptance Test with SIVT (Black Box) " software cceptance Test (In Conjunction with White Box Testing) NRC udit -June 8-10, 2010 Requirements Tracing REV NP Non-Proprietary p.3 REV
4 Software and Hardware Design Documents Tracing Process Pp Software and Hardware Tracing for the design documents will be unchanged from the current process with the introduction of TELEPERM XS TM Simulation Validation Test Tool (SIVT). Tracing from 0 Tracing from the SRS to the SDD the HRS to the HDS NRC udit - June 8-10, 2010 Requirements Tracing REV NP Non-Proprietary p.4 REV
5 Software and Hardware Design Documents Tracing Process Software Requirements Specification Hardware Requirements Specification NRC udit -June 8-10, 2010 Requirements Tracing REV NP Non-Proprietary V p.5 REV
6 Validation Tracing Process lo With the ddition of pproved Simulation Testing 0 Software Validation Tracing will be performed in two ways " To the Simulation Test Documents (i.e. SIVT Test Specifications, and Test Procedures) * To the Factory cceptance Test Documents (i.e. FT Specifications, and FT Procedures) 0 Hardware Validation Tracing Process will be unchanged * To the Factory cceptance Test Documents, Inspection or nalysis NRC udit-june 8-10, 2010 Requirements Tracing REV NP Non-Proprietary p.6 R EV
7 Future Validation Tracing Process ll Simulation Testing, including that performed at the same time as Integration testing, is performed only on released software - Requirements Tracing REV NP Non-Proprietary p.7 NRC udit -June 8-10, 2010 Requirements REV NP Non-Proprietary p.7 REV
8 Future Validation Tracing Process L!' Tracing to Factory cceptance Test Documents will be performed for Requirements such as:!o Note that all requirements will be traced to the Test Case to ensure the requirement is satisfied * Requirement Test Cases will be denoted as such for clear identification NRC udit - June 8-10, 2010 Requirements Tracing REV NP Non-Proprietary p.8 REV
9 Software Validation Tracing Process F R-S (System Requirements) Sofi cwatre Requir ements S~pedirication- Nomenclature such as signal IDs and I/O points from the SDD are used in cceptance Testing Software Desig Document Factory -cceptance Test,. NRC udit -June 8-10, 2010 Requirements Tracing REV NP Non-Proprietary p.9 REV
10 System/Hardware Validation Tracing Process (Unchanged) FRS (System' Requirements) H~ardware~ Requirements _Speci.fication I r OOOý +Inspection nalysis Factory cceptance Test NRC udit -June 8-10, 2010 Requirements Tracing REV NP Non-Proprietary p.1o REV
11 Trad'ing EKSM~PBa Item From To Comments Test Test Procedure -Specification 1951 FRS-7.9.P1,SI SRS The response time for-, Not Traced RPSRESPPROC Stepsl-8 the TXS rack/processing equipment shall be < 425 msec for pressure change input for Function 7. FRS >SRS-*System an"d cceptac qet(ft Un'changed,_ (Bla k Box NRC udit -June 8-10, 2010 Requirements Tracing REV NP Non-Proprietary p.11 REV
12 Tracing Examples C urrent ' NRC udit -June 8-10, 2010 Requirements Tracing REV NP Non-Proprietary p.12 REV
13 Tracing Examples Current Tracing Methodology udit-june 8-10, Requirements Tracing REV NP Non-Proprietary p13 REV NRC B-10, 2010 Requirements REV NP Non-Proprietary P.13 REV
14 Summary l With the Introduction of SIVT Po " SIVT Simulation Testing Validates that the pplication Software meets the I&C Functional Requirements " The SIVT simulation test of software provides benefits for detecting errors early " The risk for missing requirements or wrongly implementing requirements is minimized Impact of the SIVT to the RTM * Update the Requirement Traceability Plans and Methodologies to reflect the integration of SIVT * Update the pplication Software Requirements Tracing Process * No changes to the Hardware Requirements Tracing Process NRC udit - June 8-10, 2010 Requirements Tracing REV NP Non-Proprietary p.14 R EV
15 Thank you! QUESTIONS*? NRC udit -June 8-10, 2010 Requirements Tracing REV NP Non-Proprietary p.15 REV
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