24-Channel Automotive Switch Monitor

Transcription

1 9-4464; Rev ; 2/9 EVALUATION KIT AVAILABLE 24-Channel Automotive Switch Monitor General Description The is a 24-channel automotive contact monitor designed as an interface between mechanical switches and low-voltage processors or other logic circuits. The IC operates over a voltage range of 5.5V to 28V, and withstands voltages up to 4V. It protects lowvoltage circuitry from high voltages and reverse battery conditions. The s low-current operation under all operating conditions makes it suitable for use in electronic control units (ECUs) that are connected directly to the automotive battery. It has an adjustable scan mode that significantly reduces the current drawn in key-off. The features an SPI interface to monitor the switch status and set the device configuration. Multiple s can be cascaded to support any multiple of 24 switches. The is available in a 6mm x 6mm, 4-pin thin QFN package and operates over the -4 C to +25 C temperature range. Automotive Body Controllers Automotive Door Modules Automotive Smart Junction Boxes Applications Typical Application Circuit Features 9V to 8V Operating Voltage Range with Full Performance Fully Functional Range of 5.5V to 28V Switch Inputs Withstand 27V Switch Inputs Withstand Reverse Battery Ultra-Low Operating Current µa (typ) in Scan Mode Built-In Switching Hysteresis Built-In Switch Deglitching CMOS-Compatible Logic Outputs Down to 3.V Interrupt Output to Processor Configurable Wetting Current (ma, 5mA, ma, or 5mA) for Each Switch Input AEC-Q Qualified Ordering Information PART TEMP RANGE PIN-PACKAGE M AX 3362ATL/V + -4 C to +25 C 4 Thin QFN-EP* (6mm x 6mm) *EP = Exposed pad. +Denotes a lead(pb)-free/rohs-compliant package. /V Denotes an automotive qualified part. Pin Configuration TOP VIEW 24 SWITCHES, BATTERY-CONNECTED BATTERY 9V TO 8V 3 N.C. 29 N.C. 28 IN6 27 IN5 26 IN4 25 IN3 24 IN2 23 IN 22 IN 2 SD ECU CONNECTOR IN7 3 2 VS IN VS.47μF.47μF IN GND Ω IN IN V DD 6 GND IN23 IN22 IN2 IN2 IN9 IN8 IN7 IN6 IN5 IN4 IN3 IN2 IN IN IN9 IN8 IN7 IN6 IN5 IN4 IN3 IN2 IN IN IN SDI VS IN REGULATOR OUT IN3 IN CS 3 SDO VDD IN CLK GND SDI SDO CLK CS INT SD IN6 4 + N.C. MICROCONTROLLER /LOGIC CIRCUIT N.C. 2 N.C. 3 IN7 4 IN8 5 IN9 6 IN2 7 IN2 8 IN22 9 IN23 INT SPI is a trademark of Motorola, Inc. THIN QFN (6mm x 6mm) Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at , or visit Maxim s website at

2 ABSOLUTE MAXIMUM RATING V DD, CLK, SDI, CS to GND...-.3V to +6V VS, SD, INT to GND...-.3V to +4V IN IN23 to GND...-5V to +27V SDO to GND...-.3V to (V DD +.3V) ESD Protection, All Pins (HBM)...±2kV ESD Protection on Pins IN IN23 to IEC Specification (with added.47µf capacitor, and/or Ω resistor)...±8kv Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Current Into Any Pin...±2mA Continuous Power Dissipation (T A = +7 C) (derate 37mW/ C above +7 C)(multilayer board) mw Operating Temperature Range...-4 C to +25 C Junction Temperature...-4 C to +5 C Storage Temperature Range C to +5 C Lead Temperature (soldering, s)...+3 C (V DD = 5V, V VS = 4V, T A = -4 C to +25 C, unless otherwise noted. Typical values are at T A =+25 C.) POWER SUPPLY PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS V DD Operating Supply Range V DD V V DD Supply Current I DD. µa VS Supply Range V VS (Note ) V VS Undervoltage Lockout V UVLO V Total Supply Current (Flowing into VS and V DD ) VS Supply Current in Shutdown Mode V DD Supply Current in Shutdown Mode SWITCH INPUTS I SUP t POLL = 64ms, t POLL_ACT = ms; LP bit in internal register =, 24 channels active, all switches open, T A = +25 C t POLL = 64ms, t POLL_ACT = ms; LP bit in internal register =, 24 channels active, all switches open Continuous polling mode, wetting current set to 5mA I SDVS V SD =, V VS = 4V, all switches open, T A = +25 C µa 6 µa I SDVDD V SD =, V VS = 4V, T A = +25 C. 5 µa Input Voltage Threshold V TH V VS = 5.5V to 28V, measured with Ω series resistor for high-side switches Input Hysteresis V H V VS = 5.5V to 28V, measured with Ω series resistor for high-side switches V.2 V Wetting Current Rise/Fall Time t IWETT 5 µs Wetting current set to 5mA, 9V < V VS < 8V Wetting Current I WETT Wetting current set to 5mA, (5.5V < V VS < 9V) or (8V < V VS < 28V) V IN_ =, T A = +25 C 2 IN IN23 Input Current I IN_ V IN_ = 4V, T A = +25 C (Note 2) 6 3 IN IN23 Input Leakage Current in Shutdown I LEAKSD V VS = or 4V, V SD =, T A = +25 C ±2 µa IN4 IN23 Dropout Voltage V DO5 I WETT = 5mA (Note 3) V ma µa

3 ELECTRICAL CHARACTERISTICS (continued) (V DD = 5V, V VS = 4V, T A = -4 C to +25 C, unless otherwise noted. Typical values are at T A =+25 C.) LOGIC LEVELS PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS INT Output-Voltage Low V OLINT Sinking ma.4 V SDO Output-Voltage Low V OLSDO Sinking ma.2 x V DD V SDO Output-Voltage High V OHSDO Sourcing ma.8 x V DD V SDO Leakage Current in High- Impedance Mode I LSDO V CS = 5V - + µa SDI, CLK, CS Input-Voltage Low V IL.33 x V D D V SDI, CLK, CS Input-Voltage High V IH.66 x V D D V SD Input Low Voltage V ILSD.8 V SD Input High Voltage V IHSD 2.4 V SDI Internal Pulldown Resistor R PD kω CLK Pin Leakage I LEAKCLK V CLK = 5V, T A = +25 C µa CS Pin Leakage I LEAKCS V CS = 5V, T A = +25 C µa SD Pin Leakage I LEAKSD V SD = 5V, T A = +25 C µa INT Pin Leakage I LEAKINT V INT = high impedance, T A = +25 C µa THERMAL SHUTDOWN Thermal Shutdown Threshold T SHDN Temperature rising (Note 4) C Thermal Shutdown Hysteresis T HYST 5 C TIMING Switch Inputs Deglitching Time t GT µs CLK Frequency Range f CLK (Note 4). 4 MHz Falling Edge of CS to Rising Edge of CLK Setup Time t LEAD Polling mode, input rise/fall time < ns (Note 4) ns Falling Edge of CLK to Rising Edge of CS Setup Time t LAG Input rise/fall time < ns (Note 4) ns SDI-to-CLK Falling Edge Setup Time SDI Hold Time After Falling Edge of CLK Time from Rising Edge of CLK to SDO Data Valid Time from Falling Edge of CS to SDO Low Impedance Time from Rising Edge of CS to SDO High Impedance t SI(SU) (Note 4) 3 ns t SI(HOLD) (Note 4) 2 ns t VALID C SDO = 5pF (Note 3) 7 ns t SO(EN) (Note 4) 55 ns t SDO(DIS) (Note 4) 55 ns 3

4 ELECTRICAL CHARACTERISTICS (continued) (V DD = 5V, V VS = 4V, T A = -4 C to +25 C, unless otherwise noted. Typical values are at T A =+25 C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Polling Active Time Accuracy t POLL_ACT % Polling Time Accuracy t POLL % Time from Shutdown to Normal t Operation START. ms Note : When V VS is above 28V, the wetting current is disabled to limit power dissipation, and the switch inputs are not monitored. When V VS returns, there is a ms blanking time before the external switches are polled. Note 2: This current only flows during the polling active time thus the average value is much lower. For example with a polling time of 64ms and a polling active time of ms the average current on an input when connected to 4V is typically 6µA x /64 =.25µA. Note 3: Difference between VS and IN_ voltage when wetting current has dropped to 9% of its nominal value. Note 4: Guaranteed by design. CS t LEAD t LAG CLK t SI(SU) t SI(HOLD) SDI MSB IN t SO(EN) t VALID t SDO(DIS) SDO MSB OUT LSB OUT Figure. SPI Timing Characteristics 4

5 (V DD = V SD = 5V, V VS = 4V, T A = +25 C, unless otherwise noted.) WETTING CURRENT (ma) WETTING CURRENT vs. VS VOLTAGE I WETT = 5mA I WETT = ma I WETT = 5mA toc WETTING CURRENT (ma) WETTING CURRENT vs. TEMPERATURE Typical Operating Characteristics I WETT = 5mA I WETT = ma I WETT = 5mA toc2 V IN I WETT V INT V CS V ma SWITCH STATUS CHANGE (CONTINUOUS MODE) toc3 V 5mA V/div 5mA/div 2V/div 2V/div VS VOLTAGE (V) TEMPERATURE ( C) ms/div WETTING CURRENT (5mA/div) 5mA WETTING CURRENT (POLLING MODE) 4.96ms POLLING TIME 52μs POLLING ACTIVE TIME toc4 SUPPLY CURRENT (μa) VS SUPPLY CURRENT vs. TEMPERATURE (CONTINUOUS MODE) I WETT = 5mA FOR ALL CHANNELS I WETT = ma FOR ALL CHANNELS I WETT = 5mA FOR ALL CHANNELS I WETT = ma FOR ALL CHANNELS ALL CHANNELS OPEN toc5 SUPPLY CURRENT (μa) 3 2 VS SUPPLY CURRENT vs. TEMPERATURE (POLLING MODE) POLLING TIME = ms POLLING ACTIVE TIME =.24ms ALL CHANNELS OPEN I WETT = 5mA toc6 ms/div TEMPERATURE ( C) TEMPERATURE ( C) SUPPLY CURRENT (μa) VS SUPPLY CURRENT vs. TEMPERATURE (SHUTDOWN MODE) TEMPERATURE ( C) toc7 SWITCH THRESHOLD (V) SWITCH THRESHOLD vs. TEMPERATURE (HIGH SIDE SWITCH) SWITCH OPEN TO CLOSE SWITCH CLOSE TO OPEN 3. HIGH SIDE SWITCH 5mA WETTING CURRENT Ω INCLUDED TEMPERATURE ( C) toc8 SWITCH THRESHOLD (V) SWITCH THRESHOLD vs. TEMPERATURE (LOW-SIDE SWITCH) SWITCH OPEN TO CLOSE SWITCH CLOSE TO OPEN LOW-SIDE SWITCH 5mA WETTING CURRENT TEMPERATURE ( C) toc9 5

6 Typical Operating Characteristics (continued) (V DD = V SD = 5V, V VS = 4V, T A = +25 C, unless otherwise noted.) SWITCH THRESHOLD (V) SWITCH THRESHOLD vs. VS VOLTAGE (LOW-SIDE SWITCH) SWITCH OPEN TO CLOSE SWITCH CLOSE TO OPEN toc V IN V INT V SWITCH STATUS CHANGE (POLLING MODE) toc V V 5V/div 2V/div VS VOLTAGE (V) 2ms/div Pin Description PIN NAME FUNCTION, 2,, 29, 3 N.C. No Connection. Not internally connected. 3 IN7 Switch Monitor Input Channel 7. Connect IN7 to a ground-connected switch. 4 IN8 Switch Monitor Input Channel 8. Connect IN8 to a ground-connected switch. 5 IN9 Switch Monitor Input Channel 9. Connect IN9 to a ground-connected switch. 6 IN2 Switch Monitor Input Channel 2. Connect IN2 to a ground-connected switch. 7 IN2 Switch Monitor Input Channel 2. Connect IN2 to a ground-connected switch. 8 IN22 Switch Monitor Input Channel 22. Connect IN22 to a ground-connected switch. 9 IN23 INT 2 CLK SPI Serial Clock Input 3 SDO 4 CS Switch Monitor Input Channel 23. Connect IN23 to a battery-connected or ground-connected switch. When used for a battery-connected switch, add a Ω series protection resistor to the input. Inter r up t Outp ut. INT i s an op en- d r ai n outp ut that asser ts l ow w hen one or m or e of the i np uts ( IN IN 23) chang e state and ar e enab l ed for i nter r up ts, or w hen the over tem p er atur e thr eshol d i s exceed ed. SPI Serial Data Output. SPI data is output on SDO on the rising edges of CLK while CS is held low. SDO is high impedance when CS is high. Connect SDO to a microcontroller data input or to a succeeding device in a daisy chain. SPI Chip-Select Input. Drive CS low to enable clocking of data into and out of the IC. SPI data is latched into the device on the rising edge of CS. 5 SDI SPI Serial Data Input. SPI data is latched into the internal shift register on the falling edges of CLK while CS is held low. SDI has an internal 5kΩ pulldown resistor. Connect SDI to the SDO of a preceding device in a daisy chain or to the microcontroller data output. 6, 8 GND Ground. Pins 6 and 8 must be connected to ground. Logic Supply Voltage. Connect V DD to a 3.3V or 5V logic supply. Bypass V DD to GND with at least a 7 V DD.µF capacitor placed as close as possible to V DD. 6

7 PIN NAME FUNCTION 9, 2 VS 2 SD 22 IN 23 IN 24 IN2 25 IN3 Pin Description (continued) Supply Voltage Input. VS should be protected from reverse battery using a series diode. Bypass VS to GND with a.µf ceramic capacitor placed as close as possible to VS. In addition, bypass VS with a 47µF or greater capacitor. Shutdown Input. Drive SD low to place the IC into shutdown mode. Drive SD high for normal operation. SD is battery-voltage compatible. Switch Monitor Input Channel. Connect IN to a battery-connected or ground-connected switch. When used for a battery-connected switch, add a Ω series protection resistor to the input. Switch Monitor Input Channel. Connect IN to a battery-connected or ground-connected switch. When used for a battery-connected switch, add a Ω series protection resistor to the input. Switch Monitor Input Channel 2. Connect IN2 to a battery-connected or ground-connected switch. When used for a battery-connected switch, add a Ω series protection resistor to the input. Switch Monitor Input Channel 3. Connect IN3 to a battery-connected or ground-connected switch. When used for a battery-connected switch, add a Ω series protection resistor to the input. 26 IN4 Switch Monitor Input Channel 4. Connect IN4 to a ground-connected switch. 27 IN5 Switch Monitor Input Channel 5. Connect IN5 to a ground-connected switch. 28 IN6 Switch Monitor Input Channel 6. Connect IN6 to a ground-connected switch. 3 IN7 Switch Monitor Input Channel 7. Connect IN7 to a ground-connected switch. 32 IN8 Switch Monitor Input Channel 8. Connect IN8 to a ground-connected switch. 33 IN9 Switch Monitor Input Channel 9. Connect IN9 to a ground-connected switch. 34 IN Switch Monitor Input Channel. Connect IN to a ground-connected switch. 35 IN Switch Monitor Input Channel. Connect IN to a ground-connected switch. 36 IN2 Switch Monitor Input Channel 2. Connect IN2 to a ground-connected switch. 37 IN3 Switch Monitor Input Channel 3. Connect IN3 to a ground-connected switch. 38 IN4 Switch Monitor Input Channel 4. Connect IN4 to a ground-connected switch. 39 IN5 Switch Monitor Input Channel 5. Connect IN5 to a ground-connected switch. 4 IN6 Switch Monitor Input Channel 6. Connect IN6 to a ground-connected switch. EP Exposed Pad. Connect EP to GND for enhanced thermal performance. 7

8 VS V DD Functional Diagram SDO IN IN IN2 IN3 IN4 IN5 IN6 IN7 IN8 IN9 IN IN IN2 IN3 IN4 IN5 IN6 IN7 IN8 IN9 IN2 IN2 IN22 IN23 WETTING CURRENT CONTROL OF OF 24 SHIFT REGISTER + CONTROL CS CLK INT SD REF GENERATOR SDI GND 8

9 Detailed Description The is a 24-channel automotive contact monitor designed as an interface between mechanical switches and low-voltage microcontrollers or other logic circuits. It features an SPI interface to monitor individual switch inputs and to configure interrupt capability, wetting current, switch configuration (battery-connected or ground-connected), polling time and polling active time. Any switch status change will cause an interrupt signal if the switch is interrupt enabled. The has three modes of operation: continuous mode, polling mode, and shutdown mode. V DD and VS V DD is the power-supply input for the logic input/ output circuitry. Connect V DD to a 3V to 5.5V logic-level supply. Bypass V DD to GND with at least a.µf capacitor placed as close as possible to V DD. VS is the main power-supply input. Bypass VS to GND with a.µf ceramic capacitor placed as close as possible to VS. In addition, bypass VS with a 47µF or greater capacitor. Mechanical Switch Inputs (IN IN23) IN IN23 are the inputs for remote mechanical switches. The switch status is indicated by the S S23 bits in the status register, and each switch input can be programmed to assert an interrupt (INT) by writing to the IE IE23 bits in the command register. All switch inputs are interrupt disabled upon power-up. The IN4 IN22 inputs are intended for ground-connected switches. The IN IN3 and IN23 inputs can be programmed for either ground-connected switches or battery-connected switches by writing to the LH LH3 and LH23 bits (see Table 2). The default configuration of the IN IN3 and IN23 inputs after power-up is for ground-connected switches. Wetting Current The applies a programmable wetting current to any closed switch to clean switch contacts that are exposed to adverse conditions. The wetting current for each switch can be set to ma, 5mA, ma, or 5mA by the W_. and W_. data bits in the command registers (see Table 5) by means of an SPI data transaction. When using wetting current, special care must be taken to avoid exceeding the maximum power dissipation of the (see the Applications Information section). Disabling the wetting current or limiting the active-wetting current time reduces power consumption. The default state upon power-up is with wetting current disabled. Interrupt Output (INT) INT is an active-low, open-drain output that asserts low when any of the switch inputs change state and is enabled for interrupts, or when the overtemperature threshold is exceeded. An external pullup resistor to V DD is needed on INT. INT is cleared when CS is driven low for a read/write operation. However, in polling mode, any switch state change or overtemperature change which occurs during an SPI transaction is stored and causes an additional interrupt after the SPI transaction is over and CS goes high (shown in Figure 2). If V DD is absent, the INT output is functional provided that it is pulled up to a different supply voltage. CS SWITCH STATUS CHANGE CLK INT NEW INTERRUPT Figure 2. Switch State Change During the SPI transaction 9

10 Serial Peripheral Interface (CS, SDO, SDI, CLK) The operates as a serial peripheral interface (SPI) slave device. An SPI master accesses and programs the by reading/writing the control registers. The control registers are 32 bits wide, have 2 command bits (or register addresses) and 3 data bits (see Table ). Figure 3 shows the read/write sequence through SPI. The SPI logic counts the number of bits clocked into the IC (using a modulo-32 counter so that daisy chaining is possible) and enables data latching only if exactly 32 bits (or an integer multiple thereof) have been clocked in. Status Register The status register contains the status of the switches connected to IN IN23. The status register also contains an overtemperature warning bit, a power-on-reset bit and a device type bit (see Table ). The status register is accessed by the SPI-compatible interface. CS CLK SDI CB CB D D D2 D3 D4 D5 D6 D7 D8 D9 D D D2 D3 D4 D5 D6 D7 D8 D9 D2 D2 D22 D23 D24 D25 D26 D27 D28 D29 SDO Z DT RST T S S S2 S3 S4 S5 S6 S7 S8 S9 S S S2 S3 S4 S5 S6 S7 S8 S9 S2 S2 S22 S23 x x x x x Z NOTE: X = UNUSED, Z = HIGH IMPEDANCE. Figure 3. SPI Read/Write Sequence Table. Bit Description BIT NAME CB, CB D D29 S S23 T RST DT BIT DESCRIPTION Command bits. Select the internal register to which data bits D D29 are to be written. Data bits. Switch state bit. = switch open, = switch closed. Overtemperature bit. When overtemperature occurs, this bit is set to. It is reset on the rising edge of CS. Power-on-reset bit. It indicates whether the IC has had a power-on-reset since the last SPI read. = device has been reset. RST is set to on the rising edge of CS. Device type. = reserved for future use, =.

11 Command Register Three 32-bit command registers are used to configure the for various modes of operation and are accessed by the SPI-compatible interface (see Table 2). Table 2. Command Register Map The default configuration after power-on is LH_ =, ground connected. D29 D28 D27 D26 D25 D24 D23 D22 D2 D2 D9 D8 D7 D6 D5 D4 D3 D2 D D D9 D8 D7 D6 D5 D4 D3 D2 D D CB CB X LP PA2 PA PA W23. W22. W2 W2 W9 W8.... X P3 P2 P P W23. W22. W2 W2 W9 W8.... LH2 3 W7. W7. W6. W6. W5. W5. W4. W4. W3. W3. W2. W2. W. W. W. W. W9. W9. W8. W8. W7. W7. W6. W6. W5. W5. W4. W4. W3. W3. W2. W2. W. W. W. W. X X LH3 LH2 LH LH IE23 IE22 IE2 IE2 IE9 IE8 IE7 IE6 IE5 IE4 IE3 IE2 IE IE IE9 IE8 IE7 IE6 IE5 IE4 IE3 IE2 IE IE X NO OPERATION (NO DATA WRITTEN) LH_: Switch Configuration for IN IN3 and IN23 The LH LH3 and LH23 bits set the switch configuration for IN IN3 and IN23, respectively. Set LH_ to to configure the input channel to ground connected. Set LH_ to to configure the input channel to battery connected. P P3: Polling Time P P3 are used to set the polling time as shown in Table 3. PA PA2: Polling Active Time PA PA2 are used to set the polling active time as shown in Table 4. Table 3. Polling Time Setting P3 P2 P P POLLING TIME (ms) Continuous* *Default POR value. Table 4. Polling-Active Time Setting PA2 PA PA POLLING ACTIVE TIME (µs) * *Default POR Value.

12 IE_: Interrupt Enable The IE_ bit programs the switch input channel, IN_, to be interrupt-enabled or interrupt-disabled ( = interrupt disabled, = interrupt enabled). The default value after power-on is. W_. and W_.: Wetting Current W_. and W_. bits set the corresponding switch channel-wetting current as shown in Table 5. Table 5. Wetting Current Setting W_. W_. WETTING CURRENT (ma) * 5 5 *Default POR value. LP: Low Quiescent Current Bit In polling mode, when LP is set to, the IC is operating with the lowest quiescent current. The channels that are not enabled to interrupt have their wetting current disabled and are not monitored. The first pulse of wetting current after the switch is closed and sampled is 5mA unless the wetting current for that channel is set to ma. The default value of LP after power-on is. When LP is, all channels are monitored and the wetting current for each channel is set to the value determined by W_. and W_.. If the is in continuous mode, LP is ignored. Operating Modes The features three modes of operation: continuous mode, polling mode, and shutdown mode. In continuous mode, the wetting currents (if enabled) are continuously applied to the closed switches. In polling mode, the wetting currents are applied to the closed switches for a preset duration to reduce the power consumption. In shutdown mode, all switch inputs are high impedance and all circuitry is shutdown. Continuous Mode Operation (P P3 = ) In continuous mode, reading of the switch status is initiated by a falling edge on CS. The microcontroller initiates a low pulse on CS to update the switch status register. If INT remains high, no action needs be taken by the microcontroller. If INT goes low, the microcontroller may perform a read operation to read the updated switch status. On the rising edge of CS, INT is updated. To get correct data, the microcontroller must wait µs before initiating a switch status read operation. (See Figure 4.) CS INT SWITCH STATUS CHANGE Figure 4. Continuous Mode Operation INT UPDATED, PERFORM READ OPERATION Polling-Mode Operation In polling mode (see Figure 5), each switch input is sampled for a programmable polling active time set by the PA PA2 bits between 64µs and 4ms (see Table 4). Sampling is repeated at a period set by the P P3 bits (from 4ms to continuous, see Table 3). All switch inputs are sampled simultaneously at the end of the polling active time. Wetting currents (if enabled) are applied to closed switches during the polling active time. Therefore, the polling mode reduces the current consumption from the VS power supply to some value dependent on the polling time chosen. GROUND-CONNECTED SWITCH-INPUT POLLING ACTIVE TIME SWITCH POSITION SAMPLED POLLING TIME POLLING ACTIVE TIME SWITCH POSITION SAMPLED INT SWITCH OPEN Figure 5. Switch Sampling in Polling Mode 2

13 Any switch position change (if the switch is interruptenabled) is signaled through the active-low open-drain INT output. The INT output is cleared when CS goes low. Shutdown Mode In shutdown mode, all switch inputs are high impedance and the external switches are no longer monitored, reducing current consumption on VS to 6µA (typ). The IC resets upon entering shutdown mode and the contents of the command registers are lost. Therefore, any setting other than power-on-reset defaults needs to be reprogrammed after exiting from the shutdown mode. Applications Information Overtemperature Protection If the IC junction temperature exceeds +65 C, an interrupt signal is generated and the wetting currents are disabled to reduce the on-chip power dissipation. During an overtemperature event, the last switch status is retained in internal memory and the switch status is not updated. The interrupt output is cleared when CS goes high, but the overtemperature bit T in the output word remains for as long as the overtemperature condition persists. When the junction temperature drops by 5 C, the wetting currents are re-enabled and there is a ms blanking time before the switches can be polled. Reverse-Battery Tolerance The IN IN23 switch inputs withstand up to -5V DC voltage without damage. A reverse-battery diode is needed to protect VS as shown in the Typical Application Circuit. SD can be controlled from a battery-level source but should be protected against reverse battery in the application. Wetting Current and Power Dissipation The maximum power dissipation happens when all switch inputs configured with 5mA continuous wetting current are all closed. Assuming the battery voltage is 4V, the corresponding power dissipated by the IC is 24 x 4V x 5mA = 54mW. This exceeds the absolute maximum power dissipation of 2963mW. In polling mode, the wetting currents are pulsed at the programmed polling time to reduce the total power dissipated in the IC. ISO 7637 Pulse Immunity VS, SD, and IN IN23 are potentially exposed to ISO 7637 pulses. Bypass VS with a.µf and a 47µF capacitor. The VS and SD voltage must be limited below 4V during load dump. Bypass IN IN23 with at least.47µf capacitors at the ECU connector. When IN IN3 or IN23 inputs are used with battery-connected switches, a Ω series resistor is needed. These external components allow VS, SD, and IN IN23 to withstand ISO 7637 pulses in the application circuit. Mechanical Switch Characteristics The is designed to operate with switches that have the following characteristics: ) Minimum resistance value with switch open (due to leakage): kω. 2) Maximum resistance value with switch closed: Ω. PROCESS: BiCMOS Chip Information 3

14 Package Information For the latest package outline information and land patterns, go to PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 4 TQFN-EP T Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 4 Maxim Integrated Products, 2 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.