LT1074/LT1076 Step-Down Switching Regulator

LT174/LT176 Step-Down Switching Regulator FEATRES 5A On-Board Switch (LT174) 1kHz Switching Frequency Greatly Improved Dynamic Behavior Available in Low Cost 5 and 7-Lead Packages Only 8.5mA Quiescent Current Programmable Current Limit Operates p to 6V Input Micropower Shutdown Mode APPLICATI O DESCRIPTIO S Buck Converter with Output Voltage Range of 2.5V to 5V Tapped-Inductor Buck Converter with 1A Output at 5V Positive-to-Negative Converter Negative Boost Converter Multiple Output Buck Converter The LT174 is a 5A (LT176 is rated at 2A) monolithic bipolar switching regulator which requires only a few external parts for normal operation. The power switch, all oscillator and control circuitry, and all current limit components, are included on the chip. The topology is a classic positive buck configuration but several design innova- tions allow this device to be used as a positive-to-negative converter, a negative boost converter, and as a flyback converter. The switch output is specified to swing 4V below ground, allowing the LT174 to drive a tappedinductor in the buck mode with output currents up to 1A. The LT174 uses a true analog multiplier in the feedback loop. This makes the device respond nearly instantaneously to input voltage fluctuations and makes loop gain independent of input voltage. As a result, dynamic behavior of the regulator is significantly improved over previous designs. On-chip pulse by pulse current limiting makes the LT174 nearly bust-proof for output overloads or shorts. The input voltage range as a buck converter is 8V to 6V, but a selfboot feature allows input voltages as low as 5V in the inverting and boost configurations. The LT174 is available in low cost TO-22 or TO-3 packages with frequency pre-set at 1kHz and current limit at 6.5A (LT176 = 2.6A). A 7-pin TO-22 package is also available which allows current limit to be adjusted down to zero. In addition, full micropower shutdown can be programmed. See Application Note 44 for design details. A fixed 5V output, 2A version is also available. See LT176-5. TYPICAL APPLICATI O Basic Positive Buck Converter Buck Converter Efficiency 1V TO 4V V SW L1** 5 µ H (LT174) 1 µ H (LT176) 1% 5V 5A LT174 MBR745* R1 2.8k 1% GND V C R3 R2 2.7k 2.21k C3 C2 C1 2 µ F.1 µ F 5 µ F 25V *SE MBR34 FOR LT176 **COILTRONICS #5-2-52 (LT174) #1-1-52 (LT176) PLSE ENGINEERING, INC. #PE-92114 (LT174) #PE-9212 (LT176) HRRICANE #HL-AK147QQ (LT174) #HL-AG21LL (LT176) RIPPLE CRRENT RATING I OT / 2 EFFICIENCY (%) 1 9 8 7 6 5 LT174 V OT = 12V, = 2V V OT = 5V, = 15V L = 5 µ H TYPE 52 CORE DIODE = MBR735 1 2 3 4 5 6 LT174 TA1 OTPT LOAD CRRENT (A) LT174 TPC27 1

LT174/LT176 ABSOLTE AXI RATI GS W W W Input Voltage LT174/ LT176... 45V LT174HV/76HV... 64V Switch Voltage with Respect to Input Voltage LT174/ 76... 64V LT174HV/76HV... 75V Switch Voltage with Respect to Ground Pin (V SW Negative) LT174/76 (Note 6)... 35V LT174HV/76HV (Note 6)... 45V Feedback Pin Voltage... 2V, 1V Shutdown Pin Voltage (Not to Exceed )... 4V I LIM Pin Voltage (Forced)... 5.5V Maximum Operating Ambient Temperature Range LT174C/76C, LT174HVC/76HVC... C to 7 C LT174I/76I, LT174HVI/76HVI... 4 C to 85 C LT174M/76M, LT174HVM/76HVM... 55 C to 125 C Maximum Operating Junction Temperature Range LT174C/76C, LT174HVC/76HVC... C to 125 C LT174I/76I, LT174HVI/76HVI... 4 C to 125 C LT174M/76M, LT174HVM/76HVM... 55 C to 15 C Maximum Storage Temperature... 65 C to 15 C Lead Temperature (Soldering, 1 sec)... 3 C PACKAGE/ORDER I FOR FRONT VIEW 5 4 3 2 1 FRONT VIEW 7 6 5 4 3 2 1 R PACKAGE 7-LEAD PLASTIC DD V SW GND V C /SENSE Q PACKAGE 5-LEAD PLASTIC DD LT176: θ JC = 4 C/W, θ JA = 3 C/W* SHDN V C /SENSE GND I LIM V SW LT176: θ JC = 4 C/W, θ JA = 3 C/W* FRONT VIEW 7 SHTDOWN 6 V C 5 4 GND 3 ILIM 2 V 1 SW Y PACKAGE, 7-LEAD TO-22 LT174: θ JC = 2.5 C/W, θ JA = 5 C/W LT176: θ JC = 4 C/W, θ JA = 5 C/W W ATIO ORDER PART NMBER LT176CQ LT176CR LT176HVCR LT174CY LT174HVCY LT174IY LT174HVIY LT176CY LT176HVCY * Assumes package is soldered to.5 IN 2 of 1 oz. copper over internal ground plane or over back side plane. V C BOTTOM VIEW 1 2 4 3 V SW CASE IS GND K PACKAGE, 4-LEAD TO-3 METAL CAN LT174: θ JC = 2.5 C/W, θ JA = 35 C/W LT176: θ JC = 4 C/W, θ JA = 35 C/W FRONT VIEW 5 4 3 2 1 VIN VSW GND V C T PACKAGE, 5-LEAD T-22 LEADS ARE FORMED STANDARD FOR STRAIGHT LEADS, ORDER FLOW 6 LT174: θ JC = 2.5 C/W, θ JA = 5 C/W LT176: θ JC = 4 C/W, θ JA = 5 C/W ORDER PART NMBER LT174CK LT174HVCK LT174MK LT174HVMK LT176CK LT176HVCK LT176MK LT176HVMK LT174CT LT174HVCT LT174IT LT174HVIT LT176CT LT176HVCT LT176IT ELECTRICAL CHARA CTERISTICS PARAMETER CONDITIONS MIN TYP MAX NITS Switch On Voltage (Note 1) LT174 I SW = 1A, T j C 1.85 V I SW = 1A, T j < C 2.1 V I SW = 5A, T j C 2.3 V I SW = 5A, T j < C 2.5 V LT176 I SW =.5A 1.2 V I SW = 2A 1.7 V 2 T j = 25 C, = 25V, unless otherwise noted.

ELECTRICAL CHARA CTERISTICS T j = 25 C, = 25V, unless otherwise noted. LT174/LT176 PARAMETER CONDITIONS MIN TYP MAX NITS Switch Off Leakage LT174 25V, V SW = 5 3 µa = V MAX, V SW = (Note 7) 1 5 µa LT176 = 25V, V SW = 15 µa = V MAX, V SW = (Note 7) 25 µa Supply Current (Note 2) V = 2.5V, 4V 8.5 11 ma 4V < < 6V 9 12 ma V SHT =.1V (Device Shutdown) (Note 8) 14 3 µa Minimum Supply Voltage Normal Mode 7.3 8 V Startup Mode (Note 3) 3.5 4.8 V Switch Current Limit (Note 4) LT174 I LIM Open 5.5 6.5 8.5 A R LIM = 1k (Note 5) 4.5 A R LIM = 7k (Note 5) 3 A LT176 I LIM Open 2 2.6 3.2 A R LIM = 1k (Note 5) 1.8 A R LIM = 7k (Note 5) 1.2 A Maximum Duty Cycle 85 9 % Switching Frequency 9 1 11 khz T j 125 C 85 12 khz T j > 125 C 85 125 khz V = V through 2kΩ (Note 4) 2 khz Switching Frequency Line Regulation 8V V MAX (Note 7).3.1 %/V Error Amplifier Voltage Gain (Note 6) 1V V C 4V 2 V/V Error Amplifier Transconductance 37 5 8 µmho Error Amplifier Source and Sink Current Source (V = 2V) 1 14 225 µa Sink (V = 2.5V).7 1 1.6 ma Feedback Pin Bias Current V = V REF.5 2 µa Reference Voltage V C = 2V 2.155 2.21 2.265 V Reference Voltage Tolerance V REF (Nominal) = 2.21V ±.5 ± 1.5 % All Conditions of Input Voltage, Output ± 1 ± 2.5 % Voltage, Temperature and Load Current Reference Voltage Line Regulation 8V V MAX (Note 7).5.2 %/V V C Voltage at % Duty Cycle 1.5 V Over Temperature 4 mv/ C Multiplier Reference Voltage 24 V Shutdown Pin Current V SH = 5V 5 1 2 µa V SH V THRESHOLD ( 2.5V) 5 µa Shutdown Thresholds Switch Duty Cycle = 2.2 2.45 2.7 V Fully Shut Down.1.3.5 V Thermal Resistance Junction to Case LT174 2.5 C/W LT176 4. C/W The denotes the specifications which apply over the full operating temperature range. Note 1: To calculate maximum switch on voltage at currents between low and high conditions, a linear interpolation may be used. Note 2: A feedback pin voltage (V ) of 2.5V forces the V C pin to its low clamp level and the switch duty cycle to zero. This approximates the zero load condition where duty cycle approaches zero. Note 3: Total voltage from pin to ground pin must be 8V after startup for proper regulation. Note 4: Switch frequency is internally scaled down when the feedback pin voltage is less than 1.3V to avoid extremely short switch on times. During testing, V is adjusted to give a minimum switch on time of 1µs. R Note 5: I LIM LIM 1k R (LT174), I LIM LIM 1k (LT176). 2k 5.5k Note 6: Switch to input voltage limitation must also be observed. Note 7: V MAX = 4V for the LT174/76 and 6V for the LT174HV/76HV. Note 8: Does not include switch leakage. 3

LT174/LT176 BLOCKDAGRA I W INPT SPPLY LT174 1 µ A 32 µ A.3V 6V µ -POWER REGLATOR 6V TO ALL SHTDOWN AND BIAS CIRCITRY 2.35V CRRENT LIMIT SHTDOWN CRRENT LIMIT COMP C2 5Ω 25 Ω.4 SHTDOWN* I LIM* 4.5V 1k FREQ SHIFT SYNC 1kHz OSCILLATOR 3V(p-p) R R/S S Q LATCH R G1 2.21V A1 ERROR AMP Z ANALOG X MLTIPLIER XY Z Y C1 PLSE WIDTH COMPARATOR 4 Ω 15Ω SWITCH OTPT (V SW) VC 24V (EQIVALENT) LT176.1Ω *AVAILABLE ON PACKAGES WITH PIN CONTS GREATER THAN 5. 1Ω SWITCH OTPT (V SW) LT174 BD1 4

LT174/LT176 BLOCK DAGRA I W DESCRIPTIO A switch cycle in the LT174 is initiated by the oscillator setting the R/S latch. The pulse that sets the latch also locks out the switch via gate G1. The effective width of this pulse is approximately 7ns, which sets the maximum switch duty cycle to approximately 93% at 1kHz switching frequency. The switch is turned off by comparator C1, which resets the latch. C1 has a sawtooth waveform as one input and the output of an analog multiplier as the other input. The multiplier output is the product of an internal reference voltage, and the output of the error amplifier, A1, divided by the regulator input voltage. In standard buck regulators, this means that the output voltage of A1 required to keep a constant regulated output is independent of regulator input voltage. This greatly improves line transient response, and makes loop gain independent of input voltage. The error amplifier is a transconductance type with a G M at null of approximately 5µmho. Slew current going positive is 14µA, while negative slew current is about 1.1mA. This asymmetry helps prevent overshoot on start-up. Overall loop frequency compensation is accomplished with a series RC network from V C to ground. Switch current is continuously monitored by C2, which resets the R/S latch to turn the switch off if an overcurrent condition occurs. The time required for detection and switch turn off is approximately 6ns. So minimum switch on time in current limit is 6ns. nder dead shorted output conditions, switch duty cycle may have to be as low as 2% to maintain control of output current. This would require switch on time of 2ns at 1kHz switching frequency, so frequency is reduced at very low output voltages by feeding the signal into the oscillator and creating a linear frequency downshift when the signal drops below 1.3V. Current trip level is set by the voltage on the I LIM pin which is driven by an internal 32µA current source. When this pin is left open, it self-clamps at about 4.5V and sets current limit at 6.5A for the LT174 and 2.6A for the LT176. In the 7-pin package an external resistor can be connected from the I LIM pin to ground to set a lower current limit. A capacitor in parallel with this resistor will soft start the current limit. A slight offset in C2 guarantees that when the I LIM pin is pulled to within 2mV of ground, C2 output will stay high and force switch duty cycle to zero. The Shutdown pin is used to force switch duty cycle to zero by pulling the I LIM pin low, or to completely shut down the regulator. Threshold for the former is approximately 2.35V, and for complete shutdown, approximately.3v. Total supply current in shutdown is about 15µA. A 1µA pull-up current forces the shutdown pin high when left open. A capacitor can be used to generate delayed startup. A resistor divider will program undervoltage lockout if the divider voltage is set at 2.35V when the input is at the desired trip point. The switch used in the LT174 is a Darlington NPN (single NPN for LT176) driven by a saturated PNP. Special patented circuitry is used to drive the PNP on and off very quickly even from the saturation state. This particular switch arrangement has no isolation tubs connected to the switch output, which can therefore swing to 4V below ground. 5

LT174/LT176 TYPICAL PERFOR A W CE CHARA CTERISTICS CRRENT (ma) 2 15 1 5 5 1 15 2 V C Pin Characteristics V C Pin Characteristics Feedback Pin Characteristics V ADJSTED FOR I C = AT V C = 2V SLOPE 4kΩ V 2V 1 2 3 4 VOLTAGE (V) 5 6 7 8 9 LT174 TPC1 CRRENT (ma) 2. 1.5 1..5.5 1. 1.5 2. V 2.5V 1 2 3 4 VOLTAGE (V) 5 6 7 8 9 LT174 TPC2 CRRENT ( µ A) 5 4 3 2 1 1 2 3 4 5 START OF FREQENCY SHIFTING 1 2 3 4 5 6 7 8 9 1 VOLTAGE (V) LT174 TPC3 CRRENT ( µ A) 4 3 2 1 1 2 3 4 Shutdown Pin Characteristics Shutdown Pin Characteristics I LIM Pin Characteristics = 5V THIS POINT MOVES WITH 1 DETAILS OF THIS AREA SHOWN IN OTHER GRAPH 2 3 4 5 6 7 8 CRRENT ( µ A) 5 1 15 2 25 3 35 4 T j = 25 C CRRENT FLOWS OT OF SHTDOWN PIN SHTDOWN THRESHOLD CRRENT ( µ A) 1 5 1 15 2 25 3 35 4.5 1. 1.5 2. 2.5 3. 3.5 4. 2 5 T j = 25 C 1 1 2 3 4 5 6 7 8 VOLTAGE (V) LT174 TPC4 VOLTAGE (V) LT174 TPC5 VOLTAGE (V) LT174 TPC6 INPT CRRENT (ma) Supply Current 2 18 16 14 DEVICE NOT SWITCHING 12 V C = 1V 1 8 6 4 2 1 2 3 4 5 6 INPT VOLTAGE (V) LT174 TPC11 6

LT174/LT176 TYPICAL PERFOR INPT CRRENT ( µ A) 3 25 2 15 1 5 A W CECHARA CTERISTICS Reference Voltage vs Supply Current (Shutdown) Temperature Switch On Voltage VOLTAGE (V) 2.25 2.24 2.23 2.22 2.21 2.2 2.19 2.18 "ON" VOLTAGE (V) 3. 2.5 2. LT174 1.5 LT176 1. T j = 25 C 1 2 3 4 5 6 2.17 5 25 25 5 75 1 125 15.5 1 2 3 4 5 6 INPT VOLTAGE (V) LT174 TPC13 JNCTION TEMPERATRE ( C) LT174 TPC14 SWITCH CRRENT (A) LT174 TPC28 CHANGE IN REFERENCE VOLTAGE (mv) 2 1 1 2 3 4 5 6 7 8 Reference Shift with Ripple Switching Frequency vs Voltage Error Amplifier Phase and G M Temperature SQARE WAVE TRI WAVE 2 4 6 8 1 12 14 16 18 2 ( µ mho) TRANSCONDCTANCE 8k 7k 6k 5k 4k 3k 2k 1k G M 2 15 1 2 1k 1k 1k 1M 1M θ 5 5 1 15 PHASE ( ) FREQENCY (khz) 12 115 11 15 1 95 9 85 8 5 25 25 5 75 1 125 15 PEAK-TO-PEAK RIPPLE AT PIN (mv) LT174 TPC16 FREQENCY (Hz) LT174 TPC17 JNCTION TEMPERATRE ( C) LT174 TPC18 16 Feedback Pin Frequency Shift 8 Current Limit vs Temperature* SWITCHING FREQENCY (khz) 14 12 1 8 6 4 2 15 C 55 C 25 C.5 1. 1.5 2. 2.5 3. OTPT CRRENT LIMIT (A) 7 6 5 4 3 2 I LIM PIN OPEN R LIM = 5kΩ R LIM = 1kΩ 1 *MLTIPLY CRRENTS BY.4 FOR LT176 5 25 25 5 75 1 125 15 FEEDBACK PIN VOLTAGE (V) LT174 TPC19 JNCTION TEMPERATRE ( C) LT174 TPC22 7

LT174/LT176 PI PIN DESCRIPTIO The pin is both the supply voltage for internal control circuitry and one end of the high current switch. It is important, especially at low input voltages, that this pin be bypassed with a low ESR, and low inductance capacitor to prevent transient steps or spikes from causing erratic operation. At full switch current of 5A, the switching transients at the regulator input can get very large as shown in Figure 1. Place the input capacitor very close to the regulator and connect it with wide traces to avoid extra inductance. se radial lead capacitors. S VOT ( V )( GND V ) OT = 221. To ensure good load regulation, the ground pin must be connected directly to the proper output node, so that no high currents flow in this path. The output divider resistor should also be connected to this low current connection line as shown in Figure 2. LT174 di ( dt)( L P ) GND R2 Figure 1. Input Capacitor Ripple L P = Total inductance in input bypass connections and capacitor. Spike height (di/dt L P ) is approximately 2V per inch of lead length for LT174 and.8v per inch for LT176. Step for ESR =.5Ω and I SW = 5A is.25v. Ramp for C = 2µF, T ON = 5µs, and I SW = 5A, is.12v. Input current on the Pin in shutdown mode is the sum of actual supply current ( 14µA, with a maximum of 3µA), and switch leakage current. Consult factory for special testing if shutdown mode input current is critical. GROND PIN STEP = ( I SW )( ESR) RAMP = ( )( T ) It might seem unusual to describe a ground pin, but in the case of regulators, the ground pin must be connected properly to ensure good load regulation. The internal reference voltage is referenced to the ground pin; so any error in ground pin voltage will be multiplied at the output; I SW C ON LT174 PD1 HIGH CRRENT RETRN PATH FEEDBACK PIN NEGATIVE OTPT NODE WHERE LOAD REGLATION WILL BE MEASRED Figure 2. Proper Ground Pin Connection LT174 PD2 The feedback pin is the inverting input of an error amplifier which controls the regulator output by adjusting duty cycle. The non-inverting input is internally connected to a trimmed 2.21V reference. Input bias current is typically.5µa when the error amplifier is balanced (I OT = ). The error amplifier has asymmetrical G M for large input signals to reduce startup overshoot. This makes the amplifier more sensitive to large ripple voltages at the feedback pin. 1mVp-p ripple at the feedback pin will create a 14mV offset in the amplifier, equivalent to a.7% output voltage shift. To avoid output errors, output ripple (P-P) should be less than 4% of DC output voltage at the point where the output divider is connected. See the Error Amplifier section for more details. Frequency Shifting at the Feedback Pin The error amplifier feedback pin () is used to downshift the oscillator frequency when the regulator output voltage 8

LT174/LT176 PI is low. This is done to guarantee that output short circuit current is well controlled even when switch duty cycle must be extremely low. Theoretical switch on time for a buck converter in continuous mode is; t ON DESCRIPTIO V = V OT IN VD f V D = Catch diode forward voltage (.5V) f = Switching frequency At f = 1kHz, t ON must drop to.2µs when = 25V and the output is shorted (V OT = V). In current limit, the LT174 can reduce t ON to a minimum value of.6µs, much too long to control current correctly for V OT =. To correct this problem, switching frequency is lowered from 1kHz to 2kHz as the pin drops from 1.3V to.5v. This is accomplished by the circuitry shown in Figure 3. V C ERROR AMPLIFIER 2V 2.21V Figure 3. Frequency Shifting Q1 is off when the output is regulating (V = 2.21V). As the output is pulled down by an overload, V will eventually reach 1.3V, turning on Q1. As the output continues to drop, Q1 current increases proportionately and lowers the frequency of the oscillator. Frequency shifting starts when the output is 6% of normal value, and is down to its minimum value of 2kHz when the output is 2% of normal value. The rate at which frequency is shifted is determined by both the internal 3k resistor R3 and the external divider resistors. For this reason, R2 should not be increased to more than 4kΩ, if the LT174 will be subjected to the simultaneous conditions of high input voltage and output short circuit. S Q1 R3 3k TO OSCILLATOR R1 R2 2.21k V OT EXTERNAL DIVIDER LT174 PD3 SHTDOWN PIN The shutdown pin is used for undervoltage lockout, micropower shutdown, soft start, delayed start, or as a general purpose on/off control of the regulator output. It controls switching action by pulling the I LIM pin low, which forces the switch to a continuous off state. Full micropower shutdown is initiated when the shutdown pin drops below.3v. The V/I characteristics of the shutdown pin are shown in Figure 4. For voltages between 2.5V and, a current of 1µA flows out of the shutdown pin. This current increases to 25µA as the shutdown pin moves through the 2.35V threshold. The current increases further to 3µA at the.3v threshold, then drops to 15µA as the shutdown voltage falls below.3v. The 1µA current source is included to pull the shutdown pin to its high or default state when left open. It also provides a convenient pullup for delayed start applications with a capacitor on the shutdown pin. When activated, the typical collector current of Q1 in Figure 5, is 2mA. A soft start capacitor on the I LIM pin will delay regulator shutdown in response to C1, by (5V)(C LIM )/2mA. Soft start after full micropower shutdown is ensured by coupling C2 to Q1. CRRENT ( µ A) 5 1 15 2 25 3 35 4 T j = 25 C CRRENT FLOWS OT OF SHTDOWN PIN.5 SHTDOWN THRESHOLD 1. 1.5 2. 2.5 3. 3.5 4. VOLTAGE (V) LT174 TPC5 Figure 4. Shutdown Pin Characteristics 9

LT174/LT176 PI SHTDOWN PIN DESCRIPTIO 1 µ A 2.3V.3V C1 C2 S 3 µ A Q1 ILIM PIN 6V TO TOTAL REGLATOR SHTDOWN EXTERNAL C LIM Hysteresis in undervoltage lockout may be accomplished by connecting a resistor (R3) from the I LIM pin to the shutdown pin as shown in Figure 7. D1 prevents the shutdown divider from altering current limit. R1 R2 *1N4148 R3 D1* VIN SHT LT174 I LIM OPTIONAL CRRENT LIMIT RESISTOR Figure 7. Adding Hysteresis LT174 PD9 ndervoltage Lockout Figure 5. Shutdown Circuitry LT174 PD7 ndervoltage lockout point is set by R1 and R2 in Figure 6. To avoid errors due to the 1µA shutdown pin current, R2 is usually set at 5k, and R1 is found from: ( SH) SH R R V TP 1= 2 V V V TP = Desired undervoltage lockout voltage. V SH = Threshold for lockout on the shutdown pin = 2.45V. If quiescent supply current is critical, R2 may be increased up to 15kΩ, but the denominator in the formula for R2 should replace V SH with V SH (1µA)(R2). R1 R2 5k VIN SHT LT174 GND LT174 PD8 Figure 6. ndervoltage Lockout R1 Trip Point = VTP = 235. V 1 R2 If R3 is added, the lower trip point ( descending) will be the same. The upper trip point (V TP ) will be; VTP R1 R1 = V V R 1 SH 1 8. R2 R3 R3 If R1 and R2 are chosen, R3 is given by R3 ( VSH 8. V )( R1 ) = R1 VTP VSH 1 R2 Example: An undervoltage lockout is required such that the output will not start until = 2V, but will continue to operate until drops to 15V. Let R2 = 2.32k. 15V 2 35V R1=( 2 32k) (. ). = 12. 5k ( 235V 235 8 )(... 125. ) R3 = k 2 2 35 1 12 5 = 39... 232. 1

LT174/LT176 PI I LIM PIN DESCRIPTIO The I LIM pin is used to reduce current limit below the preset value of 6.5A. The equivalent circuit for this pin is shown in Figure 8. TO LIMIT CIRCIT Q1 R1 8K D1 S 32 µ A D2 D3 6V 4.3V from forcing current back into the I LIM pin. To calculate a value for R, first calculate R LIM, then R ; R = ( )( ) ( ) ISC.44* RL 5. * RL 1kΩ ISC ( Rink L Ω) *Change.44 to.16, and.5 to.18 for LT176. Example: I LIM = 4A, I SC = 1.5A, R LIM = (4)(2k) 1k = 9k R = ( )( ) 15.. 44 9kΩ 5. ( 9k 1k) 15. I LIM LT147 PD12 Figure 8. I LIM Pin Circuit When I LIM is left open, the voltage at Q1 base clamps at 5V through D2. Internal current limit is determined by the current through Q1. If an external resistor is connected between I LIM and ground, the voltage at Q1 base can be reduced for lower current limit. The resistor will have a voltage across it equal to (32µA) (R), limited to 5V when clamped by D2. Resistance required for a given current limit is R LIM = I LIM (2kΩ) 1kΩ (LT174) R LIM = I LIM (5.5kΩ) 1kΩ (LT176) As an example, a 3A current limit would require 3A (2k) 1k = 7kΩ for the LT174. The accuracy of these formulas is ±25% for 2A I LIM 5A (LT174) and.7a I LIM 1.8A (LT176), so I LIM should be set at least 25% above the peak switch current required. Foldback current limiting can be easily implemented by adding a resistor from the output to the I LIM pin as shown in Figure 9. This allows full desired current limit (with or without R LIM ) when the output is regulating, but reduces current limit under short circuit conditions. A typical value for R is 5kΩ, but this may be adjusted up or down to set the amount of foldback. D2 prevents the output voltage I LIM ERROR AMPLIFIER LT174 R LIM 1N4148 R D2 V OT LT174 PD13 Figure 9. Foldback Current Limit The error amplifier in Figure 1 is a single stage design with added inverters to allow the output to swing above and below the common mode input voltage. One side of the amplifier is tied to a trimmed internal reference voltage of 2.21V. The other input is brought out as the (feedback) pin. This amplifier has a G M (voltage in to current out ) transfer function of 5µmho. Voltage gain is determined by multiplying G M times the total equivalent output loading, consisting of the output resistance of Q4 and Q6 in parallel with the series RC external frequency compensation network. At DC, the external RC is ignored, and with a parallel output impedance for Q4 and Q6 of 4kΩ, voltage gain is 2. At frequencies above a few hertz, voltage gain is determined by the external compensation, R C and C C. 11

LT174/LT176 PI DESCRIPTIO S 5.8V Q4 9 µ A 9 µ A Q3 Q1 Q2 5 µ A 5 µ A D1 VC 9 µ A EXTERNAL FREQENCY COMPENSATION 2.21V X1.8 14 µ A D2 Q6 R C 3Ω C C ALL CRRENTS SHOWN ARE AT NLL CONDITION LT174 PD11 Figure 1. Error Amplifier G AV = m at midfrequencies 2π f CC AV = Gm RC at high frequencies Phase shift from the pin to the V C pin is 9 at midfrequencies where the external C C is controlling gain, then drops back to (actually 18 since is an inverting input) when the reactance of C C is small compared to R C. The low frequency pole where the reactance of C C is equal to the output impedance of Q4 and Q6 (r O ), is f POLE 1 = r C r 4 2π k Ω Although f POLE varies as much as 3:1 due to r O variations, mid-frequency gain is dependent only on G M, which is specified much tighter on the data sheet. The higher frequency zero is determined solely by R C and C C. The error amplifier has asymmetrical peak output current. Q3 and Q4 current mirrors are unity gain, but the Q6 mirror has a gain of 1.8 at output null and a gain of 8 when the pin is high (Q1 current = ). This results in a maximum positive output current of 14µA and a maximum negative (sink) output current of 1.1mA. The asymmetry is deliberate it results in much less regulator output overshoot during rapid start-up or following the release of an output overload. Amplifier offset is kept low by area scaling Q1 and Q2 at 1.8:1. Amplifier swing is limited by the internal 5.8V supply for positive outputs and by D1 and D2 when the output goes low. Low clamp voltage is approximately one diode drop (.7V 2mV/ C). Note that both the pin and the V C pin have other internal connections. Refer to the frequency shifting and sychronizing discussions. 12 1 fzero = 2π RC CC

LT174/LT176 TYPICAL APPLICATI O S Tapped-Inductor Buck Converter 2V - 35V C3 2 µ F 5V LT174HV GND V C V SW R3 1k C2.2 µ F D2 35V 5W D3 1N5819 L1* 3 1 D1**.1 µ F R1 2.8k R2 2.21k L2 5 µ H C1 44 µ F (2 EA 22 µ F, 16V) VOT 5V, 1A C4 39 µ F 16V *PLSE ENGINEERING #PE65282 **MOTOROLA MBR23CTL IF INPT VOLTAGE IS BELOW 2V, MAXIMM OTPT CRRENT WILL BE REDCED. SEE AN44 LT174 TA2 Positive-to-Negative Converter with 5V Output VIN 4.5V to 4V C1 22 µ F 5V L1 25 µ H 5A GND LT174 V C VSW V C3.1 µ F R1** 5.1k R2** 1k D1 MBR745 C4**.1 µ F R3* 2.74k R4 1.82k* C2 1 µ F 1V OPTIONAL FILTER 5 µ H 2 µ F 1V 5V,1A*** * = 1% FILM RESISTORS D1 = MOTOROLA-MBR745 C1 = NICHICON-PL1C221MRH6 C2 = NICHICON-PL1A12MRH6 L1 = COILTRONICS-CTX25-5-52 LOWER REVERSE VOLTAGE RATING MAY BE SED FOR LOWER INPT VOLTAGES. LOWER CRRENT RATING IS ALLOWED FOR LOWER OTPT CRRENT. SEE AN44. LOWER CRRENT RATING MAY BE SED FOR LOWER OTPT CRRENT. SEE AN44. ** R1, R2, AND C4 ARE SED FOR LOOP FREQENCY COMPENSATION WITH LOW INPT VOLTAGE, BT R1 AND R2 MST BE INCLDED IN THE CALCLATION FOR OTPT VOLTAGE DIVIDER VALES. FOR HIGHER OTPT VOLTAGES, INCREASE R1, R2, AND R3 PROPORTIONATELY. FOR INPT VOLTAGE > 1V, R1, R2, AND C4 CAN BE ELIMINATED, AND COMPENSATION IS DONE TOTALLY ON THE V C PIN. R3 = V OT 2.37 (K Ω) R1 = (R3) (1.86) R2 = (R3) (3.65) *** MAXIMM OTPT CRRENT OF 1A IS DETERMINED BY MINIMM INPT VOLTAGE OF 4.5V. HIGHER MINIMM INPT VOLTAGE WILL ALLOW MCH HIGHER OTPT CRRENTS. SEE AN44. LT174 TA3 13

LT174/LT176 TYPICAL APPLICATI O S Negative Boost Converter 1pF R1 12.7k 2 µ F 15V VIN 5 TO 15V LT174 R2 V GND V SW 2.21k C C1 C3 L1 1 µ F C2 25 µ H D1* 25V 1nF.1 µ F R3 75Ω *MBR735 ** I OT (MAX) = 1A-3A DEPENDING ON INPT VOLTAGE. SEE AN44 5 µ H 1 µ F OPTIONAL OTPT FILTER V OT** 15V LT174 TA4 PACKAGE DESCRIPTIO Dimensions in inches (milimeters) unless otherwise noted. Q Package, 5-Lead PLASTIC DD R Package, 7-Lead PLASTIC DD.6 (1.524).41 ±.15 (1.185 ±.381).175 ±.8 (4.445 ±.23) 15 TYP.5 ±.8 (1.27 ±.23).6 (1.524).41 ±.15 (1.185 ±.381).175 ±.8 (4.445 ±.23) 15 TYP.5 ±.8 (1.27 ±.23).331.12.2 ( 8.47.35.58).59 (1.499) TYP.4.8.4 (.12.23.12).15 ±.8 (2.667 ±.23).331.12.2 ( 8.47.35.58).59 (1.499) TYP.4.8.4 (.12.23.12).15 ±.8 (2.667 ±.23).143.12.2 ( 3.632.35.58).32 ±.8 (.813 ±.23).67 ±.1 (1.72 ±.254).22 ±.5 (.559 ±.127).5 ±.12 (1.27 ±.35) DD5 693.143.12.2 ( 3.632.35.58).5 ±.1 (1.27 ±.254).3 ±.8 (.762 ±.23).22 ±.5 (.559 ±.127).5 ±.12 (1.27 ±.35) DD7 693 14

PACKAGE DESCRIPTIO Dimensions in inches (milimeters) unless otherwise noted..32.35 (8.13 8.89).42.48 (1.67 12.19).76.775 (19.3 19.69) K Package, 4-Lead TO-3 Metal Can.38.43 (.965 1.9).6.135 (1.524 3.429) 1.177 1.197 (29.9 3.4) 18.47 TP P.C.D. 72.655.675 (16.64 19.5).167.177 (4.24 4.49) R TYP.495.525 (12.57 13.34) R LT174/LT176.151.161 (3.84 4.9) DIA 2 PLC K4 592 T Package, 5-Lead TO-22.38.42 (9.652 1.668).139.153 (3.531 3.886) DIA.79.135 (2.7 3.429).169.185 (4.293 4.699).35.55 (.889 1.397).56.65 (14.224 16.51).866.913 (21.996 23.19).97 1.5 (24.64 26.67).46.5 (11.68 12.7).62 ±.2 (15.75 ±.58).7.728 (17.78 18.491).57.77 (1.448 1.956).28.35 (.711.889).15.25 (.381.635).21.24 (5.334 6.96).34.38 (7.722 9.652).55.9 (1.397 2.286).79.115 (2.7 2.921).149.23 (3.785 5.842) T5 (FORMED) 993 Y Package, 7-Lead Molded TO-22.39.41 (9.91 1.41).147.155 (3.73 3.94) DIA.169.185 (4.29 4.7).45.55 (1.14 1.4).13.113 (2.62 2.87).235.258 (5.97 6.55).56.59 (14.22 14.99).62 (15.75) TYP.7.728 (17.78 18.49).152.22 (3.86 5.13).26.32 (6.6 8.13).26.36 (.66.91).45.55 (1.14 1.4).16.22 (.41.56).135.165 (3.43 4.19).95.115 (2.41 2.92).155.195 (3.94 4.95) Y7 893 Information furnished by is believed to be accurate and reliable. However, no responsibility is assumed for its use. makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15

LT174/LT176 NORTHEAST REGION One Oxford Valley 23 E. Lincoln Hwy.,Suite 36 Langhorne, PA 1947 Phone: (215) 757-8578 FAX: (215) 757-5631 266 Lowell St., Suite B-8 Wilmington, MA 1887 Phone: (58) 658-3881 FAX: (58) 658-271.S. Area Sales Offices SOTHEAST REGION 176 Dallas Parkway Suite 28 Dallas, TX 75248 Phone: (214) 733-371 FAX: (214) 38-5138 CENTRAL REGION Chesapeake Square 229 Mitchell Court, Suite A-25 Addison, IL 611 Phone: (78) 62-691 FAX: (78) 62-6977 SOTHWEST REGION 22141 Ventura Blvd. Suite 26 Woodland Hills, CA 91364 Phone: (818) 73-835 FAX: (818) 73-517 NORTHWEST REGION 782 Sycamore Dr. Milpitas, CA 9535 Phone: (48) 428-25 FAX: (48) 432-6331 FRANCE Linear Technology S.A.R.L. Immeuble "Le Quartz" 58 Chemin de la Justice 9229 Chatenay Malabry France Phone: 33-1-4179555 FAX: 33-1-46314613 GERMANY Linear Techonolgy GmbH ntere Hauptstr. 9 D-85386 Eching Germany Phone: 49-89-319741 FAX: 49-89-3194821 JAPAN Linear Technology KK 5F YZ Bldg. 4-4-12 Iidabashi, Chiyoda-Ku Tokyo, 12 Japan Phone: 81-3-3237-7891 FAX: 81-3-3237-81 International Sales Offices KOREA Linear Technology Korea Branch Namsong Building, #55 Itaewon-Dong 26-199 Yongsan-Ku, Seoul Korea Phone: 82-2-792-1617 FAX: 82-2-792-1619 SINGAPORE Linear Technology Pte. Ltd. 11 Boon Keng Road #2-15 Kallang Ind. Estates Singapore 1233 Phone: 65-293-5322 FAX: 65-292-398 TAIWAN Rm. 81, No. 46, Sec. 2 Chung Shan N. Rd. Taipei, Taiwan, R.O.C. Phone: 886-2-521-7575 FAX: 886-2-562-2285 NITED KINGDOM Linear Technology (K) Ltd. The Coliseum, Riverside Way Camberley, Surrey G15 3YL nited Kingdom Phone: 44-276-677676 FAX: 44-276-64851 World Headquarters 163 McCarthy Blvd. Milpitas, CA 9535-7487 Phone: (48) 432-19 FAX: (48) 434-57 294 16 163 McCarthy Blvd., Milpitas, CA 9535-7487 (48) 432-19 FAX: (48) 434-57 TELEX: 499-3977 BA/GP 494 2K REV B PRINTED IN SA LINEAR TECHNOLOGY CORPORATION 1994