CELL PHONE BASED LAND ROVER

CELL PHONE BASED LAND ROVER BY G.Mounika (07241A0279) G.R.L.Keerthi (07241A0291) K.Spurthi (07241A02A8) B.Swathi (07241A02B1) Vishnu Manasa.K (07241A02B7) GOKARAJU RANGARAJU INSTITUTE OF ENGINEERING AND TECHNOLOGY (Approved by A.I.C.T.E and Affiliated to JNTU) (Bachupally,Kukatpally,Hyderabad -500 072.)

CONTENTS 1. ABSTRACT 2. CELL PHONE BASED LAND ROVER 3. DTMF DECODER MT 8870 4. 74LS04 HEX INVERTER 5. AT89C51 6. L293D 7. CODING USING KEIL 8. CONCLUSION 9. BIBILIOGRAPHY 10. APPENDIX

1. ABSTRACT In this project, the robot is controlled by a mobile phone that makes a call to the mobile phone attached to the robot. In the course of a call, if any button is pressed, a tone corresponding to the button pressed is heard at the other end of the call. This tone is called dual-tone multiple-frequency (DTMF) tone. The robot perceives this DTMF tone with the help of the phone stacked in the robot. The received tone is processed by the microcontroller with the help of DTMF decoder MT8870. The decoder decodes the DTMF tone into its equivalent binary digit and this binary number is sent to the microcontroller. The microcontroller is pre programmed to take a decision for any given input and outputs it s decision to motor drivers in order to drive the motors for forward or backward motion or a turn. The mobile that makes a call to the mobile phone stacked in the robot acts as a remote. So this simple robotic project does not require the construction of receiver and transmitter units.

2. CELL PHONE BASED LAND ROVER INTRODUCTION: Conventionally, wireless-controlled robots use RF circuits, which have the drawbacks of limited working range, limited frequency range and limited control. Use of a mobile phone for robotic control can overcome these limitations. It provides the advantages of robust control, working range as large as the coverage area of the service provider, no interference with other controllers and up to twelve controls. Although the appearance and capabilities of robots vary vastly, all robots share the features of a mechanical, movable structure under some form of control. The control of robot involves three distinct phases: perception, processing and action. Generally, the preceptors are sensors mounted on the robot, processing is done by the on-board microcontroller or processor, and the task (action)is performed using motors or with some other actuators. BLOCK DIAGRAM:

The block diagram of the cell phone based land rover consists of the following blocks. They are:- DTMF Decoder Microcontroller Motor Driver. CIRCUIT DIAGARM: An MT8870 series DTMF decoder is used here. All types of the MT8870 series use digital counting techniques to detect and decode all the 16 DTMF tone pairs into a 4-bit code output. The built-in dial tone rejection circuit eliminates the need for pre-filtering. When the input signal given at pin 2 (IN-) in single-ended input configuration is recognised to be effective, the correct 4-bit decode signal of the DTMF tone is transferred to Q1 (pin 11) through Q4 (pin 14) outputs. Q1 through Q4 outputs of the DTMF decoder (IC1) are connected to port pins PA0 through PA3 of microcontroller (IC2) after inversion by N1 through N4, respectively. Outputs from port pins PD0 through PD3 and PD7 of the microcontroller are fed

to inputs IN1 through IN4 and enable pins (EN1 and EN2) of motor driver L293D, respectively, to drive two geared DC motors. Switch S1 is used for manual reset. The microcontroller output is not sufficient to drive the DC motors, so current drivers are required for motor rotation. The L293D is a quad, high-current, half-h driver designed to provide bidirectional drive currents of up to 600 ma at voltages from 4.5V to 36V. It makes it easier to drive the DC motors. The L293D consists of four drivers. Pins IN1 through IN4 and OUT1 through OUT4 are input and output pins, respectively, of driver 1 through driver 4. Drivers 1 and 2, and drivers 3 and 4 are enabled by enable pin 1 (EN1) and pin 9 (EN2), respectively. When enable input EN1 (pin 1) is high, drivers 1 and 2 are enabled and the outputs corresponding to their inputs are active. Similarly, enable input EN2 (pin 9) enables drivers 3 and 4. WORKING OF THE CIRCUIT: In order to control the robot, you need to make a call to the cell phone attached to the robot (through head phone) from any phone, which sends DTMF tunes on pressing the numeric buttons. The cell phone in the robot is kept in auto answer mode. (If the mobile does not have the auto answering facility, receive the call by OK key on the rover-connected mobile and then made it in hands-free mode.) So after a ring, the cell phone accepts the call. The DTMF tones thus produced are received by the cell phone in the robot. These tones are fed to the circuit bythe headset of the cell phone. The MT8870 decodes the received tone and sends the equivalent binary number to the microcontroller. According to the program in the microcontroller, the robot starts moving. When you press key 2 (binary equivalent 00000010) on your mobile phone, the microcontroller outputs 10001001 binary equivalent. Port pins PD0, PD3 and PD7 are high. The high output at PD7 of the microcontroller drives the motor driver (L293D). Port pins PD0 and PD3 drive motors M1 and M2 in forward direction. Similarly, motors M1 and M2 move for left turn, right turn, backward motion and stop condition. HARDWARE REQUIREMENTS The main components of the hardware section of our project are given as:

Microcontroller Crystal Oscillator DTMF decoder IC(MT8870) Motor driver DC Motor Head-phone Resistors, Capacitors Hex inverter. ACTION PERFORMES TO CORRESPONDING KEY

3. DTMF DECODER MT 8870 DUAL TONE MULTI FREQUENCY (DTMF): Dual-tone multi-frequency (DTMF) signaling is used for telecommunication signalling over analog telephone lines in the voice-frequency band between telephone handsets and other communications devices and the switching centre. The version of DTMF used for telephone tone dialling is known by the trademarked term Touch-Tone (cancelled March 13, 1984), and is standardized by ITU-T Recommendation Q.23. It is also known in the UK as MF4. Other multi-frequency systems are used for signalling internal to the telephone network. As a method of in-band signaling, DTMF tones were also used by cable television broadcasters to indicate the start and stop times of local commercial insertion points during station breaks for the benefit of cable companies. Until better out-of-band signalling equipment was developed in the 1990s, fast, unacknowledged, and loud DTMF tone sequences could be heard during the commercial breaks of cable channels in the United States and elsewhere. TELEPHONE KEYPAD The contemporary keypad is laid out in a 3x4 grid, although the original DTMF keypad had an additional column for four now-defunct menu selector keys. When used to dial a telephone number, pressing a single key will produce a pitch consisting of two simultaneous pure tone sinusoidal frequencies. The row in which the key appears determines the low frequency, and the column determines the high frequency. For example, pressing the!1! key will result in a sound composed of both a 697 and a 1209 hertz (Hz) tone. The original keypads had levers inside, so each button activated two contacts. The multiple tones are the reason for calling the system multifrequency. These tones are then decoded by the switching center to determine which key was pressed.

DTMF KEYPAD FREQUENCIES: DTMF signaling is used for telephone signaling over the line in the voice-frequency band to the call switching centre. The version of DTMF used for telephone tone dialing is known as Touch-Tone. DTMF assigns a specific frequency (consisting of two separate tones) to each key so that it can easily be identified by the electronic circuit. The signal generated by the DTMF encoder is a direct algebraic summation, in real time, of the amplitudes of two sine (cosine) waves of different frequencies, i.e., pressing 5 will send a tone made by adding 1336 Hz and 770 Hz to the other end of the line. The tones and assignments in a DTMF system are shown in Table I. MT8870: The MT8870D/MT8870D-1 is a complete DTMF receiver integrating both the band split filter and digital decoder functions. The filter section uses switched capacitor techniques for

high and low group filters; the decoder uses digital counting techniques to detect and decode all 16 DTMF tone-pairs into a 4-bit code. The features of MT 8870 are: Complete DTMF Receiver Low power consumption Internal gain setting amplifier Adjustable guard time Central office quality Power-down mode Inhibit mode Backward compatible with MT8870C/MT8870C-1 The applications of MT 8870 are: Receiver system for British Telecom (BT) or CEPT Spec (MT8870D-1) Paging systems Repeater systems/mobile radio Credit card systems Remote control Personal computers Telephone answering machine

FUNCTIONAL BLOCK DIAGRAM: The MT8870D/MT8870D-1 monolithic DTMF receiver offers small size, low power consumption and high performance. Its architecture consists of a bandsplit filter section, which separates the high and low group tones, followed by a digital counting section which verifies the frequency and duration of the received tones before passing the corresponding code to the output bus. Filter Section

Separation of the low-group and high group tones is achieved by applying the DTMF signal to the inputs of two sixth-order switched capacitor bandpass filters, the bandwidths of which correspond to the low and high group frequencies. The filter section also incorporates notches at 350 and 440 Hz for exceptional dial tone rejection. Each filter output is followed by a single order switched capacitor filter section which smooth the signals prior to limiting. Limiting is performed by high-gain comparators which are provided with hysteresis to prevent detection of unwanted low-level signals. The outputs of the comparators provide full rail logic swings at the frequencies of the incoming DTMF signals. Decoder Section Following the filter section is a decoder employing digital counting techniques to determine the frequencies of the incoming tones and to verify that they correspond to standard DTMF frequencies. A complex averaging algorithm protects against tone simulation by extraneous signals such as voice while providing tolerance to small frequency deviations and variations. This averaging algorithm has been developed to ensure an optimum combination of immunity to talk-off and tolerance to the presence of interfering frequencies (third tones) and noise. When the detector recognizes the presence of two valid tones (this is referred to as the signal condition in some industry specifications) the Early Steering (ESt) output will go to an active state. Any subsequent loss of signal condition will cause ESt to assume an inactive state (see Steering Circuit ). Steering Circuit

Before registration of a decoded tone pair, the receiver checks for a valid signal duration (referred to as character recognition condition). This check is performed by an external RC time constant driven by ESt. A logic high on ESt causes vc to rise as the capacitor discharges. Provided signal condition is maintained (ESt remains high) for the validation period (tgtp), vc reaches the threshold (VTSt) of the steering logic to register the tone pair, latching its corresponding 4-bit code (see Table 1) into the output latch. At this point the GT output is activated and drives vc to VDD. GT continues to drive high as long as ESt remains high. Finally, after a short delay to allow the output latch to settle, the delayed steering output flag (StD) goes high, signalling that a received tone pair has been registered. The contents of the output latch are made available on the 4-bit output bus by raising the three state control input (TOE) to a logic high. The steering circuit works in reverse to validate the interdigit pause between signals. Thus, as well as rejecting signals too short to be considered valid, the receiver will tolerate signal interruptions (dropout) too short to be considered a valid pause. This facility, together with the capability of selecting the steering time constants externally, allows the designer to tailor performance to meet a wide variety of system requirements. Guard Time Adjustment In many situations not requiring selection of tone duration and interdigital pause, the simple steering circuit shown. Component values are chosen according to the formula:

trec=tdp+tgtp tid=tda+tgta PIN CONNECTIONS AND DESCRIPTIONS The above figure shows pin connections.

The above figure gives gives pin description. DTMF DATA OUTPUT:

4. 74LS04 HEX INVERTERS DESCRIPTION: These devices contain six independent inverters. The IC package is as follows. The functional table at each inverter is as follows:

The logic diagram i.e. positive logic is shown below The schematics at each gate are as follows:

5. ATMEL 89C51 AT89C51: AT89C51 is an 8-bit microcontroller and belongs to Atmel's 8051 family. AT89C51 has 4KB of Flash programmable and erasable read only memory (PEROM) and 128 bytes of RAM. It can be erased and program to a maximum of 1000 times.in 40 pin AT89C51, there are four ports designated as P 1, P 2, P 3 and P 0. All these ports are 8-bit bi-directional ports, i.e., they can be used as both input and output ports. Except P 0 which needs external pull-ups, rest of the ports have internal pull-ups. When 1s are written to these port pins, they are pulled high by the internal pull-ups and can be used as inputs. These ports are also bit addressable and so their bits can also be accessed individually. Port P 0 and P 2 are also used to provide low byte and high byte addresses, respectively, when connected to an external memory. Port 3 has multiplexed pins for special functions like serial communication, hardware interrupts, timer inputs and read/write operation from external memory. AT89C51 has an inbuilt UART for serial communication. It can be programmed to operate at different baud rates. Including two timers & hardware interrupts, it has a total of six interrupts.

PIN CONFIGURATION: FEATURES: Compatible with MCS-51 Products 4K Bytes of In-System Reprogrammable Flash Memory Endurance: 1,000 Write/Erase Cycles Fully Static Operation: 0 Hz to 24 MHz Three-level Program Memory Lock 128 x 8-bit Internal RAM 32 Programmable I/O Lines Two 16-bit Timer/Counters Six Interrupt Sources

Programmable Serial Channel Low-power Idle and Power-down Modes PIN DESCRIPTION: VCC Supply voltage. GND Ground. Port 0 Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs. Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pullups are required during program verification. Port 1 Port 1 is an 8-bit bi-directional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 1 also receives the low-order address bytes during Flash programming and verification. Port 2 Port 2 is an 8-bit bi-directional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application, it uses

strong internal pullups when emitting 1s. During access to external data memory that use 8- bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification. Port 3 Port 3 is an 8-bit bi-directional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the AT89C51 as listed below: Port Pin Alternate Functions P3.0 RXD (serial input port) P3.1 TXD (serial output port) P3.2 INT0 (external interrupt 0) P3.3 INT1 (external interrupt 1) P3.4 T0 (timer 0 external input) P3.5 T1 (timer 1 external input) P3.6 WR (external data memory write strobe) P3.7 RD (external data memory read strobe) Port 3 also receives some control signals for Flash programming and verification. RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.

ALE/PROG Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. PSEN Program Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. EA/VPP External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the inverting oscillator amplifier. Oscillator Characteristics XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source,

XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed. Idle Mode In idle mode, the CPU puts itself to sleep while all the on-chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory. Power-down Mode In the power-down mode, the oscillator is stopped, and the instruction that invokes powerdown is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated. The only exit from power-down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. Program Memory Lock Bits On the chip are three lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features. When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to function properly.

ARCHITECTURE:

6. L293D DESCRIPTION The L293 and L293D are quadruple high-current half-h drivers. The L293 is designed to provide bidirectional drive currents of up to 1 A at voltages from 4.5 V to 36 V. The L293D is designed to provide bidirectional drive currents of up to 600-mA at voltages from 4.5 V to 36 V. Both devices are designed to drive inductive loads such as relays, solenoids, dc and bipolar stepping motors, as well as other high-current/high-voltage loads in positive-supply applications. All nputs are TTL compatible. Each output is a complete totem-pole drive circuit, with a Darlington transistor sink and a pseudo-darlington source. Drivers are enabled in pairs, with drivers 1 and 2 enabled by 1,2EN and drivers 3 and 4 enabled by 3,4EN. When an enable input is high, the associated drivers are enabled and their outputs are active and in phase with their inputs. When the enable input is low, those drivers are disabled and their outputs are off and in the high-impedance state. With the proper data inputs, each pair of drivers forms a full-h (or bridge) reversible drive suitable for solenoid or motor applications. On the L293, external high-speed output clamp diodes should be used for inductive transient suppression. A VCC1 terminal, separate from VCC2, is provided for the logic inputs to minimize device power dissipation. The L293and L293D are characterized for operation from 0 C to 70 C. BLOCK DIAGRAM:

FUNCTION TABLE: LOGIC DIAGRAM

SCHEMATICS OF INPUTS AND OUTPUTS (L293) SCHEMATICS OF INPUTS AND OUTPUTS (L293D)

APPLICATION INFORMATION Two-Phase Motor Driver (L293)

Two-Phase Motor Driver (L293D)

DC Motor Controls (connections to ground and tosupply voltage) Bidirectional DC Motor Control

BIPOLAR STEPPING-MOTOR CONTROL

7. CODING USING KEIL KEIL SOFTWARE: Many companies provide the 8051 assembler, some of them provide shareware version of their product on the Web, Kiel is one of them. We can download them from their Websites. However, the size of code for these shareware versions is limited and we have to consider which assembler is suitable for our application. Keil Uvision2: This is an IDE (Integrated Development Environment) that helps you write, compile, and debug embedded programs. It encapsulates the following components: A project manager A make facility Tool configuration Editor A powerful debugger Building an Application in Uvision2: To build (compile, assemble, and link) an application in uvision2, you must: Select Project Open Project (For example, \C166\EXAMPLES\HELLO\HELLO.UV2) Select Project - Rebuild all target files or Build target. UVision2 compiles, assembles, and links the files in your project. Creating your Own Application in Uvision2: To create a new project in uvision2, you must: Select Project - New Project.

Select a directory and enter the name of the project file. Select Project - Select Device and select an 8051, 251, or C16x/ST10 device from the Device Database Create source files to add to the project. Select Project - Targets, Groups, and Files. Add/Files, select Source Group1, and add the source files to the project. Select Project - Options and set the tool options. Note when you select the target device from the Device Database all-special options are set automatically. You only need to configure the memory map of your target hardware. Default memory model settings are optimal for most. Applications: Select Project - Rebuild all target files or Build target. Debugging an Application in Uvision2: To debug an application created using uvision2, you must: Select Debug - Start/Stop Debug Session. Use the Step toolbar buttons to single-step through your program. Open the Serial Window using the Serial #1 button on the toolbar. Debug your program using standard options like Step, Go, Break, and So on.

PROJECT CODE: #include<reg51.h> #include<stdio.h> void main(void) { unsigned int k,h; while(1) { k=~p1; h=k & 0x0F; switch(h) { case 0x02: { P2=0x89;//Forward break; } case 0x08: { P2=0x86;//Backward break; } case 0x04: { P2=0x85;//Left turn break; } case 0x06: { P2=0x8A;//Right turn break;

} } } } case 0x05: { P2=0x00;//stop break; }

8. CONCLUSION Conventionally, wireless-controlled robots use RF circuits, which have the drawbacks of limited working range, limited frequency range and limited control. In our project with the use of a mobile phone for robotic control can overcome these limitations. It provides the advantages of robust control, working range as large as the coverage area of the service provider, no interference with other controllers and up to twelve controls. Although the appearance and capabilities of robots vary vastly, all robots share the features of a mechanical, movable structure under some form of control. The control of robot involves three distinct phases: reception, processing and action. Generally, the preceptors are sensors mounted on the robot, processing is done by the on-board microcontroller or processor, and the task (action) is performed using motors or with some other actuators. So the motive is that to increase the range of remote controlled products. For this mobile phone operated control is best because we can globalize our project & no limitation of range. ADVANTAGES: The advantages are: Wireless control Surveillance System. Vehicle Navigation with use of 3G technology. Takes in use of the mobile technology which is almost available everywhere. This wireless device has no boundation of range and can be controlled as far as network of cell phone DISADVANATGES: The disadvantages are: Cell phone bill. Mobile batteries drain out early so charging problem.

Cost of project if Cell phone cost included. Not flexible with all cell phones as only a particular,cell phone whose earpiece is attached can only be used. 9. BIBILIOGRAPHY WEBSITES REFERRED: 1. http://www.8051projects.info/ 2. http://www.instructables.com/ 3. Cell phone operated land rover Electronics For You Magazine,Edition JULY 2008. 4. DTMF Tester, Electronics For You Magazine, Edition (June 2003) 5. http://www.alldatasheet.com/ TEXT BOOKS REFERED: 1. The 8051 Microcontroller and Embedded Systems by Muhammad Ali Mazidi and Janice Gillispie Mazidi, Pearson Education. 2. 8051 Microcontroller Architecture, programming and application by KENNETH J.AYALA

MT 8770: 10. APPENDIX

74LS04:

L293D