RÉSUMÉ Tomás Balderas-Contreras E-mail: URL: balderas@ccc.inaoep.mx http://ccc.inaoep.mx/~balderas/ http://mx.linkedin.com/in/tomasbalderas/ Phone: +52 22 2241 4930 Mobile phone: +52 33 1835 9934 Personal Location: Puebla, Puebla. MEXICO. Nationality: Mexican. Age: 39 years old. Marital status: Single. Objective To improve my proficiency in software engineering and create the most advanced products using the most powerful technologies and methodologies in an ordered, disciplined and creative way. Qualifications Skills Availability to join development groups and projects. Good written and oral communication skills. Strong work ethic and responsibility. Good understanding of computer science and computer engineering disciplines. Proficient in object-oriented analysis, design and development using design patterns and the following languages: C++, Objective-C, Java and Smalltalk. Experienced in model-driven engineering (MDE) principles and technologies like meta-modeling, the metamodel of UML 2, model-to-model transformations (ATL), model-to-text transformations (Acceleo). Proficient in programming in C and developing system software for Unix-like operating systems. Knowledgeable about block cipher algorithms and authentication protocols. Experienced in implementing cryptography algorithms in hardware platforms. Proficient in assembly language programming for the following instruction set architectures: SPARC, x86, Itanium Processor Family, MIPS, and PowerPC. Knowledgeable about computer architecture fundamentals and the following instruction set architectures: x86, Itanium Processor Family, MIPS and PowerPC. Experienced in the use of the language VHDL and Xilinx s Electronic Design Automation (EDA) tools to design applications for FPGA platforms. Experienced in lecturing and training of co-workers. Accustomed to perform technological research and development activities, study technical literature, and write technical reports and research articles. Languages Spanish (mother tongue). English (fluent). 1
Experience Independent July 2014 Present Looking forward to create new opportunities and freely develop my own ideas and projects. During a couple of months I focused on developing computer vision applications for QA using software from Teledyne DALSA Inc. Currently learning about Swift on ios and OS X to build interesting mobile and desktop applications. Next areas of interest include: computer security, Big Data, model-driven engineering, computer music and education. Validation and Tool Development Engineer Intel Tecnología de México, S.A. de C.V. (subsidiary of Intel Corporation) Jalisco, MEXICO September 2012 June 2014 Worked as a member of a validation team working with a number of software projects in the area of binary translation. My tasks included setting up simulation environments to run tests for the binary translators, executing and debugging several tests, written in C and assembly language for x86, that stressed different features of the runtime modules of the binary translators, conducting meetings to prioritize and accelerate resolution of bugs, and training my co-workers on a number of technologies related to full system simulation and binary instrumentation. Contributed to improve quality of future software products to be released by the company. Intel Tecnología de México, S.A. de C.V. (subsidiary of Intel Corporation) Jalisco, MEXICO November 2005 April 2008 Specialized in the organization of the firmware layers for Itanium-based systems: the Processor Abstraction Layer (PAL) and the System Abstraction Layer (SAL). I supported different validation teams within Intel by finding and fixing issues in the SAL firmware layer for multiprocessor server systems. Developed and co-developed different features for both the SAL layer for Itanium-based multiprocessor systems and the BIOS layer for IA-32-based single processor server systems. Acquired basic knowledge of the Unified Extensible Firmware Interface (UEFI) approach to design platform boot firmware. Along with my team, I proposed an infrastructure to automate the validation and testing processes of our organization s firmware products. This proposal was awarded the second place in an internal innovation contest. Trained a number of other employees on different topics and technologies. October 2004 November 2005 Designed and developed a software system that allowed Mexican Navy s ships to identify each other using a transmission channel in the VHF radio frequency band. Specialized in object-oriented design patterns, C++ programming, and security algorithms and protocols. Contributed to one of a series of projects to develop technology to guarantee national security. 2
Virtutech AB Stockholm, SWEDEN January 2001 March 2002 Designed and developed software systems to verify and guarantee that the Simics instruction set simulator reproduced faithfully the operation of different microprocessor architectures. Specialized in software development for the UNIX environment, C programming, and assembly language programming for different instruction set architectures. Reported directly to the company s Chief Technology Officer (CTO). Benemérita Universidad Autónoma de Puebla (University of Puebla) January 1997 August 1997 Developed numerical software systems for calculation of Zernike polynomials, calculation of eigenvectors and eigenvalues, and wavefront simulation. Contributed to a research and development project in the area of adaptive optics. Education PhD. in Computer Science 2008 2012 Thesis: Model-Based Design of Digital Hardware Systems for Digital Communications Developed a prototype of a system that transforms activity models in UML 2 to source code in a hardware description language (VHDL). Acquired knowledge of the organization and structure of the meta-model of UML 2. Acquired knowledge of the specifications from the Object Management Group that describe model-to-model transformations and model-to-text (source code) transformations. Experienced in Eclipse technologies to write algorithms that perform transformations between models, like the ATLAS Transformation Language, and between models and source code, like Acceleo. Master of Science in Computer Science 2002 2004 Thesis: Hardware/Software Implementation of the Security Functions for Third Generation Cellular Networks Conceived a novel and high performance hardware/software approach to implement the confidentiality and integrity algorithms intended for UMTS third generation (3G) cellular communication networks. Developed four novel hardware systems implementing the KASUMI block cipher algorithm using iterative and pipelined strategies. The systems were described in the VHDL language and synthesized for an FPGA platform. Became familiar with modern cellular communication network standards and technologies like GSM, GPRS and UMTS. Worked with security algorithms and protocols for cellular communication networks. 3
Bachelor of Science in Computer Science Benemérita Universidad Autónoma de Puebla (University of Puebla) 1993 1998 Thesis: An Instruction-Set Simulator for the SPARC Architecture Using the NeXTSTEP Environment and the Mach Operating System (written in Spanish) Developed an instruction set simulator for the SPARC architecture using both C and Objective-C languages, NeXTSTEP s object-oriented development tools and frameworks, and the Mach microkernel-based operating system. Became familiar with RISC instruction ser architectures, microkernel-based operating systems, and objectoriented software engineering. Associations Professional member of the Association for Computer Machinery (ACM). Member of the board of directors of the Association Amigos de México (Mexikanska Sällskapet) in Stockholm from 2001 to 2002. 4
List of publications Peer reviewed papers in international journals 1. T. Balderas, R. Cumplido and C. Feregrino, On the Design and Implementation of a RISC Processor Extension for the KASUMI Encryption Algorithm, Computers & Electrical Engineering, Volume 34, Issue 6, Pages 531-546, 2008. 2. T. Balderas, R. Cumplido and G. Rodríguez, Synthesizing VHDL from Activity Models in UML 2, International Journal of Circuit Theory and Applications, Volume 42, Issue 5, Pages 542-550, 2014. Peer reviewed conference papers 1. T. Balderas and H. García, "Desarrollo de un sistema simulador de la arquitectura SPARC mediante el sistema operativo Mach y el ambiente NeXTSTEP", Proc. Second National Conference on Computer Science (ENC'99), SMCC, Pachuca, Hidalgo. MEXICO, 1999. 2. T. Balderas and H. García, "Interpretive and non-interpretive techniques for instruction set simulation", Proc. Sixth Conference on Electrical Engineering (CIE00), CINVESTAV-IPN, México City. MEXICO, 2000. 3. T. Balderas and R. Cumplido, "An Efficient Reuse-Based Approach to Implement the 3GPP KASUMI Block Cipher", Proc. IEEE International Conference on Electrical and Electronics Engineering and Tenth Conference on Electrical Engineering (ICEEE/CIE 2004), CINVESTAV-IPN, IEEE, Acapulco, Guerrero. MEXICO, 2004. 4. T. Balderas and R. Cumplido, "An Efficient Hardware Implementation of the KASUMI Block Cipher for Third Generation Cellular Networks", Proc. Technical Conference of the International Embedded Solutions Event (GSPx 2004), Santa Clara, CA. USA, 2004. 5. T. Balderas and R. Cumplido, "High Performance Encryption Cores for 3G Networks", Proc. 42th Design Automation Conference (DAC 2005), Anaheim, CA. USA, 2005. 6. T. Balderas, G. Rodriguez and R. Cumplido, "A UML 2.0 Profile to Model Block Cipher Algorithms", Proc. Sixth European Conference on Modelling Foundations and Applications (ECMFA 2010), Paris, FRANCE, 2010. Chapters in books 1. T. Balderas and R. Cumplido, "An Efficient FPGA Architecture for Block Ciphering in Third Generation Cellular Networks", Research on Computer Science Vol. 10, Advances in Artificial Intelligence, Computer Science and Computer Engineering, Eds. S. Suárez, C. Aguilar and J. Figueroa, CIC-IPN, ISBN:970-36-0194-4, MEXICO, 2004. 2. T. Balderas, G. Rodriguez and R. Cumplido, "On Model-Driven Engineering of Reconfigurable Digital Control Hardware Systems", Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, Eds. M. Khalgui and H-M. Hanisch, IGI Global, ISBN-10:160-96-0086-X, USA, 2011. Technical reports 1. T. Balderas and R. Cumplido, "Security Architecture in UMTS Third Generation Cellular Networks", Technical report CCC-04-002, Computer Science Department, INAOE, Tonantzintla, Puebla. MEXICO, 2004. 5