High Speed CAN Transceiver Daa Shee Rev. 1.1, 2014-05-07 Auomoive Power
Table of Conens 1 Overview....................................................................... 3 2 Block Diagram................................................................... 4 3 Pin Configuraion................................................................ 5 3.1 Pin Assignmen................................................................... 5 3.2 Pin Definiions and Funcions........................................................ 5 4 Funcional Descripion............................................................ 6 4.1 High Speed CAN Physical Layer..................................................... 6 4.2 Modes of Operaion............................................................... 8 4.3 Normal-operaing Mode............................................................ 9 4.4 Sand-by Mode................................................................... 9 4.5 Power-down Sae................................................................ 9 5 Fail-safe Funcions.............................................................. 10 5.1 Shor-circui Proecion............................................................ 10 5.2 Unconneced Logic Pins........................................................... 10 5.3 TxD Time-ou Funcion............................................................ 10 5.4 Undervolage Deecion........................................................... 10 5.5 Overemperaure Proecion........................................................ 12 6 General Produc Characerisics................................................... 13 6.1 Absolue Maximum Raings........................................................ 13 6.2 Funcional Range................................................................ 14 6.3 Thermal Characerisics........................................................... 14 7 Elecrical Characerisics......................................................... 15 7.1 Funcional Device Characerisics................................................... 15 7.2 Diagrams...................................................................... 18 8 Applicaion Informaion.......................................................... 19 8.1 ESD Immuniy According o IEC61000-4-2............................................ 19 8.2 Applicaion Example.............................................................. 20 8.3 Furher Applicaion Informaion...................................................... 20 9 Package Oulines............................................................... 21 10 Revision Hisory................................................................ 22 Daa Shee 2 Rev. 1.1, 2014-05-07
High Speed CAN Transceiver TLE7250GVIO 1 Overview Feaures Fully complian wih ISO 11898-2 Wide common mode range for elecromagneic immuniy (EMI) Very low elecromagneic emission (EME) Excellen ESD immuniy Exended supply range a V CC and V IO Suiable for 5V and 3.3V microconroller I/O volages CAN shor-circui proof o ground, baery and V CC TxD ime-ou funcion Low CAN bus leakage curren in power-down sae Overemperaure proecion Proeced agains auomoive ransiens CAN daa ransmission rae up o 1 Mbps V IO inpu for volage adapaion o he micro conroller supply Green Produc (RoHS-complian) AEC Qualified PG-DSO-8 Descripion The TLE7250GVIO is a ransceiver designed for CAN neworks in auomoive and indusrial applicaions. As an inerface beween he physical bus layer and he CAN proocol conroller, he TLE7250GVIO drives he signals o he bus and proecs he microconroller agains inerferences generaed wihin he nework. Based on he high symmery of he CANH and CANL signals, he TLE7250GVIO provides a very low level of elecromagneic emission (EME) wihin a wide frequency range. The TLE7250GVIO is inegraed in a RoHS-complian PG-DSO-8 package and fulfills or exceeds he requiremens of ISO11898-2. As a successor o he firs generaion of HS CAN ransceivers, he pin assignmen and funcion of he TLE7250GVIO is fully compaible wih is predecessor model, he TLE6250GV33. The TLE7250GVIO is opimized o provide an excellen passive behavior in he power-down sae. This feaure makes he TLE7250GVIO exremely suiable for mixed supply CAN neworks. Based on he Infineon Smar Power Technology SPT, he TLE7250GVIO provides excellen ESD immuniy ogeher wih a very high elecromagneic immuniy (EMI). The Infineon Smar Power Technology SPT allows bipolar and CMOS conrol circuiry in accordance wih DMOS power devices o exis on he same monolihic circui. The TLE7250GVIO and he Infineon SPT echnology are AEC qualified and ailored o wihsand he harsh condiions of he Auomoive Environmen. Two differen operaing modes, addiional fail-safe feaures like TxD ime-ou and he opimized oupu slew raes on he CANH and CANL signals make he TLE7250GVIO he ideal choice for large CAN neworks wih high daa ransmission raes. Type Package Marking TLE7250GVIO PG-DSO-8 7250GVIO Daa Shee 3 Rev. 1.1, 2014-05-07
Block Diagram 2 Block Diagram Transmier 3 VCC 5 V IO CANH CANL 7 6 Oupu Sage Driver Temp- Proecion Timeou 1 TxD Mode Conrol 8 NEN V CC /2 Receiver = 2 * Comparaor 4 RxD Figure 1 Block diagram Noe: In comparison wih he TLE6250GV33, he pin 8 (INH) was renamed as NEN, bu he funcion remains unchanged. NEN sands for No ENable. Daa Shee 4 Rev. 1.1, 2014-05-07
Pin Configuraion 3 Pin Configuraion 3.1 Pin Assignmen TxD 1 8 NEN 2 7 CANH V CC 3 6 CANL RxD 4 5 V IO Figure 2 Pin configuraion 3.2 Pin Definiions and Funcions Table 1 Pin Definiion and Funcions Pin Symbol Funcion 1 TxD Transmi Daa Inpu; inernal pull-up o V IO, low for dominan sae. 2 Ground 3 V CC Transceiver Supply Volage; 100 nf decoupling capacior o required. 4 RxD Receive Daa Oupu; low in dominan sae. 5 V IO Digial Supply Volage Inpu; supply volage inpu o adap he logical inpu and oupu volage levels of he ransceiver o he microconroller supply. 100 nf decoupling capacior o required. 6 CANL CAN Bus Low Level I/O; low in dominan sae. 7 CANH CAN Bus High Level I/O; high in dominan sae. 8 NEN No Enable Inpu 1) ; inernal pull-up o V IO, low for normal-operaing mode. 1) The designaion of pin 8 is differen in he TLE7250GVIO and is predecessor, he TLE6250GV33. The funcion of pin 8 remains he same. Daa Shee 5 Rev. 1.1, 2014-05-07
Funcional Descripion 4 Funcional Descripion CAN is a serial bus sysem ha connecs microconrollers, sensors and acuaors for real-ime conrol applicaions. The use of he Conrol Area Nework (abbreviaed CAN) wihin road vehicles is described by he inernaional sandard ISO 11898. According o he 7-layer OSI reference model, he physical layer of a CAN bus sysem specifies he daa ransmission from one CAN node o all oher available CAN nodes wihin he nework. The physical layer specificaion of a CAN bus sysem includes all elecrical and mechanical specificaions of a CAN nework. The CAN ransceiver is par of he physical layer specificaion. Several differen physical layer sandards of CAN neworks have been developed in recen years. The TLE7250GVIO is a High Speed CAN ransceiver wihou a dedicaed wake-up funcion. High-speed CAN ransceivers wihou a wake-up funcion are defined by he inernaional sandard ISO 11898-2. 4.1 High Speed CAN Physical Layer TxD V IO CAN_H CAN_L V CC V IO = Digial supply V CC = High Speed CAN power supply TxD = Inpu from he microconroller RxD = Oupu o he microconroller CANH = Volage on he CANH inpu/oupu CANL = Volage on he CANL inpu/oupu V DIFF = Differenial volage beween CANH and CANL V DIFF = V CANH V CANL V DIFF dominan V DIFF = ISO level dominan recessive V DIFF = ISO level recessive RxD V IO Figure 3 High Speed CAN bus signals and logic signals Daa Shee 6 Rev. 1.1, 2014-05-07
Funcional Descripion The TLE7250GVIO is a High Speed CAN ransceiver, operaing as an inerface beween he CAN conroller and he physical bus medium. A HS CAN nework is a wo-wire, differenial nework, which allows daa ransmission raes up o 1 Mbps. The characerisics of a HS CAN nework are he wo signal saes on he CAN bus: dominan and recessive (see Figure 3). The CANH and CANL pins are he inerface o he CAN bus and boh pins operae as an inpu and oupu. The RxD and TxD pins are he inerface o he microconroller. The TxD pin is he serial daa inpu from he CAN conroller, and he RxD pin is he serial daa oupu o he CAN conroller. As shown in Figure 1, he HS CAN ransceiver TLE7250GVIO includes a receiver and a ransmier uni, allowing he ransceiver o send daa o he bus medium and monior he daa from he bus medium a he same ime. The HS CAN ransceiver TLE7250GVIO convers he serial daa sream available on he ransmi daa inpu TxD, ino a differenial oupu signal on he CAN bus, provided by he CANH and CANL pins. The receiver sage of he TLE7250GVIO moniors he daa on he CAN bus and convers hem o a serial, single-ended signal on he RxD oupu pin. A logical low signal on he TxD pin creaes a dominan signal on he CAN bus, followed by a logical low signal on he RxD pin (see Figure 3). The feaure of broadcasing daa o he CAN bus and lisening o he daa raffic on he CAN bus simulaneously is essenial o suppor he bi-o-bi arbiraion wihin CAN neworks. The volage levels for HS CAN ransceivers are defined by he ISO 11898-2 and he ISO 11898-5 sandards. Wheher a daa bi is dominan or recessive depends on he volage difference beween he CANH and CANL pins: V DIFF = V CANH - V CANL. In comparison wih oher differenial nework proocols, he differenial signal on a CAN nework can only be larger han or equal o 0 V. To ransmi a dominan signal o he CAN bus, he differenial signal V DIFF is larger han or equal o 1.5 V. To receive a recessive signal from he CAN bus, he differenial V DIFF is smaller han or equal o 0.5 V. Parially-supplied High Speed CAN neworks are hose where he CAN bus nodes of one common nework have differen power supply condiions. Some nodes are conneced o he common power supply, while oher nodes are disconneced from he power supply and in power-down sae. Regardless of wheher he CAN bus subscriber is supplied or no, each subscriber conneced o he common bus media mus no inerfere wih he communicaion. The TLE7250GVIO is designed o suppor parially-supplied neworks. In he power-down sae, he receiver inpu resisors are swiched off and he ransceiver inpu has a high resisance. The volage level a he digial inpu TxD and he digial oupu RxD is deermined by he power supply level a he V IO pin. Depending on he volage level a he V IO pin, he signal levels on he logic pins (NEN, TxD and RxD) are compaible wih microconrollers having 5 V or 3.3 V I/O supply. Usually, he V IO power supply of he ransceiver is conneced o same power supply as he I/O power supply of he microconroller. Daa Shee 7 Rev. 1.1, 2014-05-07
Funcional Descripion 4.2 Modes of Operaion Two differen modes of operaion are available on he TLE7250GVIO. Each mode has specific characerisics in erms of quiescen curren or daa ransmission. The digial inpu pin NEN is used for mode selecion. Figure 4 illusraes he differen mode changes depending on he saus of he NEN pin. Afer supplying V CC and V IO o he HS CAN ransceiver, he TLE7250GVIO sars in sand-by mode. The inernal pull-up resisor a he NEN pin ses he TLE7250GVIO o sand-by mode by defaul. If he microconroller is up and running, he TLE7250GVIO can swich o any mode of operaion wihin he ime period for mode change Mode. undervolage deecion on V CC and V IO V CC < V CC(UV) V IO < V IO(UV) sar up supply V CC and V IO power-down sand-by mode NEN = 1 NEN = 0 NEN = 1 normal-operaing mode NEN = 0 Figure 4 Modes of operaion The TLE7250GVIO has 2 major modes of operaion: Sand-by mode Normal-operaing mode Table 2 Modes of Operaion Mode NEN Bus Bias Commens Normal-operaing mode low V CC /2 The ransmier is acive. The receiver is acive. Sand-by high The ransmier is disabled. The receiver is disabled. V CC off low or high floaing The ransmier is disabled. The receiver is disabled. Daa Shee 8 Rev. 1.1, 2014-05-07
Funcional Descripion 4.3 Normal-operaing Mode In he normal-operaing mode, he HS CAN ransceiver TLE7250GVIO sends he serial daa sream on he TxD pin o he CAN bus. The daa on he CAN bus is displayed a he RxD pin simulaneously. In normal-operaing mode, all funcions of he TLE7250GVIO are acive: The ransmier is acive and drives daa from he TxD o he CAN bus. The receiver is acive and provides he daa from he CAN bus o he RxD pin. The bus biasing is se o V CC /2. The undervolage monioring a he power supply V CC and a he power supply V IO is acive. To ener he normal-operaing mode, se he NEN pin o logical low (see Table 2 or Figure 4). The NEN pin has an inernal pull-up resisor o he power-supply V IO. 4.4 Sand-by Mode The sand-by mode is an idle mode of he TLE7250GVIO wih opimized power consumpion. In he sand-by mode, he TLE7250GVIO can no send or receive any daa. The ransmier and he receiver uni are disabled. Boh CAN bus pins, CANH and CANL are conneced o via he inpu resisors. The ransmier is disabled. The receiver is disabled. The inpu resisors of he receiver are conneced o. The undervolage monioring a he power supply V CC and a he power supply V IO is acive. To ener he sand-by mode, se he pin NEN o logical high (see Table 2 or Figure 4). The NEN pin has an inernal pull-up resisor o he power-supply V IO. If he sand-by mode is no used in he final applicaion, he NEN pin needs o be conneced o. 4.5 Power-down Sae The power-down sae means ha he TLE7250GVIO is no supplied. In power-down sae, he differenial inpu resisors of he receiver are swiched off. The CANH and CANL bus inerface of he TLE7250GVIO ac as highimpedance inpu wih a very small leakage curren. The high-ohmic inpu does no influence he recessive level of he CAN nework and allows an opimized EME performance of he enire CAN nework. Daa Shee 9 Rev. 1.1, 2014-05-07
Fail-safe Funcions 5 Fail-safe Funcions 5.1 Shor-circui Proecion The CANH and CANL bus oupus are shor-circui proof, eiher agains or a posiive supply volage. A curren limiing circui proecs he ransceiver agains damage. If he device heas up due o a coninuous shor on he CANH or CANL, he inernal overemperaure proecion swiches off he bus ransmier. 5.2 Unconneced Logic Pins All logic inpu pins have an inernal pull-up resisor o V IO. In case he V IO supply is acivaed and he logical pins are open or floaing, he TLE7250GVIO eners he sand-by mode by defaul. In sand-by mode, he ransmier of he TLE7250GVIO is disabled, he bus bias is conneced o and he HS CAN TLE7250G ransceiver does no influence he daa on he CAN bus. 5.3 TxD Time-ou Funcion The TxD ime-ou feaure proecs he CAN bus agains permanen blocking in case he logical signal on he TxD pin is coninuously low. A coninuous low signal on he TxD pin can have is roo cause in a locked-up microconroller or in a shor on he prined circui board for example. In he normal-operaing mode, a logical low signal on he TxD pin for he ime > TxD enables he TxD ime-ou feaure and he TLE7250GVIO disables he ransmier (see Figure 5). The receiver is sill acive and he daa on he bus coninues o be moniored by he RxD oupu pin. CANH CANL > TxD TxD ime-ou TxD ime-ou released TxD RxD Figure 5 TxD Time-ou funcion Figure 5 illusraes how he ransmier is deacivaed and acivaed again. A permanen low signal on he TxD inpu pin acivaes he TxD ime-ou funcion and deacivaes he ransmier. To release he ransmier afer a TxD ime-ou even, he TLE7250GVIO requires a signal change on he TxD inpu pin from logical low o logical high. 5.4 Undervolage Deecion The HS CAN ransceiver TLE7250GVIO is provided wih undervolage deecion a he power supply V CC and a he power supply V IO. In case of undervolage a V CC or V IO, he undervolage deecion changes he operaing mode of TLE7250GVIO o he sand-by mode, regardless of he logical signal on he NEN pin (see Figure 6). If he ransceiver TLE7250GVIO recovers from he undervolage condiion, he operaing mode is resored o he programmed mode by he NEN pin. Daa Shee 10 Rev. 1.1, 2014-05-07
Fail-safe Funcions hyseresis V CC(UV,H) Supply volage V CC power-down rese level V CC(UV) delay ime undervolage recovery Delay(UV) NEN = 0 normal-operaing mode sand-by mode normal-operaing mode 1) hyseresis V IO(UV,H) Supply volage V IO power-down rese level V IO(UV) delay ime undervolage recovery Delay(UV) NEN = 0 normal-operaing mode sand-by mode normal-operaing mode 1) 1) Assuming he logical signal on he pin NEN keeps is values during he undervolage even. In his case NEN remains low. Figure 6 Undervolage deecion a he V CC or V IO Pins Daa Shee 11 Rev. 1.1, 2014-05-07
Fail-safe Funcions 5.5 Overemperaure Proecion T J ΔT T JSD (shu-down emperaure) Overemperaure even Cool Down swich-on ransmier CANH CANL TxD RxD Figure 7 Overemperaure proecion The TLE7250GVIO has an inegraed overemperaure deecion circui o proec he device agains hermal oversress of he ransmier. In case of an overemperaure condiion, he emperaure sensor will disable he ransmier (see Figure 1). Afer he device cools down, he ransmier is acivaed again (see Figure 7). A hyseresis is implemened wihin he emperaure sensor. Daa Shee 12 Rev. 1.1, 2014-05-07
General Produc Characerisics 6 General Produc Characerisics 6.1 Absolue Maximum Raings Table 3 Absolue Maximum Raings of Volage, Curren and Temperaures 1) All volages wih respec o ground; posiive curren flowing ino he pin; (unless oherwise specified) Pos. Parameer Symbol Limi Values Uni Remarks Min. Max. Volage 6.1.1 Supply volage V CC -0.3 6.0 V 6.1.2 Logic supply volage V IO -0.3 6.0 V 6.1.3 CANH DC volage agains V CANH -40 40 V 6.1.4 CANL DC volage agains V CANL -40 40 V 6.1.5 Differenial volage V CAN diff -40 40 V beween CANH and CANL 6.1.6 Logic volage a logic inpu V Max_In -0.3 6.0 V pins NEN, TxD 6.1.7 Logic volage a logic oupu V Max_Ou -0.3 V IO V pin RxD Temperaure 6.1.8 Juncion emperaure T j -40 150 C 6.1.9 Sorage emperaure T S -55 150 C ESD Immuniy 6.1.10 ESD immuniy a CANH, CANL agains 6.1.11 ESD immuniy a all oher pins 6.1.12 ESD immuniy o (all pins) V ESD_HBM_CAN -8 8 kv HBM (100pF via 1.5 kω) 2) V ESD_HBM_All -2 2 kv HBM (100pF via 1.5 kω) 2) V ESD_CDM -750 750 V CDM 3) 1) No subjec o producion es, specified by design 2) ESD suscepibiliy Human Body Model HBM according o ANSI/ESDA/JEDEC JS-001 3) ESD suscepibiliy, Charge Device Model CDM according o EIA/JESD22-C101 or ESDA STM5.3.1 Noe: Wihin he funcional range he IC operaes as described in he circui descripion. The elecrical characerisics are specified wihin he condiions given in he associaed elecrical characerisics able. Daa Shee 13 Rev. 1.1, 2014-05-07
General Produc Characerisics 6.2 Funcional Range Table 4 Operaing Range Pos. Parameer Symbol Limi Values Uni Condiions Min. Max. Supply Volage 6.2.1 Transceiver supply volage V CC 4.5 5.5 V 6.2.2 Logical supply volage V IO 3.0 5.5 V Thermal Parameer 6.2.3 Juncion emperaure T j -40 150 C 1) No subjec o producion es, specified by design 1) Noe: Wihin he funcional range he IC operaes as described in he circui descripion. The elecrical characerisics are specified wihin he condiions given in he associaed elecrical characerisics able. 6.3 Thermal Characerisics Noe: This hermal daa was generaed in accordance wih JEDEC JESD51 sandards. For more informaion, please visi www.jedec.org. Table 5 Thermal Resisance 1) Pos. Parameer Symbol Limi Values Uni Remarks Min. Typ. Max. Thermal Resisance 6.3.1 Juncion o ambien 1) R hja 130 K/W 2) Thermal Shu-down Juncion Temperaure 6.3.2 Thermal shu-down T JSD 150 175 200 C emperaure 6.3.3 Thermal shu-down hyseresis ΔT 10 K 1) No subjec o producion es, specified by design 2) The R hja value specified, is according o Jedec JESD51-2,-7 a naural convecion on he FR4 2s2p board; The produc (TLE7250GVIO) was simulaed on a 76.2 x 114.3 x 1.5 mm board wih 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu). Daa Shee 14 Rev. 1.1, 2014-05-07
Elecrical Characerisics 7 Elecrical Characerisics 7.1 Funcional Device Characerisics Table 6 Elecrical Characerisics 4.5 V < V CC <5.5V; 3.0V<V IO <5.5V; R L =60Ω; -40 C <T j <+150 C; all volages wih respec o ground; posiive curren flowing ino he pin; unless oherwise specified. Pos. Parameer Symbol Limi Values Uni Remarks Min. Typ. Max. Curren Consumpion 7.1.1 Curren consumpion a V CC I CC 2 6 ma recessive sae; V TxD = V IO 7.1.2 Curren consumpion a V CC I CC 35 60 ma dominan sae; V TxD = low 7.1.3 Curren consumpion a V IO I IO 0.2 1 ma normal-operaing mode; NEN = low 7.1.4 Curren consumpion sand-by mode 7.1.5 Curren consumpion sand-by mode Supply Rese I CC(STB) 4 15 μa V CC =V IO =5V, TxD = V IO, NEN = V IO I IO(STB) 2 10 μa V CC =V IO =5V, TxD = V IO, NEN = V IO 7.1.6 V CC undervolage monior V CC(UV) 1.3 3.2 4.3 V 7.1.7 V CC undervolage monior V CC(UV,H) 400 mv 1) hyseresis 7.1.8 V IO undervolage monior V IO(UV) 1.0 2.4 3.0 V 7.1.9 V IO undervolage monior V IO(UV,H) 200 mv 1) hyseresis 7.1.10 V CC and V IO undervolage Delay(UV) 50 μs 1) (see Figure 6) delay ime Receiver Oupu: RxD 7.1.11 High level oupu curren I RD,H -4-2 ma V RxD = V IO -0.4V, V DIFF <0.5V 7.1.12 Low level oupu curren I RD,L 2 4 ma V RxD =0.4V, V DIFF > 0.9 V Transmission Inpu: TxD 7.1.13 High level inpu volage hreshold 7.1.14 Low level inpu volage hreshold V TD,H 0.5 0.7 V recessive sae V IO V IO V TD,L 0.3 0.4 V dominan sae V IO V IO 7.1.15 TxD pull-up resisance R TD 10 25 50 kω 7.1.16 TxD inpu hyseresis V HYS(TxD) 800 mv 1) 7.1.17 TxD permanen dominan disable ime TxD 0.3 1.0 ms Daa Shee 15 Rev. 1.1, 2014-05-07
Elecrical Characerisics 0.7 V sand-by mode 0.4 V normal-operaing mode Table 6 Elecrical Characerisics (con d) 4.5 V < V CC <5.5V; 3.0V<V IO <5.5V; R L =60Ω; -40 C <T j <+150 C; all volages wih respec o ground; posiive curren flowing ino he pin; unless oherwise specified. Pos. Parameer Symbol Limi Values Uni Remarks Min. Typ. Max. No Enable Inpu NEN 7.1.18 High level inpu volage V NEN,H 0.5 hreshold V IO V IO 7.1.19 Low level inpu volage V NEN,L 0.3 hreshold V IO V IO 7.1.20 NEN pull-up resisance R NEN 10 25 50 kω 7.1.21 NEN inpu hyseresis V HYS(NEN) 200 mv 1) Bus Receiver 7.1.22 Differenial receiver hreshold V DIFF,(D) 0.75 0.9 V normal-operaing mode dominan 7.1.23 Differenial receiver hreshold V DIFF,(R) 0.5 0.65 normal-operaing mode recessive 7.1.24 Differenial receiver inpu V diff,rdn 0.9 5.0 V 1) normal-operaing mode range dominan 7.1.25 Differenial receiver inpu V diff,drn -1.0 0.5 V 1) normal-operaing mode range recessive 7.1.26 Common mode range CMR -12 12 V V CC = 5 V 7.1.27 Differenial receiver hyseresis V diff,hys 100 mv 1) 7.1.28 CANH, CANL inpu resisance R i 10 20 30 kω recessive sae 7.1.29 Differenial inpu resisance R diff 20 40 60 kω recessive sae 7.1.30 Inpu resisance deviaion ΔR i -3 3 % 1) recessive sae beween CANH and CANL 7.1.31 Inpu capaciance CANH, C IN 20 40 pf 1) V TxD = V IO CANL versus 7.1.32 Differenial inpu capaciance C InDiff 10 20 pf 1) V TxD = V IO Bus Transmier 7.1.33 CANL/CANH recessive oupu volage 7.1.34 CANH, CANL recessive oupu volage difference 7.1.35 CANL dominan oupu volage 7.1.36 CANH dominan oupu volage 7.1.37 CANH, CANL dominan oupu volage difference V diff = V CANH - V CANL V CANL/H 2.0 2.5 3.0 V no load; V TxD = V IO V diff -500 50 mv no load; V TxD = V IO V CANL 0.5 2.25 V 4.75 V V CC 5.25 V, V TxD = 0 V, 50 Ω < R L <65Ω V CANH 2.75 4.5 V 4.75 V V CC 5.25 V, V TxD = 0 V, 50 Ω < R L <65Ω V diff 1.5 3.0 V 4.75 V V CC 5.25 V, V TxD = 0 V, 50 Ω < R L <65Ω 7.1.38 Driver symmery V SYM 4.5 5.5 V V TxD =0V, V CC =5V, V SYM = V CANH + V CANL 50 Ω < R L <65Ω Daa Shee 16 Rev. 1.1, 2014-05-07
Elecrical Characerisics Table 6 Elecrical Characerisics (con d) 4.5 V < V CC <5.5V; 3.0V<V IO <5.5V; R L =60Ω; -40 C <T j <+150 C; all volages wih respec o ground; posiive curren flowing ino he pin; unless oherwise specified. Pos. Parameer Symbol Limi Values Uni Remarks Min. Typ. Max. 7.1.39 CANL shor-circui curren I CANLsc 40 80 100 ma V TxD = 0 V, V CC = 5 V, < TxD, V CANLshor = 18 V 7.1.40 CANH shor-circui curren I CANHsc -100-80 -40 ma V TxD =0V, V CC =5V, < TxD, V CANHshor = 0 V 7.1.41 Leakage curren CANH I CANH,lk -5 0 5 μa V CC = 0 V, V CANH = V CANL, 0V<V CANH <5V 7.1.42 Leakage curren CANL I CANL,lk -5 0 5 μa V CC = 0 V, V CANH = V CANL, 0V<V CANL <5V Dynamic CAN Transceiver Characerisics 7.1.43 Propagaion delay TxD-o-RxD low ( recessive o dominan ) 7.1.44 Propagaion delay TxD-o-RxD high ( dominan o recessive ) 7.1.45 Propagaion delay TxD low o bus dominan 7.1.46 Propagaion delay TxD high o bus recessive 7.1.47 Propagaion delay bus dominan o RxD low 7.1.48 Propagaion delay bus recessive o RxD high d(l),tr 30 180 255 ns C L = 100 pf, V CC = 5 V, C RxD =15pF d(h),tr 30 200 255 ns C L = 100 pf, V CC = 5 V, C RxD =15pF d(l),t 100 ns 1) C L =100pF, V CC = 5 V, C RxD =15pF d(h),t 90 ns 1) C L =100pF, V CC = 5 V, C RxD =15pF d(l),r 80 ns 1) C L =100pF, V CC = 5 V, C RxD =15pF d(h),r 110 ns 1) C L =100pF, V CC = 5 V, C RxD =15pF 7.1.49 Time for mode change Mode 10 μs 1) 1) No subjec o producion es, specified by design Daa Shee 17 Rev. 1.1, 2014-05-07
Elecrical Characerisics 7.2 Diagrams 7 CANH V IO 5 100 nf TxD NEN 1 8 C L R L RxD 4 6 CANL C RxD 2 V CC 3 100 nf Figure 8 Simplified es circui V TxD V IO V DIFF d(l),t d(h),t 0.9V 0.5V d(l),r d(h),r V RxD d(l),tr d(h),tr V IO 0.3 x V IO 0.7 x V IO Figure 9 Timing diagram for dynamic characerisics Daa Shee 18 Rev. 1.1, 2014-05-07
Applicaion Informaion 8 Applicaion Informaion 8.1 ESD Immuniy According o IEC61000-4-2 Tess for ESD immuniy according o IEC61000-4-2, GUN es (150 pf, 330 Ω), have been performed. The resuls and es condiions are available in a separae es repor. Table 7 ESD Immuniy according o IEC61000-4-2 Tes performed Resul Uni Remarks Elecrosaic discharge volage a CANH and CANL pins agains +8 kv 1) Posiive pulse Elecrosaic discharge volage a CANH and CANL pins agains -8 kv 1) Negaive pulse 1) ESD suscepibiliy ESD GUN according o GIFT / ICT paper: EMC Evaluaion of CAN Transceivers, version 03/02/ IEC TS 62228, secion 4.3. (DIN EN 61000-4-2) Tesed by exernal es house (IBEE Zwickau, EMC es repor no.: 05-12-11). Daa Shee 19 Rev. 1.1, 2014-05-07
Applicaion Informaion 8.2 Applicaion Example V BAT CANH CANL I EN TLE4476D Q1 Q2 100 nf 22 uf 100 nf 120 Ohm 22 uf Opional: Common Mode Choke 7 6 3 V CC V IO TLE7250GVIO NEN CANH a TxD RxD CANL 5 8 1 4 Ou Ou In VCC 100 nf Microconroller e.g. XC22xx 2 Example ECU Design I EN TLE4476D Q1 Q2 100 nf 22 uf 120 Ohm 22 uf Opional: Common Mode Choke 7 6 3 V CC V IO TLE7250GVIO NEN CANH TxD RxD CANL 2 5 8 1 4 100 nf Ou Ou In VCC 100 nf Microconroller e.g. XC22xx CANH CANL Figure 10 Simplified applicaion for he TLE7250GVIO 8.3 Furher Applicaion Informaion Please conac us for informaion regarding he FMEA pin. For furher informaion you may visi hp://www.infineon.com/ransceiver Daa Shee 20 Rev. 1.1, 2014-05-07
Package Oulines 9 Package Oulines 0.41 1.27 +0.1 2) -0.06 0.175±0.07 (1.45) 1.75 MAX. 0.1 0.2 M A B 8x B 0.35 x 45 1) 4-0.2 C 6 ±0.2 +0.06 0.19 0.64 ±0.25 8 MAX. 0.2 M C 8x 8 5 1 4 1) 5-0.2 A Index Marking 1) Does no include plasic or meal prorusion of 0.15 max. per side 2) Lead widh can be 0.61 max. in dambar area GPS01181 Figure 11 PG-DSO-8 (Plasic dual small ouline PG-DSO-8-16) Green Produc (RoHS-complian) The device has been designed as a green produc o mee he world-wide cusomer requiremens for environmenfriendly producs and o be complian wih governmen regulaions. Green producs are RoHS-complian (i.e Pbfree finish on leads and suiable for Pb-free soldering according o IPC/JEDEC J-STD-020). For furher informaion on alernaive packages, please visi our websie: hp://www.infineon.com/packages. Dimensions in mm Daa Shee 21 Rev. 1.1, 2014-05-07
Revision Hisory 10 Revision Hisory Revision Dae Changes 1.1 2014-05-07 Updae from Daa Shee Rev.: 1.0. All pages: Revision and dae updae Page 3, Overview: Feaure lis updaed ( Exended supply range a V CC and V IO ). Page 14, Table 4, Parameer 6.2.1, Supply range updaed (4.5 V < V CC <5.5V). Page 14, Table 4, Parameer 6.2.2: Supply range updaed (3.0 V < V IO <5.5V). Page 15, Table 6: Table header updaed (4.5 V < V CC <5.5V, 3.0V<V IO <5.5V). Page 16, Table 6, Parameer 7.1.35: Remark added ( 4.75 V V CC 5.25 V ). Page 16, Table 6, Parameer 7.1.36: Remark added ( 4.75 V V CC 5.25 V ). Page 16, Table 6, Parameer 7.1.37: Remark added ( 4.75 V V CC 5.25 V ). Page 20, Figure 10: Picure updaed. Page 22: Revision hisory updaed. 1.0 2012-03-01 Daa Shee Rev. 1.0 creaed Daa Shee 22 Rev. 1.1, 2014-05-07
Ediion 2014-05-07 Published by Infineon Technologies AG 81726 Munich, Germany 2006 Infineon Technologies AG All Righs Reserved. Legal Disclaimer The informaion given in his documen shall in no even be regarded as a guaranee of condiions or characerisics. Wih respec o any examples or hins given herein, any ypical values saed herein and/or any informaion regarding he applicaion of he device, Infineon Technologies hereby disclaims any and all warranies and liabiliies of any kind, including wihou limiaion, warranies of non-infringemen of inellecual propery righs of any hird pary. Informaion For furher informaion on echnology, delivery erms and condiions and prices, please conac he neares Infineon Technologies Office (www.infineon.com). Warnings Due o echnical requiremens, componens may conain dangerous subsances. For informaion on he ypes in quesion, please conac he neares Infineon Technologies Office. Infineon Technologies componens may be used in life-suppor devices or sysems only wih he express wrien approval of Infineon Technologies, if a failure of such componens can reasonably be expeced o cause he failure of ha life-suppor device or sysem or o affec he safey or effeciveness of ha device or sysem. Life suppor devices or sysems are inended o be implaned in he human body or o suppor and/or mainain and susain and/or proec human life. If hey fail, i is reasonable o assume ha he healh of he user or oher persons may be endangered.