description V CC A CLR BO CO LOAD C D B Q B Q A DOWN UP Q C Q D GND D OR N PACKAGE (TOP VIEW) SDFS031A D3693, JANUARY 1991 REVISED OCTOBER 1993



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High-Speed f max of 100 MHz Typical Parallel Asynchronous Load for Modulo-N Count Lengths Look-Ahead Circuitry Enhances Speed of Cascaded Counters Fully Synchronous in Count Modes Package Optio Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs description B Q B Q A DOWN UP Q C Q D GND D OR N PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 V CC A CLR BO CO C D The SN74F193A is a synchronous, 4-bit binary up/down counter. Synchronous counting operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so itructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple-clock) counters. The outputs of the four flip-flops are triggered on a low-to-high-level traition of either count/clock (UP or DOWN) input. The direction of the count is determined by which count input is pulsed while the other count input is high. All four counters are fully programmable; that is, each output may be preset to either level by placing a low on the input and entering the desired data at the data (D) inputs. The output will change to agree with the data inputs independently of the count pulses. This feature allows the counters to be used as modulo-n dividers by simply modifying the count length with the preset inputs. A high level applied to the clear (CLR) input forces all outputs to the low level. The clear function is independent of the count and load inputs. These counters were designed to be cascaded without the need for external circuitry. The borrow (BO) output produces a low-level pulse while the count is zero (all Q outputs low) and the DOWN input is low. Similarily, the carry (CO) output produces a low-level pulse while the count is 15 (all Q outputs high) and the UP input is low. The counters can then be easily cascaded by feeding the borrow and carry outputs to the count-down and count-up inputs, respectively, of the succeeding counter. The SN74F193A is characterized for operation from 0 C to 70 C. Copyright 1993, Texas Itruments Incorporated POST OFFICE BOX 655303 DALLAS, TEXAS 75265 2 1

logic symbol state diagram CLR 14 5 CTRDIV16 CT = 0 UP 2+ 1CT = 15 G1 4 DOWN 1 13 2CT = 0 G2 11 C3 12 CO BO 0 15 14 1 2 3 4 5 6 A B C D 15 1 10 9 3D 3 2 6 7 QA QB QC QD 13 12 11 10 9 7 8 This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Count up Count down 2 2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

logic diagram (positive logic) CLR 14 12 CO 11 13 BO UP DOWN 5 4 S A 15 R S C1 1D R 3 QA B 1 S C1 1D R 2 QB C 10 S C1 1D R 6 QC D 9 S C1 1D R 7 QD POST OFFICE BOX 655303 DALLAS, TEXAS 75265 2 3

typical clear, load, and count sequence Illustrated below is the following sequence: 1. Clear outputs to zero 2. Load (preset) to binary thirteen 3. Count up to fourteen, fifteen (carry), zero, one, and two 4. Count down to one, zero (borrow), fifteen, fourteen, and thirteen CLR A Data Inputs B C D UP DOWN QA QB Outputs QC QD CO BO Sequence Illustrated 0 Clear 13 14 15 0 1 2 1 0 15 14 13 Count Up Count Down Preset 2 4 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, V CC.......................................................... 0.5 V to 7 V Input voltage range, V I (see Note 1).................................................... 1.2 V to 7 V Input current range.............................................................. 30 ma to 5 ma Voltage applied to any output in the high state......................................... 0.5 V to V CC Current into any output in the low state...................................................... 40 ma Operating free-air temperature range................................................. 0 C to 70 C Storage temperature range........................................................ 55 C to 150 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditio beyond those indicated under recommended operating conditio is not implied. Exposure to absolute-maximum-rated conditio for extended periods may affect device reliability. NOTE 1: The input-voltage ratings may be exceeded if the input-current ratings are observed. recommended operating conditio MIN NOM MAX UNIT VCC Supply voltage 4.5 5 5.5 V VIH High-level input voltage 2 V VIL Low-level input voltage 0.8 V IIK Input clamp current 18 ma IOH High-level output current 1 ma IOL Low-level output current 20 ma TA Operating free-air temperature 0 70 C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIK VCC = 4.5 V, II = 18 ma 1.2 V VOH VCC = 4.5 V, IOH = 1 ma 2.5 3.4 VCC = 4.75 V, IOH = 1 ma to 3 ma 2.7 VOL VCC = 4.5 V, IOL = 20 ma 0.3 0.5 V II VCC = 5.5 V, VI = 7 V 0.1 ma IIH VCC = 5.5 V, VI = 2.7 V 20 µa IIL VCC = 5.5 V, VI = 0.5 V UP 1.8 Others 0.6 IOS VCC = 5.5 V, VO = 0 60 150 ma ICC VCC = 5.5 V, Outputs open 34 54 ma All typical values are at VCC = 5 V, TA = 25 C. Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. V ma POST OFFICE BOX 655303 DALLAS, TEXAS 75265 2 5

timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) VCC = 5 V, TA = 25 C VCC = 4.5 V to 5.5 V, TA = MIN to MAX MIN MAX MIN MAX fclock Clock frequency 0 85 0 85 MHz tw Pulse duration CLR high 4 4 low 5.5 5.5 UP or DOWN high 4 4 UP or DOWN low 6 6 Data before inactive 3.5 3.5 tsu Setup time CLR inactive before UP or DOWN 5 5 inactive before UP or DOWN 7.5 7.5 th Hold time Data after inactive 2.5 2.5 UNIT switching characteristics (see Note 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, CL = 50 pf, RL = 500 Ω, TA = 25 C VCC = 4.5 V to 5.5 V, CL = 50 pf, RL = 500 Ω, TA = MIN to MAX MIN TYP MAX MIN MAX fmax 85 100 85 MHz 2.5 8.5 2.5 9 UP or DOWN CO or BO 3 8 3 9 2.5 8.5 2.5 9 UP or DOWN Any Q 5 12 5 13 2 7 1.5 8 A, B, C, or D Any Q 6 13.5 5 15 4.5 10 4 11 Any Q 5.5 12 5 13 Any Q 5 11 5 12 CLR CO 6 12 5.5 13 CLR BO 5 11 5 12 CO or BO 6 13.5 6 15 6 12.6 6 13.8 5.5 13 5 14 A, B, C, or D CO or BO 4.5 12.5 4.5 13.5 For conditio shown as MIN or MAX, use the appropriate value specified under recommended operating conditio. NOTE 2: Load circuits and waveforms are shown in Section 1. UNIT 2 6 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM www.ti.com 30-Mar-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pi Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) SN74F193AD OBSOLETE SOIC D 16 TBD Call TI Call TI SN74F193ADR OBSOLETE SOIC D 16 TBD Call TI Call TI SN74F193AN OBSOLETE PDIP N 16 TBD Call TI Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new desig. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new desig. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Seitivity Level rating according to the JEDEC industry standard classificatio, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers coider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

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