FEATURES 0MHz to 90MHz Tunability 240 Frequency Steps Constant Q, Two-pole Butterworth Bandpass 1W Power Handling 0µs Tuning Speed Serial/Parallel Modes -40C to +85C DESCRIPTION The TS5010 series of TeraTune digitally programmable bandpass filters are available in various frequency ranges and bandwidths to help solve your CoSite receiver problems. They feature 1W power handling, low insertion loss, and frequency agility. The TS5010 is offered in both board-mounted and standalone SMA connectorized versions for ease of installation. Figure 1: Equivalent Circuit The TS5010 offers performance upgrades in an industry standard footprint. Designed from the ground up, these filters present a cost-effective alternative with enhanced features. Figure 2: Typical Frequency Response Updated: 01/14/11 1 TeraSys Technologies LLC 2800 Woodlawn Drive Suite 198 Honolulu, HI 968 Phone: (808) 469-4251 Fax: (808) 27-5168 www.terasystechnologies.com
PART NUMBERING TS - Series - Range - Steps - BW - Control - Options TS - 5010-0-90-240 - C 250 P = Parallel S = SPI R = Asynchronous Serial (RS-22) C = Connectorized Package (SMA) RF PERFORMAE - 5 4 - P S R Parameter BW Symbol Min Typ Max Units Input Impedance Z O 50 Ω In-Band rd Order Intercept IP 40 dbm In-Band Power 5.0 4.0. P IB 2 1 0 Out-of-Band Power P OB 6 dbm Insertion Loss 5.0 4.0. S21 5.0 6.0 8.0 6.5 7.5 9.5 db Shape Factor (0dB/dB) SF 6 7 High Frequency Loss (2 x f 0 ) 5.0 4.0. HFL 60 65 70 Bandwidth Variation BWV -1 0 +1 % Center Frequency Drift F D 100 ppm/c POWER SUPPLY Parameter Symbol Min Typ Max Units Power Supply Voltage V CC 4.5 5.0 5.5 V Power Supply Current I CC 10 50 ma Bias Supply Voltage V BB 10 100 V Bias Supply Current (quiescent) I BB 4 5 ma ENVIRONMENTAL Parameter Symbol Min Typ Max Units Operating Temperature T O -40 25 85 C Storage Temperature T S -55 100 C Relative Humidity RH 0 95 % dbm db Updated: 01/14/11 2 TeraSys Technologies LLC 2800 Woodlawn Drive Suite 198 Honolulu, HI 968 Phone: (808) 469-4251 Fax: (808) 27-5168 www.terasystechnologies.com
CONTROL INPUTS Parameter Symbol Min Typ Max Units Input Low Voltage V IL -0. 0 0.V CC V Input High Voltage V IH 0.7Vcc V CC V CC + 0. V Output Low Voltage (I =10mA) V OL 0 0.V CC V Output High Voltage (I = -10mA) V OH 0.7V CC V CC V TUNECODE The frequency band is divided into equal steps with the TuneCode defined by the following formula. TuneCodes above 250 are reserved for special operations. Power save mode shuts off all PIN diodes for lowest power consumption. Code Operation 0-250 TuneCode 251 <reserved> 252 <reserved> 25 <reserved> 254 <reserved> 255 Power Save Mode PARALLEL MODE In parallel mode, the TuneCode is specified per the input pins when the /STB line goes low. Once strobed, an internal processor looks up the required PIN diode control words and sets them accordingly. The PIN diode switch drivers take another ten microseconds to slew on or off, and the resulting bandpass is indeterminate during this time. Parameter Symbol Min Typ Max Units Setup Time t S 0 ns Hold Time t H 100 ns Strobe Pulse Width t W 25 ns Access time from Strobe to +10dBm t ACC 0 µs Dwell Time t DW 250 µs Updated: 01/14/11 TeraSys Technologies LLC 2800 Woodlawn Drive Suite 198 Honolulu, HI 968 Phone: (808) 469-4251 Fax: (808) 27-5168 www.terasystechnologies.com
Figure : Parallel Mode Timing SERIAL (SPI) MODE The TuneCode is clocked in serially one bit at a time, MSB first. Timing is synchronous and can be at any rate under the maximum clock rate of 5MHz. To start a sequence, the chip select line (/SS) is pulled low. Once /SS goes high, the internal processor begins the decoding process and sets the new frequency. Parameter Symbol Min Typ Max Units Select Setup Time t CS 100 ns Data Setup Tim t DS 50 ns Data Hold Time t DH 50 ns Clock High Time t CH 100 ns Clock Low Time t CL 100 ns Access Time from Select to +10dBm t ACC 0 µs Dwell Time t DW 250 µs Figure 4: Serial Mode Timing RS-22 (ASY) MODE The baud rate is fixed at 9600, 8N1. Voltage levels are TTL, with mark high, space low. Be careful not to use TuneCodes 25 and 254 as they are reserved for manufacturing and calibration purposes. Use of these codes may cause indeterminate results. Updated: 01/14/11 4 TeraSys Technologies LLC 2800 Woodlawn Drive Suite 198 Honolulu, HI 968 Phone: (808) 469-4251 Fax: (808) 27-5168 www.terasystechnologies.com
PINOUTS Pin Name Type Description Pin* 1 RF_IN I/O RF Input and Output 2 Ground Ground 4 I +5V Supply 1 5 Ground 2 6 A7 I Tune Bit 7 (MSB) 7 A6 I Tune Bit 6 4 8 A5 I Tune Bit 5 5 9 A4 I Tune Bit 4 6 RX Receive RS-22 (Logic Levels) 10 A I/O Tune Bit 7 TX Transmit RS-22 (Logic Levels) 11 A2 I/O Tune Bit 2 8 SDO Synchronous Data Out (SPI) 12 A1 I Tune Bit 1 9 SDI Synchronous Data In (SPI) 1 A0 I Tune Bit 0 (LSB) 10 SCK Synchronous Clock (SPI) 14 /STB I Strobe (Parallel Load) 11 /SS Synchronous Select (SPI) 15 Ground 12 16 Ground 1 17 VBB I +100V Bias Supply 14 18 Ground 15 19 Ground 20 Ground 21 RF_OUT I/O RF Input and Output Ground 2 No Connect - 41 42 Ground * SMA version Updated: 01/14/11 5 TeraSys Technologies LLC 2800 Woodlawn Drive Suite 198 Honolulu, HI 968 Phone: (808) 469-4251 Fax: (808) 27-5168 www.terasystechnologies.com
MECHANICAL Figure 5: Package Dimensions, Bottom and Side Views Updated: 01/14/11 6 TeraSys Technologies LLC 2800 Woodlawn Drive Suite 198 Honolulu, HI 968 Phone: (808) 469-4251 Fax: (808) 27-5168 www.terasystechnologies.com
Figure 6: Connectorized SMA Package Dimensions, Top and Side Views Updated: 01/14/11 7 TeraSys Technologies LLC 2800 Woodlawn Drive Suite 198 Honolulu, HI 968 Phone: (808) 469-4251 Fax: (808) 27-5168 www.terasystechnologies.com
APPLICATION INFORMATION The power handling capability of the filter is dependent on VSWR, bandwidth, and bias voltage. Lower levels of bias voltage, all the way down to +10V are possible, as long as RF signal levels remain appropriately low. Power levels should be reduced to below 0dBm during switching. Figure 7: Power Handling versus Bias and Bandwidth SOLDERING The TS-5010 should be hand soldered. Wave solder or IR reflow may cause parts on the internal circuit boards to loosen or shift position. The use of sockets is acceptable. PINS Do not connect anything to the (no connect) pins. They are used for internal signaling (PIN diode drive voltages). PCB EDGES The edges of the bottom circuit board have exposed inner layer traces (, V CC ). Care must be taken such that they do not short to adjacent components. Updated: 01/14/11 8 TeraSys Technologies LLC 2800 Woodlawn Drive Suite 198 Honolulu, HI 968 Phone: (808) 469-4251 Fax: (808) 27-5168 www.terasystechnologies.com
1 2 4 5 6 7 8 9 10 11 12 1 14 15 16 17 18 19 20 21 42 41 40 9 8 7 6 5 4 2 1 0 29 28 27 26 25 24 2 SW12 SW11 SW10 SW09 SW08 SW07 SW06 SW05 SW04 SW0 SW02 SW01 SW0A RF_IN RF_OUT VBB L800 BEAD C700 100nF RB0/INT RA5 RC RC4 RC5 RC6 RC7 RC0 RC1 RC2 RE RA6 RA7 RA0 RB1 RB2 RB RB4 RB5 RB6 RB7 RA1 RA2 RA RA4 U100 01 10 09 2 24 25 26 27 28 0 04 05 06 08 19 21 07 14 15 16 17 18 11 12 1 02 20 PIC16F88 S0a S01 S02 S0 S04 S05 S06 S07 S08 S09 S10 S11 S12 1 2 4 5 C800 10uF 6 SW0B S0b R100 10k TeraSys Technologies RF_IN A7 A6 A5 A4 A A2 A1 A0 STB VBB RF_OUT (RX) (TX) (SDO) (SDI) (SCK) VPP PCK PDA 6V (SS)
Sxx Q1YY 5551 Q1XX 5551 RAXX R9XX 10k SWxx C7XX VBB DXX RB520S Q2XX 5551 RCXX Q2YY 5551 RBXX 0k TeraSys Technologies 1 2 4 5 6 200V 6 1 2 5 4 BIT 0B 0A 01 02 0 04 05 06 07 08 09 10 11 RB CD 27 68 68 27 27 27 12
L100 460nH L00 7nH C100 68pF L500 470nH C200 68pF L400 7nH L200 460nH RESA RESB 1 2 4 5 6 7 8 9 10 11 12 1 14 15 16 17 18 19 20 21 42 41 40 9 8 7 6 5 4 2 1 0 29 28 27 26 25 24 2 SW12 SW11 SW10 SW09 SW08 SW07 SW06 SW05 SW04 SW0 SW02 SW01 SW0A L600 470nH SW0B L700 470nH C00 C400 C500 C600 TeraSys Technologies RF_IN A7 A6 A5 A4 A A2 A1 A0 STB VBB RF_OUT Q BW LS LT 10 15 20 25 0 10.0 6.7 5.0 4.0. 460nH 470nH 97nH 276nH 0nH 140nH 90nH 270nH 0nH 150nH
C1XX 1p5F D1XX SMP120 RXX 470k R1XX 47 RESA D1YY SMP120 CXX R2XX 47 R4XX 470k SWXX C2XX RESB C5XX C6XX R7XX 470k R8XX 470k D2XX SMP120 D2YY SMP120 C4XX 1p5F R5XX 47 R6XX 47 TeraSys Technologies 1 2 2 1 100V 100V 100V 100V 100V 100V BIT AB CF 01 02 0 04 05 06 07 08 09 10 11 12 CD 2n2F 2n2F 2n2F 2n2F 2n2F 2n2F 2n2F 1p5F 2p7F 4p7F 8p2F 15pF 27pF 47pF 82pF 120pF 10pF 10pF 10pF 10pF
TeraTune Project 100 lines of code 600 lines of code 0 surface mount parts (26 PIN diodes) 900 lines of code 00 lines of code