I) EQUATION 1: SHUNT-CONTROLLED

Swich Mode Power Supply (SMPS) Topologies (Par I) Auhor: Mohammad Kamil Microchip Technology Inc. EQUATION 1: SHUNT-CONTROLLED REGULATOR POWER LOSS INTRODUCTION The indusry drive oward smaller, ligher and more efficien elecronics has led o he developmen of he Swich Mode Power Supply (SMPS). There are several opologies commonly used o implemen SMPS. This applicaion noe, which is he firs of a wo-par series, explains he basics of differen SMPS opologies. Applicaions of differen opologies and heir pros and cons are also discussed in deail. This applicaion noe will guide he user o selec an appropriae opology for a given applicaion, while providing useful informaion regarding selecion of elecrical and elecronic componens for a given SMPS design. WHY SMPS? The main idea behind a swich mode power supply can easily be undersood from he concepual explanaion of a DC-o-DC converer, as shown in Figure 1. The load, RL, needs o be supplied wih a consan volage, VOUT, which is derived from a primary volage source, VIN. As shown in Figure 1, he oupu volage VOUT can be regulaed by varying he series resisor (RS) or he shun curren (IS). When VOUT is conrolled by varying IS and keeping RS consan, power loss inside he converer occurs. This ype of converer is known as shun-conrolled regulaor. The power loss inside he converer is given by Equaion 1. Please noe ha he power loss canno be eliminaed even if IS becomes zero. FIGURE 1: VIN DC-DC CONVERTER R S IS IOUT R L V OUT However, if we conrol he oupu volage VOUT by varying RS and keeping IS zero, he ideal power loss inside he converer can be calculaed as shown in Equaion 2. EQUATION 2: P LOSS = V OUT I S + ( I OUT + I S ) 2 R S SERIES-CONTROLLED REGULATOR POWER LOSS 2 P LOSS = ------------------------- ( + ) 2 This ype of converer is known as a series-conrolled regulaor. The ideal power loss in his converer depends on he value of he series resisance, RS, which is required o conrol he oupu volage, VOUT, and he load curren, IOUT. If he value of RS is eiher zero or infinie, he ideal power loss inside he converer should be zero. This feaure of a series-conrolled regulaor becomes he seed idea of SMPS, where he conversion loss can be minimized, which resuls in maximized efficiency. In SMPS, he series elemen, RS, is replaced by a semiconducor swich, which offers very low resisance a he ON sae (minimizing conducion loss), and very high resisance a he OFF sae (blocking he conducion). A low-pass filer using non-dissipaive passive componens such as inducors and capaciors is placed afer he semiconducor swich, o provide consan DC oupu volage. The semiconducor swiches used o implemen swich mode power supplies are coninuously swiched on and off a high frequencies (50 khz o several MHz), o ransfer elecrical energy from he inpu o he oupu hrough he passive componens. The oupu volage is conrolled by varying he duy cycle, frequency or phase of he semiconducor devices ransiion periods. As he size of he passive componens is inversely proporional o he swiching frequency, a high swiching frequency resuls in smaller sizes for magneics and capaciors. While he high frequency swiching offers he designer a huge advanage for increasing he power densiy, i adds power losses inside he converer and inroduces addiional elecrical noise. R S R S R L 2007 Microchip Technology Inc. DS01114A -page 1

SELECTION OF SMPS TOPOLOGIES There are several opologies commonly used o implemen SMPS. Any opology can be made o work for any specificaion; however, each opology has is own unique feaures, which make i bes suied for a cerain applicaion. To selec he bes opology for a given specificaion, i is essenial o know he basic operaion, advanages, drawbacks, complexiy and he area of usage of a paricular opology. The following facors help while selecing an appropriae opology: a) Is he oupu volage higher or lower han he whole range of he inpu volage? b) How many oupus are required? c) Is inpu o oupu dielecric isolaion required? d) Is he inpu/oupu volage very high? e) Is he inpu/oupu curren very high? f) Wha is he maximum volage applied across he ransformer primary and wha is he maximum duy cycle? Facor (a) deermines wheher he power supply opology should be buck, boos or buck-boos ype. Facors (b) and (c) deermine wheher or no he power supply opology should have a ransformer. Reliabiliy of he power supply depends on he selecion of a proper opology on he basis of facors (d), (e) and (f). Buck Converer A buck converer, as is name implies, can only produce lower average oupu volage han he inpu volage. The basic schemaic wih he swiching waveforms of a buck converer is shown in Figure 2. In a buck converer, a swich (Q1) is placed in series wih he inpu volage source VIN. The inpu source VIN feeds he oupu hrough he swich and a low-pass filer, implemened wih an inducor and a capacior. In a seady sae of operaion, when he swich is ON for a period of TON, he inpu provides energy o he oupu as well as o he inducor (L). During he TON period, he inducor curren flows hrough he swich and he difference of volages beween VIN and VOUT is applied o he inducor in he forward direcion, as shown in Figure 2 (C). Therefore, he inducor curren IL rises linearly from is presen value IL1 o IL2, as shown in Figure 2 (E). During he TOFF period, when he swich is OFF, he inducor curren coninues o flow in he same direcion, as he sored energy wihin he inducor coninues o supply he load curren. The diode D1 complees he inducor curren pah during he Q1 OFF period (TOFF); hus, i is called a freewheeling diode. During his TOFF period, he oupu volage VOUT is applied across he inducor in he reverse direcion, as shown in Figure 2 (C). Therefore, he inducor curren decreases from is presen value IL2 o IL1, as shown in Figure 2 (E). DS01114A -page 2 2007 Microchip Technology Inc.

FIGURE 2: BUCK CONVERTER I IN Q 1 (A) VIN L + - IL I OUT D 1 V OUT (B) Q 1GATE (C) V L - V OUT -V OUT ( - V OUT )/L (D) I IN (E) I L I L2 I L1 (A) = Buck converer (B) = Gae pulse of MOSFET Q 1 (C) = Volage across he Inducor L (D) = Inpu curren I IN (E) = Inducor curren I L -V OUT /L CONTINUOUS CONDUCTION MODE The inducor curren is coninuous and never reaches zero during one swiching period (TS); herefore, his mode of operaion is known as Coninuous Conducion mode. In Coninuous Conducion mode, he relaion beween he oupu and inpu volage is given by Equaion 3, where D is known as he duy cycle, which is given by Equaion 4. EQUATION 4: DUTY CYCLE T ON T S D = --------- where: T ON = ON Period T S = Swiching Period EQUATION 3: BUCK CONVERTER VOUT/VIN RELATIONSHIP V OUT = D If he oupu o inpu volage raio is less han 0.1, i is always advisable o go for a wo-sage buck converer, which means o sep down he volage in wo buck operaions. Alhough he buck converer can be eiher coninuous or disconinuous, is inpu curren is always disconinuous, as shown in Figure 2 (D). This resuls in a larger elecromagneic inerference (EMI) filer han he oher opologies. 2007 Microchip Technology Inc. DS01114A -page 3

CURRENT MODE CONTROL While designing a buck converer, here is always a rade-off beween he inducor and he capacior size selecion. A larger inducor value means numerous urns o he magneic core, bu less ripple curren (<10% of full load curren) is seen by he oupu capacior; herefore, he loss in he inducor increases. Also, less ripple curren makes curren mode conrol almos impossible o implemen (refer o Mehod of Conrol for deails on curren mode conrol echniques). Therefore, poor load ransien response can be observed in he converer. A smaller inducor value increases ripple curren. This makes implemenaion of curren mode conrol easier, and as a resul, he load ransien response of he converer improves. However, high ripple curren needs a low Equivalen Series Resisor (ESR) oupu capacior o mee he peak-o-peak oupu volage ripple requiremen. Generally, o implemen he curren mode conrol, he ripple curren a he inducor should be a leas 30% of he full load curren. FEED-FORWARD CONTROL In a buck converer, he effec of inpu volage variaion on he oupu volage can be minimized by implemening inpu volage feed-forward conrol. I is easy o implemen feed-forward conrol when using a digial conroller wih inpu volage sense, compared o using an analog conrol mehod. In he feed-forward conrol mehod, he digial conroller sars aking he appropriae adapive acion as soon as any change is deeced in he inpu volage, before he change in inpu can acually affec he oupu parameers. SYNCHRONOUS BUCK CONVERTER When he oupu curren requiremen is high, he excessive power loss inside he freewheeling diode D1, limis he minimum oupu volage ha can be achieved. To reduce he loss a high curren and o achieve lower oupu volage, he freewheeling diode is replaced by a MOSFET wih a very low ON sae resisance RDSON. This MOSFET is urned on and off synchronously wih he buck MOSFET. Therefore, his opology is known as a synchronous buck converer. A gae drive signal, which is he complemen of he buck swich gae drive signal, is required for his synchronous MOSFET. A MOSFET can conduc in eiher direcion; which means he synchronous MOSFET should be urned off immediaely if he curren in he inducor reaches zero because of a ligh load. Oherwise, he direcion of he inducor curren will reverse (afer reaching zero) because of he oupu LC resonance. In such a scenario, he synchronous MOSFET acs as a load o he oupu capacior, and dissipaes energy in he RDSON (ON sae resisance) of he MOSFET, resuling in an increase in power loss during disconinuous mode of operaion (inducor curren reaches zero in one swiching cycle). This may happen if he buck converer inducor is designed for a medium load, bu needs o operae a no load and/or a ligh load. In his case, he oupu volage may fall below he regulaion limi, if he synchronous MOSFET is no swiched off immediaely afer he inducor reaches zero. MULTIPHASE SYNCHRONOUS BUCK CONVERTER I is almos impracical o design a single synchronous buck converer o deliver more han 35 amps load curren a a low oupu volage. If he load curren requiremen is more han 35-40 amps, more han one converer is conneced in parallel o deliver he load. To opimize he inpu and oupu capaciors, all he parallel converers operae on he same ime base and each converer sars swiching afer a fixed ime/phase from he previous one. This ype of converer is called a muliphase synchronous buck converer. Figure 3 shows he muliphase synchronous buck converer wih a gae pulse iming relaion of each leg and he inpu curren drawn by he converer. The fixed ime/phase is given by Time period/n or 300/n, where n is he number of he converer conneced in parallel. The design of inpu and oupu capaciors is based on he swiching frequency of each converer muliplied by he number of parallel converers. The ripple curren seen by he oupu capacior reduces by n imes. As shown in Figure 3 (E), he inpu curren drawn by a muliphase synchronous buck converer is coninuous wih less ripple curren as compared o a single converer shown in Figure 2 (D). Therefore, a smaller inpu capacior mees he design requiremen in case of a muliphase synchronous buck converer. DS01114A -page 4 2007 Microchip Technology Inc.

FIGURE 3: MULTIPHASE SYNCHRONOUS BUCK CONVERTER + IQ 1 IQ 3 IQ 5 Q 1 Q 3 Q 5 L 3 I L3 V OUT (A) C IN L 2 I L2 L 1 I L1 C O Q 2 Q 4 Q 6 - I L1 (B) Q 1PWM I L2 (C) Q 3PWM I L3 (D) Q 5PWM IQ 5 +IQ 1 IQ 1 +IQ 3 IQ 3 +IQ 5 IQ 5 +IQ 1 (E) I IN IQ 1 IQ 3 IQ 5 (A) = Muliphase Synchronous Buck converer (B) = Gae pulse of Q 1, inducor curren I L1 (C) = Gae pulse of Q 3, Inducor curren I L2 (D) = Gae pulse of Q 5, Inducor curren I L3 (E) = Inpu curren I IN 2007 Microchip Technology Inc. DS01114A -page 5

Boos Converer A boos converer, as is name implies, can only produce a higher oupu average volage han he inpu volage. The basic schemaic wih he swiching waveform of a boos converer is shown in Figure 4. In a boos converer, an inducor (L) is placed in series wih he inpu volage source VIN. The inpu source feeds he oupu hrough he inducor and he diode D1. In he seady sae of operaion, when he swich Q1 is ON for a period of TON, he inpu provides energy o he inducor. During he TON period, inducor curren (IL) flows hrough he swich and he inpu volage VIN is applied o he inducor in he forward direcion, as shown in Figure 4 (C). Therefore, he inducor curren rises linearly from is presen value IL1 o IL2, as shown in Figure 4 (D). During his TON period, he oupu load curren IOUT is supplied from he oupu capacior CO. The oupu capacior value should be large enough o supply he load curren for he ime period TON wih he minimum specified droop in he oupu volage. During he TOFF period when he swich is OFF, he inducor curren coninues o flow in he same direcion as he sored energy wih he inducor, and he inpu source VIN supplies energy o he load. The diode D1 complees he inducor curren pah hrough he oupu capacior during he Q1 OFF period (TOFF). During his TOFF period, he inducor curren flows hrough he diode and he difference of volages beween VIN and VOUT is applied o he inducor in he reverse direcion, as shown in Figure 4 (C). Therefore, he inducor curren decreases from he presen value IL2 o IL1, as shown in Figure 4 (D). CONTINUOUS CONDUCTION MODE As shown in Figure 4 (D), he inducor curren is coninuous and never reaches zero during one swiching cycle (TS); herefore, his mehod is known as Coninuous Conducion mode, which is he relaion beween oupu and inpu volage, as shown in Equaion 5. FIGURE 4: BOOST CONVERTER + I L D 1 + V L - I D1 I OUT + (A) Q 1 C O V OUT - - (B) Q 1PWM (C) V L V OUT - I L2 IQ 1 I D1 (D) I L1 (E) V DS (A) = Boos converer (B) = Gae pulse of MOSFET Q 1 (C) = Volage across he inducor L (D) = Curren hrough he MOSFET Q 1 and diode D 1 (E) = Volage across he MOSFET Q 1 V OUT DS01114A -page 6 2007 Microchip Technology Inc.

EQUATION 5: VOUT/VIN RELATIONSHIP The roo mean square (RMS) ripple curren in he oupu capacior is given by Equaion 6. I is calculaed by considering he waveform shown in Figure 4 (D). During he TOFF period, he pulsaing curren ID1, flows ino he oupu capacior and he consan load curren (IOUT) flows ou of he oupu capacior. EQUATION 6: CAPACITOR RIPPLE RMS CURRENT Based on Equaion 5, he VOUT/VIN raio can be very large when he duy cycle approaches uniy, which is ideal. However, unlike he ideal characerisic, VOUT/VIN declines as he duy raio approaches uniy, as shown in Figure 5. Because of very poor uilizaion of he swich, parasiic elemens occur in he componens and losses associaed wih he inducor capacior and semiconducors. FIGURE 5: V OUT = ----------------- ( 1 D) I RIPPLERMS = ( I D1 ) 2 ( I OUT ) 2 where: I D1RMS = RMS value of I D1 I RIPPLERMS = Ripple RMS curren of capacior I OUT = Oupu DC curren V OUT / 7 6 5 4 3 2 1 VOUT/VIN AND DUTY CYCLE IN BOOST CONVERTER Ideal 0.25 0.5 0.75 1 Duy Cycle = D POWER FACTOR CORRECTION Pracical When he boos converer operaes in Coninuous Conducion mode, he curren drawn from he inpu volage source is always coninuous and smooh, as shown in Figure 4 (D). This feaure makes he boos converer an ideal choice for he Power Facor Correcion (PFC) applicaion. Power Facor (PF) is given by he produc of he Toal Curren Harmonics Disorion Facor (THD) and he Displacemen Facor (DF). Therefore, in PFC, he inpu curren drawn by he converer should be coninuous and smooh enough o mee he THD of he inpu curren so ha i is close o uniy. In addiion, inpu curren should follow he inpu sinusoidal volage waveform o mee he displacemen facor so ha i is close o uniy. Forward Converer A forward converer is a ransformer-isolaed converer based on he basic buck converer opology. The basic schemaic and swiching waveforms are shown in Figure 6. In a forward converer, a swich (Q1) is conneced in series wih he ransformer (T1) primary. The swich creaes a pulsaing volage a he ransformer primary winding. The ransformer is used o sep down he primary volage, and provide isolaion beween he inpu volage source VIN and he oupu volage VOUT. In he seady sae of operaion, when he swich is ON for a period of TON, he do end of he winding becomes posiive wih respec o he non-do end. Therefore, he diode D1 becomes forward-biased and he diodes D2 and D3 become reverse-biased. As he inpu volage VIN is applied across he ransformer primary, he magneizing curren IM increases linearly from is iniial zero value o a final value wih a slope of VIN/LM, where LM is he magneizing inducance of he primary winding, as shown in Figure 6(D). The oal curren ha flows hrough he primary winding is his magneizing curren plus he inducor curren (IL) refleced on he primary side. This oal curren flows hrough he MOSFET during he TON period. The volage across he diode D2 is equal o he inpu volage muliplied by he ransformer urns raio (NS/NP). In he case of a forward converer, he volage applied across he inducor L in he forward direcion during he TON period, is given by Equaion 7, neglecing he ransformer losses and he diode forward volage drop. EQUATION 7: DISSIPATING ENERGY FORWARD VOLTAGE ACROSS INDUCTOR N V L V S ΔI L = IN ------ V OUT = L ------- Δ N P A he end of he ON period, when he swich is urned OFF, here is no curren pah o dissipae he sored energy in he magneic core. There are many ways o dissipae his energy. One such mehod is shown in Figure 6. In his mehod, he flux sored inside he magneic core induces a negaive volage a he do end of he NR winding, which forward biases he diode D3 and reses he magneizing energy sored in he core. Therefore, he NR winding is called he rese winding. Reseing he magneizing curren during he OFF period is imporan o avoid sauraion. During he TOFF period when he swich is OFF, he inducor curren (IL) coninues o flow in he same direcion, while he sored energy wihin he inducor coninues o supply he load curren IOUT. 2007 Microchip Technology Inc. DS01114A -page 7

FIGURE 6: FORWARD CONVERTER + I 3 + V P N P T 1 N S D 1 + I L + V L - D 2 V OUT (A) - I SW D N R - D 3 - Q 1 G S (B) Q 1PWM (C) V P (1+N P /N R ) I M I M (D) I IN IP I M I P I M T ON I 3 T M T OFF I 3 T S (E) V DS (1+N P /N R ) (1+N P /N R ) I L IOUT (F) I L ΔI L (A) = Forward Converer power circui diagram. (B) = Gae pulse of MOSFET Q 1 (C) = Volage across he ransformer primary winding N P (D) = Curren hrough N P and N R (E) = Volage across he MOSFET Q 1 (F) = Oupu Inducor curren I L DS01114A -page 8 2007 Microchip Technology Inc.

The diode D2, called a freewheeling diode, complees he inducor curren pah during he Q1 off period (TOFF). During his TOFF period, he oupu volage VOUT is applied across he inducor in he reverse direcion. In a coninuous conducion mode of operaion, he relaion beween he oupu volage and inpu volage is given by Equaion 8, where D is he duy cycle. EQUATION 8: FORWARD CONVERTER VOUT/VIN RELATIONSHIP N V S IN ------ V N OUT T = V T ON OUT OFF P CONTROLLING MAGNETIZATION When he swich is urned OFF, he diode D1 becomes reverse-biased, and IM canno flow in he secondary side. Therefore, he magneizing curren is aken away by he rese winding of he ransformer, as shown in Figure 6(A and D). The refleced magneizing curren I3 flows hrough he rese winding NR and he diode D3 ino he inpu supply. During he inerval TM when I3 is flowing, he volage across he ransformer primary as well as LM is given by Equaion 9. EQUATION 9: N S V OUT = ------ D REFLECTED VOLTAGE AT PRIMARY N ------ P N R Time aken by he ransformer o complee he demagneizaion can be obained by recognizing ha he ime inegral of volage across he LM mus be zero over one ime period. The maximum value of TM, as shown in Figure 6, is he ime i akes he ransformer o compleely demagneize before he nex cycle begins and is equal o TOFF. Therefore, he maximum duy cycle and he maximum drain-o-source blocking volage (VDS) seen by he swich (Q1) in a forward converer having number of primary and number of rese winding urns as NP and NR, is given by Equaion 10. N P V IN EQUATION 10: MAXIMUM DUTY CYCLE AND VDS The maximum value of TM/TS o compleely demagneize before he nex cycle begins is equal o (1-D), so he maximum duy raio for he forward converer is given by Equaion 10. From Equaion 10, i is undersood ha when he number of primary winding urns, NP, is equal o he number of he rese winding urns, NR, he swich can have a maximum 50% duy cycle and he blocking volage of he swich will be equal o wice he inpu volage. The pracical limi of maximum duy cycle should be 45%, and maximum blocking volage seen by he swich will be more han wice he inpu volage due o he nonlineariy of componens and he leakage inducance of he ransformer. EQUATION 11: N R ( 1 D MAX ) = ------ N P D MAX D 1 MAX = -------------------------- N R 1 + ------ MAGNETIZING STORED ENERGY IN FLYBACK TRANSFORMER If NR is chosen o be less han NP, he maximum duy cycle DMAX can be more han 50%; however, he maximum blocking volage sress of he swich becomes more han 2 VIN he value of DMAX and VDS, as shown in Equaion 10. If NR is chosen o be larger han NP, DMAX will be less han 50%, bu he maximum blocking volage sress of he swich is now less han 2 VIN, he value of DMAX and VDS, as shown in Equaion 10. Since large volage isolaion is no required beween he rese and he primary windings, hese wo windings can be wound bifilar o minimize leakage inducance. The rese winding carries only he magneizing curren, which means i requires a smaller size of wire as compared o he primary winding. N P N P V DS = + ------ 1 E P = -- ( I 2 PK ) 2 L M ( V I IN T ON ) PK = --------------------------- L where: M E P = Joules I PK = Amps L M = Henries N R 2007 Microchip Technology Inc. DS01114A -page 9

To demagneize he ransformer core, a Zener diode or RC snubber circui can also be used across he ransformer insead of he ransformer rese winding. The incomplee uilizaion of he magneics, he maximum duy cycle limi and he high volage sress of he swich, make a forward converer feasible for he oupu power (up o 150 was) of an off-line low-cos power supply. Is non-pulsaing oupu inducor curren makes he forward converer well suied for he applicaion involving a very high load curren (>15A). The presence of he oupu inducor limis he use of a forward converer in a high oupu volage (>30V) applicaion, which requires a bulky inducor o oppose he high oupu volage. INCREASING EFFICIENCY The efficiency of a forward converer is low compared o oher opologies wih he same oupu power, due o he presence of four major loss elemens: he swich, ransformer, oupu diode recifiers and oupu inducor. To increase efficiency, a synchronous MOSFET can be used in place of he oupu diode recifier. The MOSFET can be self-driven hrough he exra or he same windings in he ransformer secondary, as shown in Figure 7. FIGURE 7: D Q 1 G Q 2 G SYNCHRONOUS RECTIFIER S D S Improving he load ransien response and implemening curren mode conrol requires reducing he oupu inducor value and he use of a beer oupu capacior o mee he oupu volage ripple requiremen, as discussed in he Buck Converer secion. A muliple oupu, forward converer coupled inducor is used o ge beer cross-load regulaion requiremens. Two-Swich Forward Converer The maximum volage sress of he swich in a forward converer can be limied o a value equal o he inpu volage, by placing one more swich (Q2) in series wih he ransformer primary winding, as shown in Figure 8. The resuling converer is called a wo-swich forward converer. The basic schemaic and swiching waveforms of he wo-swich forward converer are shown in Figure 8. The swiches Q1 and Q2 are conrolled by he same gae drive signal, as shown in Figure 8 (B and C). In he seady sae of operaion, when he swiches Q1 and Q2 are ON for a TON period, he inpu volage VIN is applied o he ransformer primary. During he TON period, he magneizing curren plus he refleced oupu inducor curren flows hrough he ransformer primary and he swiches Q1 and Q2. A he end of he ON period, when he swiches are urned OFF, he flux sored inside he magneic core induces a volage in he reverse direcion o he ransformer primary winding, which forward-biases he diodes D1 and D2, and provides a pah o he magneizing curren o rese he core. The volage VIN is applied across he ransformer primary winding in he reverse direcion, as shown in Figure 8 (D). If here is no leakage inducance in he ransformer T1, he volage across NP would be equal o VIN, and he maximum blocking volage across he swich is VIN. When he magneizing curren reaches zero, diodes D1 and D2 become reverse-biased and remain zero for he res of he swiching period. The secondary side operaion of he wo-swich forward converer is he same as he operaion of he forward converer explained earlier. APPLICATION CONSIDERATIONS Reducion in he blocking volage of he swich allows he designer o selec a beer low-volage MOSFET for he design. Therefore, he wo-swich forward converer can be used up o he oupu power level of 350 was. If peak curren is greaer han 350 was, losses across he MOSFET become impracical o handle, and incomplee uilizaion of magneic makes he ransformer bulky (see Figure 9). Therefore, he wo-swich forward converer is bes suied for applicaions wih an oupu power level range of 150 o 350 was. DS01114A -page 10 2007 Microchip Technology Inc.

FIGURE 8: TWO-SWITCH FORWARD CONVERTER + D 1 Q 2 D D 3 I L (A) V P N P N S + V - + L D 4 V OUT - D 2 Q 1 D - T S (B) Q 1PWM T OFF (C) Q 2PWM (D) V P VIN I N (E) V P I P (F) (A) = Two-swich forward converer power circui (B) = Gae pulse for MOSFET Q 1 (C) = Gae pulse for MOSFET Q 2 (D) = Volage across he primary winding N P (E) = Curren hrough he primary winding N P (F) = Volage across he MOSFET Q 1 and Q 2. 2007 Microchip Technology Inc. DS01114A -page 11

FIGURE 9: TRANSFORMER BH CURVE OF SINGLE SWITCH CONVERTER B SAT B EQUATION 12: FLYBACK CONVERTER VOUT/VIN RELATIONSHIP V ------------- OUT N ------ S D = ----------------- V IN N P ( 1 D) where: D = he duy cycle of he flyback swich Flyback Converer (FBT) A flyback converer (FBT) is a ransformer-isolaed converer based on he basic buck boos opology. The basic schemaic and swiching waveforms are shown in Figure 10. In a flyback converer, a swich (Q1) is conneced in series wih he ransformer (T1) primary. The ransformer is used o sore he energy during he ON period of he swich, and provides isolaion beween he inpu volage source VIN and he oupu volage VOUT. In a seady sae of operaion, when he swich is ON for a period of TON, he do end of he winding becomes posiive wih respec o he non-do end. During he TON period, he diode D1 becomes reverse-biased and he ransformer behaves as an inducor. The value of his inducor is equal o he ransformer primary magneizing inducance LM, and he sored magneizing energy (see Equaion 11) from he inpu volage source VIN. Therefore, he curren in he primary ransformer (magneizing curren IM) rises linearly from is iniial value I1 o IPK, as shown in Figure 10 (D). As he diode D1 becomes reverse-biased, he load curren (IOUT) is supplied from he oupu capacior (CO). The oupu capacior value should be large enough o supply he load curren for he ime period TON, wih he maximum specified droop in he oupu volage. ΔB H A he end of he TON period, when he swich is urned OFF, he ransformer magneizing curren coninues o flow in he same direcion. The magneizing curren induces negaive volage in he do end of he ransformer winding wih respec o non-do end. The diode D1 becomes forward-biased and clamps he ransformer secondary volage equal o he oupu volage. The energy sored in he primary of he flyback ransformer ransfers o secondary hrough he flyback acion. This sored energy provides energy o he load, and charges he oupu capacior. Since he magneizing curren in he ransformer canno change insananeously a he insan he swich is urned OFF, he primary curren ransfers o he secondary, and he ampliude of he secondary curren will be he produc of he primary curren and he ransformer urns raio, NP/NS. DISSIPATING STORED LEAKAGE ENERGY A he end of he ON period, when he swich is urned OFF, here is no curren pah o dissipae he sored leakage energy in he magneic core of he flyback ransformer. There are many ways o dissipae his leakage energy. One such mehod is shown in Figure 10 as a snubber circui consising of D2, RS and CS. In his mehod, he leakage flux sored inside he magneic core induces a posiive volage a he non-do end primary winding, which forward-biases he diode D2 and provides he pah o he leakage energy sored in he core, and clamps he primary winding volage o a safe value. During his process, CS is charged o a volage slighly more han he refleced secondary flyback volage, which is known as flyback overshoo. The spare flyback energy is dissipaed in resisor RS. In a seady sae, and if all oher condiions remain consan, he clamp volage is direcly proporional o RS. The flyback overshoo provides addiional forcing vols o drive curren ino he secondary leakage inducance during he flyback acion. This resuls in a faser increase in he ransformer secondary curren, which improves he efficiency of he flyback ransformer. CONTINUOUS CONDUCTION MODE The waveform shown in Figure 10 (D) represens Coninuous Conducion mode operaion of a flyback converer. Coninuous Conducion mode corresponds o he incomplee demagneizaion of he flyback ransformer core. The core flux increases linearly from DS01114A -page 12 2007 Microchip Technology Inc.

he iniial value flux (0) o flux (PK) during he ON period, TON. In a seady sae, he change in core flux during he TON period should be equal o he change in flux during he TOFF period. This is imporan o avoid sauraion. The relaion beween he inpu and oupu volage in a seady sae and coninuous mode of operaion is given by Equaion 12. FIGURE 10: FLYBACK CONVERTER + R S C S D 1 I OUT (A) D2 V P N S NP I D1 V OUT I SW Q 1 D - (B) Q 1PWM T ON T OFF T S (C) V P V CLAMP I PK (D) I SW I 1 (E) I D1 N P N S I PK (F) + V CLAMP (A) = Flyback converer power circui (B) = Gae pulse for he MOSFET Q 1 (C) = Volage across he primary winding (D) = Curren hrough MOSFET Q 1 (E) = Curren hrough he diode D 1 (F) = Volage across he MOSFET Q 1 2007 Microchip Technology Inc. DS01114A -page 13

During Coninuous Conducion mode of operaion, he duy cycle is independen of he load drawn from he converer, and is a consan for he DC inpu volage. However, in a pracical siuaion he load increases he loss inside he ransformer and he oupu diode D2 loss is also increased. To mainain consan oupu volage, he duy cycle varies slighly in Coninuous Conducion mode a a consan DC inpu volage. Because of he presence of he secondary refleced volage on he primary winding and he leakage sored energy in he ransformer core, he maximum volage sress VDS of he swich is given by Equaion 13. If he flyback converer is used for universal inpu of he off-line power supply, he swich volage raing should be 700V, considering he secondary refleced volage of 180V and 20% vols of leakage spike due o leakage energy sorage in he ransformer. residual flux densiy, BR, as shown in Figure 11. Therefore, he air gap increases he working range of dela BH o increase he hroughpu of he flyback ransformer. FIGURE 11: ΔBAC B BSAT BH CURVE WITH AIR GAP FOR THE FLYBACK TRANSFORMER EQUATION 13: MAXIMUM VDS IN FLYBACK CONVERTER V DS = + V CLAMP + V LEAKAGE where: V CLAMP = Volage across he snubber circui (D 2, R 2, and C 2 ) V LEAKAGE = Leakage spike volage due o leakage energy ΔH wihou air gap ΔH (air gap) H SELECTING A CAPACITOR The pulsaing curren ID1, as shown in Figure 10(E), flows in, and he DC load curren flows ou of he oupu capacior, which causes he oupu capacior of he flyback converer o be highly sressed. In he flyback converer, he selecion of he oupu capacior is based on he maximum ripple RMS curren seen by he capacior given by Equaion 6, and he maximum peak-o-peak oupu volage ripple requiremens. The oupu volage peak-o-peak ripple depends on he ripple curren seen in he capacior and is Equivalen Series Resisor (ESR). The ESR of he capacior and he ripple curren cause heaing inside he capacior, which affecs is predicive life. Therefore, selecion of he capacior depends highly on he ripple curren raing and he ESR value so as o mee he emperaure rise and oupu volage ripple requiremen. If he oupu ripple curren is high, i is advisable o have more han one capacior in parallel in place of a single, large capacior. These capaciors should be placed a an equal disance from he diode cahode erminal, so ha each capacior shares equal curren. AIR GAP To increase he hroughpu capabiliy and reduce he chances of magneic sauraion in he flyback ransformer core, an air gap is insered in he limb of he ransformer core. This air gap doesn' change he sauraion flux densiy (BSAT) value of he core maerial; however, i increases he magneic field inensiy, H, o reach sauraion and reduces he ADVANTAGES OF FLYBACK TOPOLOGY Flyback opology is widely used for he oupu power from a maximum of a 5 o150 wa low-cos power supply. Flyback opology doesn use an oupu inducor, hus saving cos and volume as well as losses inside he flyback converer. I is bes suied for delivering a high oupu volage up o 400V a a low oupu power up o 15-20 was. The absence of he oupu inducor and he freewheeling diode (used in he forward converer) makes he flyback converer opology bes suied for high oupu volage applicaions. In a flyback converer, when more han one oupu is presen, he oupu volages rack one anoher wih he inpu volage and he load changes, far beer han hey do in he forward converer. This is because of he absence of he oupu inducor, so he oupu capacior connecs direcly o he secondary of he ransformer and acs as a volage source during he urned off period (TOFF) of he swich. APPLICATION CONSIDERATIONS For he same oupu power level, and if he oupu curren requiremen is more han 12-15 amps, he RMS peak-o-peak ripple curren seen by he oupu capacior is very large, and becomes impracical o handle. Therefore, i is beer o use he forward converer opology han he flyback opology for an applicaion where he oupu curren requiremen is high. DS01114A -page 14 2007 Microchip Technology Inc.

Push-Pull Converer A push-pull converer is a ransformer-isolaed converer based on he basic forward opology. The basic schemaic and swiching waveforms are shown in Figure 12. The high-volage DC is swiched hrough he cener-apped primary of he ransformer by wo swiches, Q1 and Q2, during alernae half cycles. These swiches creae pulsaing volage a he ransformer primary winding. The ransformer is used o sep down he primary volage and o provide isolaion beween he inpu volage source VIN and he oupu volage VOUT. The ransformer used in a push-pull converer consiss of a cener-apped primary and a cener-apped secondary. The swiches Q1 and Q2 are driven by he conrol circui, such ha boh swiches should creae equal and opposie flux in he ransformer core. 2007 Microchip Technology Inc. DS01114A -page 15

In he seady sae of operaion, when Q1 is ON for he period of TON, he do end of he windings become posiive wih respec o he non-do end. The diode D5 becomes reverse-biased and he diode D6 becomes forward-biased. Thus, he diode D6 provides he pah o he oupu inducor curren IL hrough he ransformer secondary NS2. As he inpu volage VIN is applied o he ransformer primary winding NP1, a refleced primary volage appears in he ransformer secondary. The difference of volages beween he ransformer secondary and oupu volage VOUT is applied o he inducor L in he forward direcion. Therefore, he inducor curren IL rises linearly from is iniial value of IL1 o IL2, as shown in Figure 12(E). During his TON period while he inpu volage is applied across he ransformer primary NP1, he value of he magneic flux densiy in he core is changed from is iniial value of B1 o B2, as shown in Figure 13. FIGURE 12: PUSH-PULL CONVERTER D 6 I L + L - I OUT V OUT N P2 N S2 + (A) N P1 N S1 D 5 Q 2 D Q 1 D - Q 1PWM T ON T OFF (B) T S /2 Ts Q 2PWM V DS1 (C) I IN IQ 1 IQ 2 IQ 1 IQ 2 (D) V DS2 (E) I L I L2 I L1 (A) = Push-pull converer (B) = Gae pulse of MOSFET Q 1 (C) = Drain-o-source volage Vds of MOSFET Q 1 (D) = Curren hrough he MOSFET Q 1 and Q 2 (E) = Oupu inducor curren DS01114A -page 16 2007 Microchip Technology Inc.

A he end of he TON period, he swich Q1 is urned OFF, and remains off for he res of he swiching period TS. The swich Q2 will be urned ON afer half of he swiching period TS/2, as shown in Figure 12. Thus, during he TOFF period, boh of he swiches (Q1 and Q2) are OFF. When swich Q1 is urned OFF, he body diode of he swich provides he pah for he leakage energy sored in he ransformer primary, and he oupu recifier diode D5 becomes forward-biased. As he diode D5 becomes forward-biased, i carries half of he inducor curren hrough he ransformer secondary NS1, and half of he inducor curren is carried by he diode D6 hrough he ransformer secondary NS2. This resuls in equal and opposie volages applied o he ransformer secondaries, assuming boh secondary windings NS1 and NS2 have an equal number of urns. Therefore, he ne volage applied across he secondary during he TOFF period is zero, which keeps he flux densiy in he ransformer core consan o is final value B2. The oupu volage VOUT is applied o he inducor L in he reverse direcion when boh swiches are OFF. Thus, he inducor curren IL decreases linearly from is iniial value of IL2 o IL1, as shown in Figure 12 (E). AVOIDING MAGNETIC SATURATION Afer he ime period TS/2, when he swich Q2 urns ON, he diode D6 become reverse-biased, and he complee inducor curren sars flowing hrough he diode D5 and ransformer secondary NS1. During his TON period, when he swich Q2 is urned ON, he inpu volage VIN is applied o he ransformer primary NP2 in he reverse direcion, which makes he do end negaive wih respec o he non-do end. As he inpu volage applies across he ransformer primary NP2, he value of he magneic flux densiy in he core is changed from is iniial value of B2 o B1, as shown in Figure 13. Assuming he number of primary urns NP1 is equal o NP2, and he number of secondary winding urns NS1 is equal o NS2, he TON period of boh swiches should be he same o avoid magneic sauraion in he ransformer core. Afer he TON period, Q2 urns OFF and remains off for he res of he period TS, as shown in Figure 12. FIGURE 13: BH CURVE FOR PUSH-PULL TRANSFORMERVOLTAGE VOLTAGE RATING OF SWITCH During he TON period of any swich, he volage VIN is applied o half of he ransformer primary and induces equal volage o he oher half of he ransformer primary winding. This resuls in wice he inpu volage applied o he off swich. Therefore, he swiches used for he push-pull converer mus be raed a leas wice he maximum inpu volage. For pracical purposes, he volage raing of he swich should be 20% more han he heoreical calculaion due o leakage spike and ransiens. For he universal inpu volage, he raing of he swich used should be: 264 1.414 2 1.2 = 895, which means a 900 vol swich is required. VOUT/VIN RELATIONSHIP In he seady sae and Coninuous Conducion mode of operaion, he relaion beween he inpu and oupu volage is given by Equaion 14, where D is he duy cycle of he swich. EQUATION 14: B SAT B 2 B B SAT B 1 ΔB PUSH-PULL CONVERTER VOUT/VIN RELATIONSHIP H N S V OUT = ------ 2 D N P T ON T S D = --------- 2007 Microchip Technology Inc. DS01114A -page 17

REDUCING MAGNETIC IMBALANCE If he flux creaed by boh primary windings is no equal, a DC flux is added a every swiching cycle and will quickly saircase o sauraion. This magneic imbalance can be caused by an unequal TON period for boh swiches, an unequal number of urns of he primary NP1 and NP2 and he secondary NS1 and NS2, and an unequal forward volage drop of he oupu diodes D5 and D6. This imbalance can be reduced by careful selecion of he gae pulse drive circuiry, using a swiching device ha has a posiive emperaure co-efficien (PTC) for he ON sae resisance, adding air gap o he ransformer core, and using peak curren mode conrol echniques o decide he TON period of he swiches Q1 and Q2. Figure 14 explains how o deermine he saus of magneics imbalance in he core during he seady sae of operaion by looking a curren waveforms of he wo swiches Q1 and Q2. If he curren wave shape of boh swiches is symmerical and equal in magniude, as shown in Figure 14 (A), he flux excursion in he core is well balanced and he ransformer is operaing in a safe region. However, if he curren wave shape of boh swiches is no symmerical and he peak magniude curren is no equal, as shown in Figure 14 (B), here is an imbalance in he flux excursion inside he core; however, i is sill operaing a he safe operaing region of he BH loop. If he curren wave shape of one of he swiches has upward concaviy, as shown in Figure 14 (C), his means here is a large inequaliy in he flux excursion inside he magneic core, and magneic BH loop is close o sauraion. A small increase in he magneic field inensiy H will cause a decrease in magneizing inducance, whereas a significan increase in magneizing curren can desroy he swich and he ransformer. FLUX DOUBLING AND VOLT-SECOND CLAMPING When such a sysem is firs swiched ON or during he load ransien, he flux densiy will sar from zero raher han B1 or B2, and consequenly, he available flux excursion a his insan will be half ha normally available under he seady sae condiion. This is called flux doubling. The drive and conrol circuiry mus recognize his condiion and proec he applicaion from wide drive pulses unil he normal working condiion of he core is resored. This is known as vol-second clamping. COPPER UTILIZATION A push-pull ransformer requires a cener apped primary, and each winding is acive only for alernae power pulses, which means only 50% uilizaion of primary copper. The unused copper occupies space in he bobbin and increases he primary leakage inducance. A cener-apped primary would normally be bifilar wound, bu his will cause a large AC volage beween he adjacen urns. APPLICATION CONSIDERATIONS The high volage (2 VIN) sress on he swich, and 50% uilizaion of he ransformer primary makes using he push-pull opology undesirable when he inpu volage is European, Asian, he universal range (90 VAC-230 VAC), or when PFC is used as he fron end recifier. The reason for his is incomplee uilizaion of magneic core, which is due o only one swich conducing during each swiching cycle and full inpu volage is applied across he ransformer primary. The push-pull opology is mos favorable for low-volage applicaions such as US regulaion 110 VAC inpu direc off-line SMPS, or low inpu volage DC-DC isolaed converer for he power raing of up o 500 was. FIGURE 14: (A) PUSH-PULL CONVERTER SWITCH CURRENT IQ 1 IQ2 IQ 1 IQ 2 Q 1ON Q 2ON Q 1ON Q 2ON (B) (C) Sauraion (A) = Equal vol second is applied across he primary (B) = Unequal vol second applied across he primary bu sill in safe region (C) = Highly unbalance vol second applied across he secondary and core is near o sauraion DS01114A -page 18 2007 Microchip Technology Inc.

AVOIDING SHOOT-THROUGH In a push-pull converer, boh swiches canno urn ON a he same ime. Turning boh swiches on a he same ime will generae an equal and opposie flux in he ransformer core, which resuls in no ransformer acion and he windings will behave as if hey have a shor. This condiion offers a very low impedance beween he inpu source VIN and ground, and here will be a very large shoo-hrough curren hrough he swich, which could desroy i. To avoid shoo-hrough, an inducor is placed beween he ransformer primary and he inpu supply, as shown in Figure 15. The resuled converer is known as a curren-source push-pull converer. When boh swiches are on, he volage across he primary becomes zero and he inpu curren builds up and energy is sored in he inducor. When only one of he wo swiches is ON, he inpu volage and sored energy in he inducor supplies energy o he oupu sage. The relaion beween he oupu and inpu in Coninuous Conducion mode is given by Equaion 15. EQUATION 15: FIGURE 15: + - Q 2 V ------------- OUT D Half-Bridge Converer CURRENT SOURCE PUSH-PULL CONVERTER VOUT/VIN RELATIONSHIP N S ------ 1 = ------------------------ 2 ( 1 D) N P CURRENT FED PUSH-PULL CONVERTER Q 1 N P2 N P1 N S2 N S1 V OUT The half-bridge converer is a ransformer-isolaed converer based on he basic forward opology. The basic schemaic and swiching waveforms are shown in Figure 16. D D 6 D 5 I OUT N P1 = N P2 = N P N S1 = N S2 = N S The swiches Q1 and Q2 form one leg of he bridge, wih he remaining half being formed by he capaciors C3 and C4. Therefore, i is called a half-bridge converer. The swiches Q1 and Q2 creae pulsaing AC volage a he ransformer primary. The ransformer is used o sep down he pulsaing primary volage, and o provide isolaion beween he inpu volage source VIN and he oupu volage. In he seady sae of operaion, capaciors C3 and C4 are charged o equal volage, which resuls in he juncion of C3 and C4 being charged o half he poenial of he inpu volage. When he swich Q1 is ON for he period of TON, he do end of he primary connecs o posiive VIN, and he volage across he capacior C4 (VC4) is applied o he ransformer primary. This condiion resuls in half of he inpu volage being VIN, which is applied o he primary when he swich Q1 is ON, as shown in Figure 16 (C). The diode D4 becomes reverse-biased, and he diode D3 becomes forward-biased, which carry he full inducor curren hrough he secondary winding NS1. The difference of he primary volage refleced on he secondary NS1 and oupu volage VOUT is applied o he oupu inducor L in he forward direcion. Therefore, he inducor curren IL rises linearly from is presen value of IL1 o IL2, as shown in Figure 16 (E). During his TON period, he refleced secondary curren, plus he primary magneizing curren flows hrough he swich Q1. As he volage is applied o he primary in he forward direcion during his TON period, and when he swich Q1 is ON, he flux densiy in he core changes from is iniial value of B1 o B2, as shown in Figure 13. A he end of he TON period, he swich Q1 urns OFF, and remains off for he res of he swiching period TS. The swich Q2 will be urned ON afer half of he swiching period TS/2, as shown in Figure 16 (B); herefore, during he TOFF period, boh swiches are off. When swich Q1 is urned off, he body diode of he swich Q2 provides he pah for he leakage energy sored in he ransformer primary, and he oupu recifier diode D4 becomes forward-biased. As he diode D4 become forward-biased, i carries half of he inducor curren hrough he ransformer secondary NS2 and half of he inducor curren is carried by he diode D3 hrough he ransformer secondary NS1, as shown in Figure 16 (E). Therefore, he equal and opposie volage is applied a he ransformer secondary, assuming boh secondary windings NS1 and NS2 have an equal number of urns. As a resul, he ne volage applied across he secondary during he TOFF period is zero, which keeps he flux densiy in he ransformer core consan o is value of B2. The oupu volage VOUT is applied o he inducor L in he reverse direcion when boh swiches are OFF. Therefore, he inducor curren IL decreases linearly from is iniial value of IL2 o IL1, as shown in Figure 16 (E). The body diodes of swiches Q1 and Q2 provide he pah for he ransformer leakage energy. 2007 Microchip Technology Inc. DS01114A -page 19

Afer he ime period TS/2 when he swich Q2 urns ON, he do end of he primary connecs o he negaive of VIN, and he volage across he capacior C3 (VC3) is applied o he ransformer primary. Therefore, half of he inpu volage VIN is applied o he primary when he swich Q2 is ON in he reverse direcion, as shown in Figure 16 (C). The value of he magneic flux densiy in he core is changed from is iniial value of B2 o B1, as shown in Figure 13. Assuming he number of secondary winding urns of NS1 is equal o NS2, and o avoid magneic sauraion in he ransformer core, he TON period of boh swiches should be he same. Afer he TON period, Q2 urns OFF and remains off for he res of he period TS, as shown in Figure 16 (B). Please noe ha when eiher of he swiches urn ON for he TON period, i affecs he enire inpu volage VIN of he oher swich. FIGURE 16: HALF-BRIDGE CONVERTER + IQ 1 (A) V C4 C 4 C B Q 1 IQ 2 + N P V P - D 3 N S1 N S2 I L + L - IOUT V OUT V C3 C 3 Q 2 D 4 - T S Q 1PWM T ON T OFF (B) Q 2PWM (C) V P /2 (D) I SW IQ 1 IQ 2 IQ 1 IQ 2 I L2 (E) I L I L1 I D4 (A) = Half-Bridge Converer (B) = Gae pulse waveform of Q 1 (C) = Volage across ransformer primary (D) = Curren hrough he swich Q 1 and Q 2 (E) = Oupu inducor and diode D 4 curren DS01114A -page 20 2007 Microchip Technology Inc.

EQUIVALENT TRANSFORMER The equivalen ransformer model is shown in Figure 17. During he TOFF period, when boh swiches are OFF, ideally, he secondary currens flowing hrough he diode D3 and he diode D4 should be equal. However, in he pracical sense, because of he presence of he non-zero magneizing curren IM, ID3 and ID4 are no equal. This magneizing curren IM(), as shown in Figure 17, may flow hrough he ransformer primary, hrough one of he secondaries, or i may divide beween all hree of he windings. FIGURE 17: I 1 () + V P - I M () I 1 () TRANSFORMER EQUIVALENT MODEL The division of he magneizing curren depends on he I-V characerisics of he swiches, he diode and he leakage of he ransformer windings. Assuming negligible leakage in he ransformer and ha boh diodes have similar I-V characerisics, he curren flowing hrough he diode D3 and D4 is given by Equaion 16. EQUATION 16: N P N S2 N S1 N S = N S1 = N S2 Transformer Equivalen Model I 1 = 0 = I D3 for I M ()<< i() D 3 i d3 I D4 D 4 OUTPUT DIODES AND MAGNETIZING CURRENT RELATIONSHIP 0.5 i () ( 0.5 n) I M () I D4 = 0.5 i () ( 0.5 n) I M () I D3 = I D4 = 0.5 i () DC BLOCKING CAPACITOR A small DC blocking capacior is placed in series wih he ransformer primary, o block he DC flux in he ransformer core. The value of he DC blocking capacior is given by Equaion 17. EQUATION 17: DC BLOCKING CAPACITOR I C PRIM T ONMAX B = --------------------------------------- ΔV where: T ONMAX = maximum ON ime of eiher MOSFET I PRIM = maximum primary curren ΔV = permissible droop in primary volage because of he DC blocking capacior PREVENTING SHOOT-THROUGH A half-bridge converer is also prone o magneic imbalance of he ransformer core when he flux creaed by he swiches Q1 and Q2 during he TON period is no equal. To preven saircase sauraion, he peak curren mode conrol echnique is used o decide he TON period of he swiches Q1 and Q2. The maximum duy cycle of 45% wih a dead-ime beween he wo swiches is used o preven shoo-hrough curren from he ransformer primary. APPLICATION CONSIDERATIONS The complee uilizaion of he magneic and maximum volage sress on eiher of he swiches is equal o he inpu volage VIN. However, only half of he inpu volage is applied across he primary when eiher of he swiches is ON for he TON period. Therefore, double he primary swich curren is required o have he same oupu power as he push-pull converer. This makes he half-bridge opology bes suied for applicaions up o 500 was. This is especially suied for European and Asian regions where he AC is 230 VAC line volage. The power raing of he half-bridge converer can be increased up o 650-750 was if fron-end PFC is used. The peak primary curren and he maximum ransien OFF sae volage sress of he swich deermine he pracical maximum available oupu power in he half-bridge converer opology. 2007 Microchip Technology Inc. DS01114A -page 21

Half-Bridge Resonan Converer Magneics and hea sink occupy more han 80% of he oal sysem volume. High swiching frequency and high efficiency are he wo mehods used o improve power densiy and he profile of a SMPS. However, hese wo mehods do no come ogeher easily. High swiching frequency (more han 100 khz) could reduce he volume of he passive componens, bu efficiency ofen suffers as a resul. High EMI noises caused by parasiic componens preven fas swiching. Efficiency is reduced due o high swiching losses, and diode reverse recovery causes volage overshoo and ringing across he device. IMPROVEMENT TECHNIQUES To develop SMPS wih high efficiency and high swiching frequencies, and o achieve high power densiy and low profile, he following echniques need o be improved. The size of he magneic componens is limied by magneic losses. Wih he use of beer magneic, he size of he magneic could be grealy reduced. Wih beer semiconducor swiching devices like CoolMOS, Schoky diode losses in he semiconducor can be reduced. This lessens he hermal managemen requiremen as well as reducing he size and quaniy of he hea sink. Advanced packaging of acive and passive componens, such as inegraion of a capacior ino he magneic, inegraion of oupu inducor in he isolaion ransformer, and he use of he leakage inducance of he ransformer when an inducor is required in series wih ransformer winding, conribue o improving efficiency. In addiion, he use of advanced power opologies, which reduce swiching losses a higher frequencies. RESONANT TOPOLOGIES The resonan echnique is used o reduce he swiching losses in he semiconducor devices. There are many resonan opologies available, such as: Series resonan converer Parallel resonan converer LLC resonan converer The firs wo opologies canno be opimized for he wide inpu volage range and wide oupu load variaion. The LLC resonan converer is capable of reducing swiching losses a wide inpu volage range, and minimizes he circulaing energy a high inpu volage. Turn off losses can be minimized by reducing he urn-off curren hrough he swich and zero volage swiching (ZVS), hereby eliminaing urn-on losses. Therefore, he LLC resonan converer provides negligible swiching losses a high swiching frequency even a high inpu volage variaion range. Series Resonan Converer (SRC) In a series resonan converer (SRC), resonan ank elemens (he inducor LR and he capacior CR), are conneced in series wih he ransformer primary, as shown in Figure 18. FIGURE 18: + - SERIES RESONANT CONVERTER The resonan ank is used o shape he primary curren as sinusoidal, and o reduce he curren value flowing hrough he swich a is ransiion period, hereby reducing he swiching losses. In a power MOSFET, zero volage swiching is preferred as compared o zero curren swiching. Therefore, he operaing swiching frequency, more han he resonan ank frequency, is preferred for his ype of converer o achieve ZVS, as shown in Figure 19. The operaing frequency increases o a very high value a ligh load (Q = 0) o keep he oupu volage regulaed. FIGURE 19: Q = 2 Q = 1 Q = 3 C R Q = 4 L R DC CHARACTERISTICS I OUT A low inpu volage, he converer is operaing close o resonan frequency. As he inpu volage increases, he converer should operae a a higher swiching frequency away from he resonan frequency, hereby increasing more and more circulaion energy in he resonan ank, as shown in Figure 20. N S N S = 300V.2.4.6.8 1.0 1.2 1.4 1.6 1.8 V OUT = 400V DS01114A -page 22 2007 Microchip Technology Inc.

FIGURE 20: I R CURRENT AND VOLTAGE WAVEFORM Circulaing Energy = 300V, full Load Compared o SRC, he operaing region is much smaller a a ligh load (Q = ), as shown in Figure 22. FIGURE 22: DC CHARACTERISTICS Circulaing Energy = 400V, full Load = 300V = 400V From his analysis, i can be shown ha a series resonan converer is no a good choice for a fron end DC-DC converer. The major problems are: ligh load regulaion, high circulaing energy and urn-off curren a high inpu volage..2.4.6.8 1.0 1.2 1.4 1.6 1.8 FIGURE 23: CURRENT AND VOLTAGE WAVE FORM Parallel Resonan Converer (PRC) In a parallel resonan converer (PRC), a resonan ank elemen, he capacior CR, is conneced in parallel wih he ransformer primary, as shown in Figure 21. Similar o he SRC, he operaion swiching frequency is also designed o be more han he resonan ank frequency. FIGURE 21: PARALLEL RESONANT CONVERTER I R Circulaing Energy Circulaing Energy = 300V, full Load = 400V, full Load + - L R C R N S N S I OUT V OUT In a parallel resonan converer, since he load is in parallel wih he resonan capacior, even a no load, he resonan ank offers very small impedance o he inpu, which induces a very high circulaion energy. Given he above analysis, we can deermine ha a parallel resonan converer is no a good choice for a fron end DC-DC converer. The major problems are: high circulaing energy and high urn-off curren a high inpu volage condiions. 2007 Microchip Technology Inc. DS01114A -page 23

LLC Resonan Converer In an LLC resonan converer, resonan ank elemens (he inducor LR and he capacior CR), are conneced in series wih he ransformer primary, and he resonan inducor LM is conneced in parallel wih he ransformer primary, as shown in Figure 24. The LLC resonan converer uses ransformer magneizing inducance for generaing one more resonan frequency, which is much lower han he main resonan frequency comprising resonan ank LR and CR. The LLC resonan converer is designed o operae a a swiching frequency higher han he resonan frequency of he resonan ank LR and CR. The benefi of he LLC resonan converer is narrow swiching frequency range wih ligh load and ZVS capabiliy even a no load. In addiion, is special DC gain characerisic, as shown in Figure 25, makes he LLC resonan converer an excellen choice for he fron end DC-DC applicaion. The wo resonan frequencies are given by Equaion 18. The firs resonan frequency is deermined by LR and CR and he oher resonan frequency is deermined by LR, CR and LM. FIGURE 24: + - Q 1 Q 2 C R HALF-BRIDGE LLC RESONANT CONVERTER L R L M N S N S Transformer D 1 D 2 EQUATION 18: LLC RESONANT FREQUENCIES F 1 R1 = ---------------------------------------------- ( 2 π ( L R C R )) F 1 R2 = ----------------------------------------------------------------- ( 2 π (( L M + L R ) C R )) - I OUT Vou FIGURE 25: DC CHARACTERISTIC OF LLC RESONANT CONVERTER 1.8 ZVS REGION 1.6 1.4 1.2 ZCS REGION 1.0.8.6.4.2.2.6.8 1 DS01114A -page 24 2007 Microchip Technology Inc.

LLC Resonan Converer Operaion LLC resonan converer operaion can be divided ino wo ime inervals. In he firs inerval, he inducor LR, resonan wih he capacior CR and inducor LM, is clamped wih he oupu volage. Resonance of LR and CR is sopped when he LR resonan curren is equal o he LM curren, afer which LM will conribue o he resonance and he second inerval begins. During his inerval, he resonan componens will change o CR and LM in series wih LR (see he fla region in Figure 26 (B)). Therefore, he LLC resonan converer is a muli-resonan converer since he resonan frequency a paricular ime inervals is differen. The deailed operaion of he LLC resonan converer, as shown in Figure 26, can be broken down ino hree modes. A he iniial condiion, = 0, he descripion of he LLC resonan converer operaion begins a he conclusion of one power ransfer cycle. This occurs afer he resonan ank delivering power o he load wih swich Q2 is conducing. The resonan curren (when Q2 is conducing) flowing hrough he inducor is negaive, as indicaed in Figure 26 (B). Mode 1: 0 < < 1 (Q2 urned OFF a = 0) In his mode, he energy sored in he resonan inducor discharges he oupu capacior of he swich Q1 o zero poenial. The body diode of he swich provides he pah for he resonan inducor curren LR, which creaes a ZVS condiion for Swich Q1. The gae signal of Q1 should be applied afer he body diode of Q1 sars conducing. Mode 2: 1 < < 2 This mode begins when inducor curren becomes posiive, as shown in Figure 26 (B). Since he swich Q1 is urned ON during Mode 1, curren will flow hrough swich Q1. The oupu recifier diode D1 becomes forward-biased, and he ransformer volage clamps a oupu volage VOUT. The refleced secondary volage on he primary clamps LM o consan volage, so i canno paricipae in he resonance during his period. This mode comes o an end when LR curren is equal o LM curren, and he oupu curren reaches zero, as shown in Figure 26 (C). Mode 3: 2 < < 3 In his mode, when he inducor curren LR and LM are equal and he oupu curren reaches zero, boh oupu recifiers become reverse-biased. During his period, LM is freed o conribue o resonance, and form a resonan ank, CR and LR in series wih LM. This mode ends when he swich Q1 urns OFF. As seen in Figure 26 (B), he swich Q1 urns OFF a a very low value of curren compared wih peak curren. ZVS depends on he magneizing curren and no he load curren. This magneizing curren is also he urn-off curren of he swich, which can be conrolled o achieve almos zero urn-off losses. For he nex half cycle, he operaion is he same as previously described. FIGURE 26: LLC RESONANT CONVERTER d = Dead ime (A) T ON T OFF T S (B) (C) 0 1 2 3 (A) = Gae pulse for LLC resonan converer (B) = Resonan magneizing curren (C) = Oupu curren 2007 Microchip Technology Inc. DS01114A -page 25

Full-Bridge Converer A full-bridge converer is a ransformer-isolaed buck converer. The basic schemaics and swiching waveforms are shown in Figure 27. Since he shape of he converer looks like an H, a full-bridge converer is also known as an H-bridge converer. BASIC OPERATION The ransformer primary is conneced beween he wo legs formed by he swiches Q1 Q4 and Q3 Q2. The swiches Q1 Q2 and Q3 Q4 creae a pulsaing AC volage a he ransformer primary. The ransformer is used o sep down he pulsaing primary volage, as well as o provide isolaion beween he inpu volage source and he oupu volage VOUT. As in half-bridge opology, he volage sress on he swich is VIN. However, volage applied on he primary when eiher of he swiches is ON is half of he inpu volage, hereby doubling he swich curren. In a push-pull opology, volage applied on he ransformer primary when eiher of he swiches is ON, is full inpu volage; however, he FIGURE 27: FULL-BRIDGE/H-BRIDGE PHASE SHIFT ZVT CONVERTER volage sress of he swich is wice he inpu volage. This condiion renders boh opologies unfeasible for high power (>500 wa) applicaions. A full-bridge converer configuraion reains he volage properies of he half-bridge opology, and he curren properies of push-pull opology. The diagonal swich pairs, Q1 Q2 and Q3 Q4, are swiched alernaely a he seleced swiching period. In he seady sae of operaion when he diagonal swich pair, Q1 Q2, is ON for a period of TON, he do end of he winding becomes posiive wih respec o he non-do end. The diode D4 become reverse-biased and diode D3 becomes forward-biased. The diode D3 carries he full load curren hrough he secondary winding NS1. As he inpu volage is applied across he ransformer primary, he swich carries he refleced load curren, plus he ransformer primary magneizing curren. The flux densiy in he core changes from is iniial value of B1 o B2, as shown in Figure 13. The difference of he primary refleced volage o he secondary and he oupu volage is applied across he inducor L in he forward direcion. + Q 1 C OSS1 Q 3 C OSS3 D 3 + L - V OUT (A) L LKG V L C O - C OSS4 Q 2 COSS2 D 4 Q 4 T S Q 1PWM Q 2PWM (B) Q 3PWM Q 4PWM T ON T OFF (C) (D) (A) = Full-Bridge/H-Bridge Phase Shif ZVT converer (B) = PWM gae pulse waveform for full-bridge swiches (C) = Volage across he ransformer primary (D) = Oupu inducor and recifier diode curren DS01114A -page 26 2007 Microchip Technology Inc.

A he end of he ON period, when he swich pair Q1 Q2 is urned OFF, and when i remains OFF for he res of he swiching period TS, he swich pair Q3 Q4 will be urned ON afer half of he swiching period TS/2, as shown in Figure 27(B and C). Therefore, during he TOFF period, all four swiches are OFF. When he swich pair Q1 Q2 is urned OFF, he body diode of he swich pair Q3 Q4 provides he pah for he leakage energy sored in he ransformer primary.the oupu recifier diode D4 becomes forward-biased, and i carries half of he inducor curren hrough he ransformer secondary NS2. Half of he inducor curren is carried by he diode D3 hrough he ransformer secondary NS1, as shown in Figure 27 (D). Therefore, he ne volage applied across he secondary during TOFF period is zero as previously discussed in half-bridge opology operaion. This keeps he flux densiy in he ransformer core consan o is final value of B2 (see Figure 15). The oupu volage VOUT is applied o he inducor L in he reverse direcion when boh swiches are OFF. Afer he ime period TS/2, when he diagonal swich Q3, Q4 is urned ON for a period of TON, he do end of he winding becomes negaive wih respec o he non-do end. The diode D3 becomes reverse-biased and he diode D4 becomes forward-biased. The diode D4 carries he full load curren hrough he secondary winding NS2. As he inpu volage is applied across he ransformer primary, he swich carries he refleced load curren plus he ransformer primary magneizing curren. As he inpu, volage is applied o he ransformer in he reverse direcion, he flux densiy in he core changes from is iniial value of B2 o B1, as shown in Figure 13. The difference of he primary refleced volage o he secondary and he oupu volage is applied across he inducor L in forward direcion. Assuming he number of secondary winding urns NS1 is equal o NS2, and o avoid magneic sauraion in he ransformer core, he TON period of boh swich pairs Q1 Q2 and Q3 Q4 should be equal. Afer he TON period of he swich pair Q3 Q4, i urns OFF and remains OFF for he res of he period TS, as shown in Figure 27 (B). Please noe ha when eiher of he diagonal swich pairs urns ON for a period of TON, i applies he enire inpu volage VIN o he oher swich. In Coninuous Conducion mode of operaion, he relaion beween he inpu volage and he oupu volage is given by Equaion 19. EQUATION 19: FULL-BRIDGE CONVERTER VOUT/VIN RELATIONSHIP N S V OUT = 2 ------ D N P APPLICATION CONSIDERATIONS Since he maximum volage sress across any swich is VIN, and wih he complee uilizaion of magneic core and copper, his combinaion makes he full-bridge converer an ideal choice for high inpu volage, high power range SMPS (<1000 was) applicaions. Full-Bridge Converer In he full-bridge converer, four swiches have been used, hereby increasing he amoun of swiching device loss. For applicaions requiring oupu power of more han 1000 was, he loss in he swiching device becomes impracical o handle in a full-bridge converer. The conducion loss of a MOSFET can be reduced by using a good MOSFET, and swiching losses can be reduced by using eiher a ZVS (zero volage swiching during urn ON ransiion), a ZCS (zero curren swiching during urn OFF ransiion), or boh echniques. Shaping he inpu curren sinusoidal o achieve ZCS, increases he peak and he RMS curren hrough he MOSFET in he high power applicaion, hereby increasing he conducion losses. A high inpu volage, he ZVS echnique is preferred for he MOSFET. Full-Bridge/H-Bridge Phase-Shif ZVT Topology A full-bridge converer using he phase shif ZVT echnique is known as an H-Bridge Phase-Shif ZVT opology. In his opology, he parasiic oupu capacior of he MOSFETs and he leakage inducance of he swiching ransformer are used as a resonan ank circui o achieve zero volage across he MOSFET a he urn-on ransiion. There are wo major differences in he operaion of a phase-shif ZVT and simple full-bridge opology. In a phase-shif ZVT converer, he gae drive of boh of he diagonal swiches is phase shifed. In addiion, boh halves of he bridge swich nework are driven hrough he complemenary gae pulse wih a fixed 50% duy cycle. The phase difference beween he wo half-bridge swiching nework gae drives conrol he power flow from primary o secondary, which resuls in he effecive duy cycle. Power is ransferred o he secondary only when he diagonal swiches are ON. If eiher he op or boom swiches of boh legs are ON simulaneously, zero volage is applied across he primary. Therefore, no power is ransferred o he secondary during his period. When he appropriae diagonal swich is urned OFF, primary curren flows hrough he oupu capacior of he respecive MOSFETs causing swich drain volage o move oward o he opposie inpu volage rail. This causes zero volage across he MOSFET o be urned ON nex, hus creaing zero volage swiching when i urns ON. This is possible when enough circulaing curren is provided by he inducive sorage energy o charge and discharge he oupu capacior of 2007 Microchip Technology Inc. DS01114A -page 27

he respecive MOSFETs. Figure 28 shows he gae pulse required, and he volage and curren waveform across he swich and ransformer. FIGURE 28: REQUIRED GATE PULSES AND VOLTAGE AND CURRENT ACROSS PRIMARY Q 1PWM Q 4PWM (A) Q 2PWM Q 3PWM (B) VPRIMARY I PK (C) I P 0 1 2 3 4 (A) = Gae pulse for all swiches for phase-shif ZVT converer (B) = Volage across primary (C) = Curren across primary DS01114A -page 28 2007 Microchip Technology Inc.

TIME INTERVALS The operaion of he phase-shif ZVT can be divided ino differen ime inervals. Assuming ha he ransformer was delivering he power o he load, he curren flowing hrough primary is IPK, and he diagonal swich Q1, Q2 was ON, a = 0, he swich Q2 is urned OFF. Inerval1: 0 < < 1 The swich Q2 is urned OFF, beginning he resonan ransiion of he righ leg. Primary curren is mainained consan by he resonan inducor LLK. This primary curren charges he oupu capacior of swich Q2 (COSS2) o he inpu volage VIN, which resuls in he oupu capaciance of Q3 (COSS3) being discharged o zero poenial. This creaes zero poenial across he swich Q3 prior o urn-on, resuling in zero volage swiching. During his ransiion period, he ransformer primary volage decreases from VIN o zero, and he primary no longer supplies power o he oupu. Inducive energy sored in he oupu inducor and zero volage across he primary cause boh oupu recifiers o share he load curren equally. Inerval2: 1 < < 2 Afer charging COSS2 o VIN, he primary curren sars flowing hrough he body diode of Q3. Now Q3 can be urned on any ime afer 1 and have a zero volage urn-on ransiion. Inerval3: 2 < < 3 A = 2, Q1 was urned OFF and he primary was mainained by he resonan inducor LLK. In addiion, a = 2, IP is slighly less han he primary peak curren IPK because of finie losses. The primary resonan curren charges he oupu capacior of swich Q1 (COSS1) o inpu volage VIN, which discharges he oupu capacior of Q4 (COSS4) o zero poenial, hus enabling zero volage urn-on swiching for Q4. During his ransiion, he primary curren decays o zero. ZVS of he lef leg swiches depends on he energy sored in he resonan inducor, conducion losses in he primary swiches, and he losses in he ransformer winding. Since his lef leg ransiion depends on leakage energy sored in he ransformer, i may require an exernal series inducor if he sored leak energy is no enough for ZVS. Now, when Q4 is urned ON, volage VIN is applied across he primary in he reverse direcion. Inerval: 3 < < 4 The wo diagonal swiches Q3, Q4 are ON, applying full inpu volage across he primary. During his period, he magneizing curren, plus he refleced secondary curren ino he primary flows hrough he swich. The exac diagonal swich-on ime TON depends on he inpu volage, he ransformer urns raio, and he oupu volage. Afer he TON period of he diagonal swich, Q3 is urned OFF. One swiching cycle is compleed when he swich Q3 is urned OFF. The primary curren charges COSS3 o a poenial of inpu volage VIN and discharges COSS2 o zero poenial, hereby enabling ZVS for he swich Q2. The idenical analysis is required for he nex half cycle. ACHIEVING ZVT In he H-Bridge Phase Shif ZVT Converer shown in Figure 27 (A), he maximum ransiion ime occurs for he lef leg a minimum load curren and maximum inpu volage, and minimum ransiion ime occurs for he righ leg a maximum load curren and minimum inpu volage. Therefore, o achieve ZVT for all swiches, enough inducive energy mus be sored o charge and discharge he oupu capaciance of he MOSFET in he specified allocaed ime. Energy sored in he inducor mus be greaer han he capaciive energy required for he ransiion as given by Equaion 20. The MOSFET oupu capaciance varies as applied drain-o-source volage varies. Thus, he oupu capaciance of he MOSFET should be muliplied by a facor of 4/3 o calculae he equivalen oupu capaciance. EQUATION 20: RESONANT ELEMENTS LR AND CR RELATIONSHIP 2 2 0.5 L R I PRIMIN > C R MAX 2 2 L R I PRIMIN > MAX C R where: LR = equivalen leakage inducor CR = equivalen capacior required o charge and discharge = oupu capacior of wo swiches in parallel wih parasiic 2007 Microchip Technology Inc. DS01114A -page 29

METHOD OF CONTROL All swiching converer oupu volage is a funcion of he inpu volage, duy cycle and load curren, as well as converer circui componen values. The oupu volage should be consan regardless of variaion in inpu volage, load curren and converer circui parameer values. The inpu volage may vary from 90 VAC o 264 VAC, and inpu frequency from 47 Hz o 63 Hz for an off-line power supply, and -25% o +50% from he nominal value for he DC inpu supply. The load curren may vary from no load o full load. In addiion, he load may vary from no load o 50% load in sep, and vice versa. The converer circui componens will have some olerance. Despie variaion, i is desired ha he oupu volage be wihin a cerain limi. This is no pracical o achieve wihou negaive feedback, and seing he duy cycle o a single value. There are wo basic mehods o conrol he duy cycle o keep he oupu volage wihin he specified limi: volage mode conrol and curren mode conrol. Volage Mode Conrol In volage mode conrol, he oupu volage is measured and hen compared wih he reference value (desired oupu volage). The error is hen processed by he compensaion block o generae he nex duy cycle value, as shown in Figure 29. This mode has only one conrol loop, so i is easy o design and analyze. However, in his conrol mehod, any change in he line or he load mus be firs sensed as an oupu volage change and hen correced by he feedback loop. Therefore, he response is slow and he ransien response (sep load change) is no favorable. Adding inpu volage feed-forward o his conrol scheme will reduce he effec of inpu volage variaion in he oupu. FIGURE 29: VOLTAGE MODE CONTROL V OUT Load Drive Circui PWM Comparaor Block V REF x x - + Volage Feed Forward Block Compensaor Block Oupu Volage Reference DS01114A -page 30 2007 Microchip Technology Inc.

Curren Mode Conrol The curren mode conrol echnique requires wo feedback loops, as shown in Figure 30. In his mode, wo parameers are measured for conrol purposes. The oupu volage is measured a he oupu capacior or a he load end (known as remoe sensing). The oupu inducor/primary swich curren is also measured. In curren mode conrol, he oupu volage is firs compared wih he reference volage (desired oupu volage). This error is hen processed by he compensaion block o generae he reference signal for he curren loop. This curren reference is compared o he measured curren. Any error generaed by he comparison of he reference generaed by he volage compensaion block and he acual curren drawn from he inpu is processed by he curren compensaion block. This generaes he required duy cycle o mainain he oupu volage wihin he specified limi. As curren mode conrol senses he circui curren, any change in oupu load curren or he inpu volage can be correced before i affecs he oupu volage. Sensing he inpu curren, which depends on inpu volage, provides he inheren feed-forward feaure. Curren mode conrol provides inheren inpu curren symmery for he push-pull and bridge converers, inheren curren limiing feaures and load sharing feaures for muliple converers conneced in parallel. I also improves sep load response and ransien response because of he inner curren loop. FIGURE 30: CURRENT MODE CONTROL V OUT Load R S Curren sense amplifier wih isolaion R S Curren sense amplifier Drive Circui PWM Compensaor Block I ERR I REF - + Compensaor Block Oupu Volage reference TABLE 1: CONTROL METHODS AND CHARACTERISTICS Mode Converer Speed Descripion Volage Buck, Forward Slow Oupu shor proecion, no pulse by pulse proecion Curren Boos, Flyback, Push-Pull, Half- and Full-bridge Fas Oupu shor circui and OC proecion, pulse curren proecion 2007 Microchip Technology Inc. DS01114A -page 31

Power Diode A power diode requires a finie ime o change from he blocking sae o he conducion sae and vice versa. The ime required o change is sae, and how he diode curren and volage change during he ransiion period affecs he operaion of circuiry. The shape of he waveform (volage and curren) and ransiion ime depends on diode inrinsic properies. CHARACTERISTICS Figure 31 shows how he volage and curren varies in he power diode during he ransiion period. During he period 1, space charge is sored in he depleion region due o he growh of forward curren and removal of reverse volage. During period 2, because of diode forward curren, excess carriers disribued in he drif region sele oward a seady sae value. If a large ΔI/Δ is applied o he diode, volage overshoo is observed due o he presence of ohmic resisance in he drif region, he inducance of he silicon wafer and he bonding wires aached o i. A he urn-off ransiion, as shown in Figure 31, and during he period 3, he excess charge sored in he drif region is removed before he juncion becomes reverse-biased during period 4. This recombinaion process of he depleion layer acquires a subsanial amoun of charge from he reverse-biased volage. As long as here is excess charge in he drif region diode, i will be forward-biased. Afer he 4 juncion becomes reverse-biased, and afer he ime period 4, he diode curren no longer goes negaive and quickly falls and becomes zero afer 5. Reverse recovery curren reaches is maximum value a he end of 4. In almos all of he power circui configuraions, his reverse recovery curren of he diode will flow hrough he nex MOSFET o urn ON. So, while fixing he MOSFET curren raing, he reverse recovery curren of he diode mus be added. A Schoky diode is a majoriy carrier device and has no sored minoriy carrier; herefore, a Schoky diode urns ON and OFF faser han a PN juncion power diode. A Schoky diode also improves he swiching characerisics and he forward volage drop of he diode by placing a hin film of meal in direc conac wih a semiconducor. The forward volage drop of a Schoky diode is 0.3-0.4V, and has a larger reverse curren han he comparable silicon power diode. Because of is physics, he breakdown volage of he Schoky diode a presen canno be more han 150-200V. A urn-off here will be no reverse recovery curren because here is no sored charge. Ohmic resisance of he drif region is much less han ha of he PN juncion diode, resuling in considerably less volage overshoo during device urn ON. The diode oal loss in he circui is given by Equaion 21, which consiss of forward volage drop loss, reverse recovery loss, and reverse leakage curren loss. FIGURE 31: POWER DIODE SWITCHING CHARACTERISTICS 0 Q RR = I RR T RR /2 V FP V F V ON ~ ~ I F ΔI F /ΔT I F 3 I RR 4 5 T RR 0 V R V RR 1 2 DS01114A -page 32 2007 Microchip Technology Inc.

EQUATION 21: DIODE LOSS P LOSS = V F I FAVG + 0.5 5 V R I REC F+ I REVAVG V R where: P LOSS = Toal diode loss V F = Forward volage drop I FAVG = Average forward curren V R = Reverse blocking applied across he diode I REC = Peak reverse recovery curren MOSFET Appreciable curren carrying capabiliy, high reverse blocking volage, very low ON resisance and fas swiching capabiliies make a MOSFET an ideal choice as a swiching elemen in SMPS opologies. A MOSFET is a majoriy carrier and a volage driven device, whereas a Bipolar Juncion Transisor (BJT) is a minoriy carrier and a curren driven device. The ON sae resisance of a MOSFET has no heoreical limi, so he ON sae loss can be far lower han a BJT. The ON and OFF swiching ime of a MOSFET depends on he presence or absence of a key charge quaniy in he device, and is equal o he ime required o inser or remove his conrolling charge quaniy. The oal amoun of conrolling charge in he majoriy carrier device is much less han he charge required in he equivalen minoriy carrier device. This causes he majoriy charge carrier device o urn ON and OFF faser han a minoriy carrier device. A MOSFET has posiive emperaure coefficien for he ON sae resisance, which makes i easy o parallel many small devices o deliver higher curren. Figure 32 shows an equivalen circui diagram of a MOSFET wih a parasiic capacior and body diode. FIGURE 32: Gae (G) C GD MOSFET C GS Drain (D) Source (S) C DS The urn-on swiching waveforms of he drain-o-source volage and drain curren wih gae-o-source volage are shown in Figure 33. The rae of change of drain curren depends on he rae a which he gae-o-source capacior is charged by he gae drive circui. The ime required o charge he gae capacior o VGTH (gae hreshold volage) is known as urn-on delay (d). This assumes he gae drive volage rises from zero o VG a = 0, and i is driving he MOSFET gae hrough gae resisance RG. Afer CGS is charged o VGTH, he drain curren begins rising from zero o he raed value. During his period, he gae curren charges boh capaciors, CGS and CGD. The drain-o-source volage remains a VDS so long as he drain curren (ID) reaches he raed value (ID). The ime required for drain curren o reach is raed value ID, as shown in Figure 33, is known as he curren rise ime TRI. When drain curren reaches ID, VGS is clamped o VGSID, as shown in Figure 33, and he enire gae curren sars flowing hrough CGD o charge i. This causes he drain-o-source volage VDS o drop. The rae of change of VDS is given by Equaion 22. EQUATION 22: RATE OF CHANGE OF VDS ( V I G V GSID ) GATE = -------------------------------- ΔV ------------ DS Δ VDS decreases VD o VDSON in wo inervals. The firs inerval is known as he acive region and he second inerval is known as he ransien ohmic region. Once he MOSFET eners he ohmic region, he gae-o-source volage sars o rise oward VG, while simulaneously, he gae curren decays o zero. In a pracical sysem, he freewheeling diode has some reverse recovery curren IRR. A his momen, during he drain curren rising period, he drain curren rises o he value ID + IRR, and hen VDS sars o decay o VDSON. Afer he decay of he reverse recovery curren o zero, ID clamps o LD. The sequence is reversed when he MOSFET is urned OFF. The gae-o-source volage firs decays o VGSID, and hen he drain-o-source volage sars rising oward VDS, as shown in Figure 34. When he drain-o-source volage reaches is raed value, VDS, he drain curren begins o decay oward zero, and he gae-o-source volage and gae curren decays o zero, as shown in Figure 34. The ime required for he gae source volage o reach VGSID is known as urn-off delay. R G I G = ---------- C GD 2007 Microchip Technology Inc. DS01114A -page 33

MOSFET LOSSES There are hree ypes of losses in a MOSFET: conducion loss, swiching loss and gae charge loss. A low frequencies, conducion loss is dominan, bu as we begin swiching a frequencies beween 100-150 khz, swiching and gae charge losses sar conribuing a significan amoun of power dissipaion. The oal losses in a MOSFET in power elecronic circuiry is given by Equaion 23. Conducion Loss Conducion loss depends on he ON sae resisance of MOSFET (RDSON), which can be reduced by selecing a low RDSON MOSFET. Swiching Loss The swiching losses of he MOSFET are given by he area under he waveforms of VDS and ID, shown shaded in Figure 33 and Figure 34, and he charge sored in he parasiic oupu capacior CDS during he urn OFF period of he MOSFET. The swiching losses of he MOSFET can be reduced by selecing a MOSFET wih lower CDS capaciance and shifing he curren ID and he volage VDS waveform o reduce he overlap period during ransiion. APPLICATION CONSIDERATIONS A lower RDSON device comes wih high gae capaciance and he driver has o charge bigger gae capaciance, which means a longer urn-on and urn-off ime, resuling in more swiching losses. The general rule of faser swiching ime o reduce he swiching loss will cause high frequency noise because of high ΔV/Δ and high ΔI/Δ, which may cause an increase of he EMI filer size. The safe operaing area (SOA) of a MOSFET is decided by maximum drain curren IDMAX, Inernal juncion emperaure TJ, and he breakdown volage BVDS raing. There is no second breakdown volage in a MOSFET as in he case of IGBT, and he SOA of he MOSFET remains he same in he reverse direcion. In addiion, a MOSFET can conduc in eiher direcion while keeping he same RDSON. While selecing a MOSFET driver, care mus be aken o ensure ha he driver can source and sink he maximum peak curren required by a MOSFET gae o urn ON and OFF in a given specified ime. A MOSFET gae needs large curren as he device urns ON, and for he res of he period, a high gae-o-source volage a low curren level. Gae Charge Loss Gae charge loss is caused by charging he gae capaciance and hen dumping he charge o ground in every swiching cycle. EQUATION 23: MOSFET LOSS 2 2 P SW = I DRMS RDSON + 0.5 V DS I D ( T RISE + T FALL ) f SW + 0.5 V DS CDS f SW + Q GTOTAL V G f SW where: I DRMS = Drain RMS curren T RISE = Rise ime T FALL = Fall ime f SW = Swiching frequency Q GTOTAL = Toal gae charge C DS = MOSFET oupu capacior V DS = Drain-o-source volage I D = Drain curren V G = Gae volage R DSON = ON sae resisance of he MOSFET DS01114A -page 34 2007 Microchip Technology Inc.

FIGURE 33: MOSFET TURN ON CHARACTERISTICS V G τ 1 = R G (C GD + C GS ) V GS (I D ) V GS () V GS (h) 0 I G () V D I D V DS (on) 0 d(on) T RI FIGURE 34: MOSFET TURN OFF CHARACTERISTICS V G V GS () I G () V DS V DS () I D () I D T FI 2007 Microchip Technology Inc. DS01114A -page 35

Snubbers There are wo basic ways o solve he problem of a semiconducor device ha is sressed beyond is raing. Eiher he device can be replaced wih a higher raed device o mee he sress level, or a snubber circui can be added o reduce he sress o a safe level. Boh opions are rade-offs beween cos, availabiliy of he higher raed device, complexiy, componen coun and he cos of using a snubber circui. A snubber circui is ypically used o limi he rae of rise of volage (ΔV/Δ), he volage applied across he device during urn-off, he rae of rise of curren (ΔI/Δ) and he curren hrough he device during urn-on. Figure 35 shows some of he popular snubber circuiry used across he ransformer primary in a single swich power converer applicaion o limi he ΔV/Δ and blocking volage applied across he MOSFET during urn-off. The simple design of he RCD snubber, as shown in Figure 35 (A), is o firs choose he capacior CS large enough so ha i conains negligible swiching ringing, and hen choose RS so ha he power dissipaed in RS a VS (volage across he capacior CS) is equal o he swiching loss caused by he leakage inducance as given in Equaion 24. FIGURE 35: TURN OFF SNUBBERS Figure 36 shows he common urn-off snubber circuiry used o limi he ΔV/Δ and reduce he swiching losses in he MOSFET. When he MOSFET urns OFF, some of he peak curren sars flowing hrough CS, which causes i o slow he drain volage rise ime, and reduce he area under he VDS and ID during urn-off ime. CS has o compleely discharge during he minimum TON ime of he MOSFET, which limis he maximum value of CS ha can be used, is given by Equaion 25. EQUATION 25: SNUBBER CAPACITOR T C S = ------------------- ONMIN 4 R S where: R S = Snubber resisor C S = Snubber capacior T ONMIN = Minimum ON ime of swich When he MOSFET urns OFF, CS charges o volage VS, so energy is dissipaed during each swiching cycle in he snubber resisor is given by Equaion 26. EQUATION 26: SNUBBER POWER LOSS 2 P RS = 0.5 V S CS f SW where: V S = Volage across he snubber capacior C S f SW = Swiching frequency (B) 1 (A) 1 1 FIGURE 36: MOSFET TURNS OFF SNUBBER Q C S EQUATION 24: SNUBBER RESISTOR SELECTION Q D S R S 2 V -------- S = 0.5 L R LK I 2 f SW S where: I = The curren flowing hrough he ransformer primary jus before he MOSFET urns off L LK = L LEAKAGE inducance of he ransformer DS01114A -page 36 2007 Microchip Technology Inc.

MAGNETICS DESIGN This secion covers he basics of magneic design used in SMPS applicaions. Afer selecing he opology ha is bes suied o he power supply specificaion, he nex choice is o fix he swiching frequency and ransformer core size. To do his, i is necessary o know he numerical relaion beween maximum available power and ransformer parameers such as magneic core area, magneic lengh, window area, bobbin area, peak flux densiy and coil curren densiy. There are wo ypes of magneic losses: hyseresis and eddy curren. Ferrie has high elecrical resisiviy, so ypically here are only negligible hyseresis and eddy curren losses. This makes ferrie a good maerial o use for a swiching frequency of 10 khz o 1 MHz. Table 2 liss some of he pros and cons of he magneic maerial used in high frequency ransformer and inducor design. TABLE 2: MAGNETICS MATERIAL AND THEIR CHARACTERISTICS Maerial Pros Cons Ferrie High permeabiliy, hus can be used o generae high inducance, permeabiliy is relaively consan wih flux densiy, and variey of ferrie is available opimized for minimum power dissipaion for various frequencies. Generally used for power ransformers. Ferrie sauraes hard Molyperm MPP Powdered Iron Sof sauraion, a wide variey of differen permeabiliy is available. Generally used for power Inducors. Variey of permeabiliy is available, and i is less expensive han he MPP. Generally used for power inducors where cos is more imporan. Considerably higher losses han ferries Sauraes slighly harder han MPP, a powdered iron core inducor will be larger in size han an inducor made from MPP or ferrie. 2007 Microchip Technology Inc. DS01114A -page 37

Transformer Design Transformer size depends on many parameers such as: core loss, copper loss, cooling efficiency, insulaion, core geomery, and he maximum hroughpu power. Core loss increases as he flux densiy swings and he core size increases. Copper loss increases as he flux densiy and core size decreases. When operaing a or near 100 khz, maximum efficiency occurs a 40-45% of core loss and 55-60% of copper loss. The firs sep in he ransformer design is o fix he core and he bobbin size. The power raing of he core is relaive o he produc of he core window area and he core cross-secional area (known as he area produc), which is readily available from he core manufacurer. The window area used for he primary winding is given by he primary area facor KP and primary uilizaion facor KU. The numerical relaion beween he core geomery, area produc and power oupu is given by Equaion 27. EQUATION 27: CORE GEOMETRY AND POWER OUTPUT RELATIONSHIP D MAX AP = A E A W = P IN ( ---------------------------------------- K J f SW ΔB) 10 8 C 4 M where: A E = Core cross secion area A W = Core window area AP = Area produc P IN = Power inpu = power oupu D MAX = Maximum duy cycle of swich K = K P K U K T = overall copper uilizaion facor J = Curren densiy of primary f SW = Swiching frequency B = Change in flux densiy during ON ime K T = Raio of primary average o RMS curren Once he numerical relaion is known, he area produc core size can be seleced. The number of primary urns is given by Equaion 28. EQUATION 28: TRANSFORMER PRIMARY NUMBER OF TURNS The number of secondary urns for he cener ap ransformer is given by Equaion 29. EQUATION 29: T ONMAX N P = MIN ---------------------- ( ΔB) TRANSFORMER SECONDARY NUMBER OF TURNS When esing he ransformer in he acual applicaion, some fine uning may be required o improve is overall performance. For a given ransformer, if he power loss in he core is much less han copper loss (primary and secondary ogeher), decreasing he number of urns will be required. This inerim increases he flux densiy. And, if core loss in subsanially lesser han copper loss, an increase in he number of urns is required, which reduces he flux densiy o opimize he oal loss (core loss plus copper loss). The winding area in he primary and secondary should be proporional o heir losses. If muliple secondary windings are presen, he winding area should be proporional o he copper loss. A E N P N S = V O ------------------------------------------------- ( MIN 2 D MAX ) DS01114A -page 38 2007 Microchip Technology Inc.

Inducor Design An inducor is a magneic componen ha has a single winding in is core and carries a primarily DC curren along wih AC ripple, which is generally very small compared wih DC curren. For power inducors, a oroid is he mos commonly used core geomery. For a power inducor design, wo parameers mus be known: he inducance required wih he DC bias and he value of he DC curren. The following procedure defines how o choose he core size and he number of urns required. The design example is based on he MPP core selecor char from he manufacurer MAGNETICS (see Figure 37). 1. Calculae he energy sorage requiremen for he inducor. The daa provided by he manufacurer is L I 2 ; herefore, compue E = L I 2, where L is he inducance value and I is he DC curren flowing hrough he inducor. For example, he required inducance of 500 µh for 3 amps DC curren would be: E = 4.5 mj. 2. Locae he value E in he core selecor char, as shown in Figure 37. This graph is provided by he manufacurer. Follow his coordinae o he inersecion wih he firs core size. Here i passes hrough he 125µ secion of permeabiliy and he smalles core ha can be used is he 55310 MPP core. 3. Calculae he number of urns from he AL value, given by he core manufacurer. 4. Calculae he magneic field srengh in oerseds from he magneic daa shee provided by he manufacurer. 5. From he permeabiliy versus DC bias curve, deermine he percenage of iniial permeabiliy. 6. Calculae he acual number of urns required, based on iniial permeabiliy value. EQUATION 30: N = INDUCTOR NUMBER OF TURNS L REQUIRED 10 6 ----------------------------------------- A L N = 0.5 106 ------- 90 N = 75 urns 27.8 --------- 75 3 = 50.04 125 N = 89 FIGURE 37: ENERGY VERSUS CORE SIZE Cores Lised by Geomery Facor 55868 55440 55091 55083 55071 55586 55310 55378 55045 55035 55275 55285 55235 55175 MPP Core Selecor Char 125µ 160µ 200µ 300µ 60µ 26µ 55908 55191 55111 55716 55076 55894 55350 55204 55118 55125 55285 55405 55025 55015 55145 55135 0.0001 0.001 0.01 0.1 1 10 100 1000 L I 2, mh-amperes 2 2007 Microchip Technology Inc. DS01114A -page 39

Selecion of Capaciors The selecion of he inpu bulk capacior depends mainly on he hold-up ime required from he power supply, and he ripple RMS curren raing of he capacior. Selecion of he oupu capacior depends on he maximum operaing RMS curren, swiching frequency, lifeime and he ype of he converer used. The Equivalen Series Resisor (ESR) of he oupu capacior direcly affecs he oupu ripple volage and life of he capacior. Figure 38 shows he curren and volage waveform across he oupu capacior, which has a ΔI ripple ampliude cenered a he oupu load curren IOUT. The produc of ΔI wih he ESR of he capacior provides he peak-o-peak ripple volage ΔV a he oupu volage. The life of he capacior doubles wih every 10 degree drop in emperaure from is raed value. For example, if he capacior is raed a 5000 hours a 105 C, i would have a life span of 5000 2 4, which equals 80,000 hours a a 65 C operaing emperaure. Table 3 shows he ype of capaciors and he applicaions where hey are ypically used. FIGURE 38: INDUCTOR CURRENT AND OUTPUT CAPACITOR VOLTAGE WAVEFORM I OUT I OUT ΔI V OUT ΔV TABLE 3: Type of Capacior Aluminum Elecrolyic Tanalum CAPACITORS AND THEIR CHARACTERISTICS Ceramic and Mulilayer Ceramic Film, Polypropylene Typical Applicaion Generally used a converer inpu and oupu where capaciance required is large and size of he capacior is no imporan. Generally used a oupu of converer where i requires high ripple curren RMS raing and low ESR of capacior and size and fooprin requiremen is very small. I generally comes in a SMD package. Used for signal and iming applicaion. Used in parallel wih elecrolyic capacior for noise filer. Generally used for safey applicaion like X- and Y-ype capaciors. DS01114A -page 40 2007 Microchip Technology Inc.

ELECTROMAGNETIC INTERFERENCE (EMI) IN SMPS One of he bigges challenge faced by a power supply engineer is o design a power supply ha mees he specificaion, which calls for EMI and EMC limis. In his applicaion noe, only EMI and more paricularly, pracical aspecs of EMI are discussed. There are wo ypes of noise: conduced and radiaed. The mos fundamenal difference is ha he conduced noise is carried by he conducor and he radiaed noise does no rely on he conducors. Bes Pracices A good PCB layou and good wiring pracice drasically reduces he radiaed noise. The high frequency curren loop should be shor. A wised pair of conducors should be used. A ransformer and an inducor wih air gap should be screened o reduce he radiaed magneic field. The bes pracice is o keep he line and reurn pah for any signal as close as possible o each oher, since signal level is direcly proporional o he loop area formed by he signal wires. Also, use meal for he enclosure box maerial. There are wo ypes of conduced noise: he differenial mode noise ha flows in one power line and reurns on he oher, as shown in Figure 39 (A), and he differenial mode curren delivering energy o he load. Common mode noise flows on boh power lines simulaneously, as shown in Figure 39 (B). Common mode curren does no deliver energy. Place a curren probe around boh wires o measure he common mode curren in he circui, as shown in Figure 40 (A). Now place he power line in he curren probe and make a wis in he reurns pah, and hen place he curren probe o measure he differenial mode curren, as shown in Figure 40 (B). If he common mode curren measures 100 µa a 300 khz, and differenial mode curren is 1 ma, he raio is 1:10. If he oal noise volage measured a 300 khz is: 101 ΔBµV = 110000 µv = 110 mv, i will conain 100 mv differenial and 10 mv common mode noise. FIGURE 40: RTN MEASUREMENT OF COMMON AND DIFFERENTIAL MODE NOISE (A) Curren probe Curren probe FIGURE 39: COMMON AND DIFFERENTIAL MODE NOISE RTN (B) + RTN Earh + Noise Earh Noise (A) Differenial mode noise RTN (B) Common mode noise Common Sources of Noise Generaion Figure 41 shows some of he common sources of noise generaion. The conduced elecrical noise is mainly caused by parasiic elecrosaic and elecromagneic coupling beween high frequency swiching elemens and he ground plane. The major sources for common mode noise are: High ΔV/Δ swiching in he MOSFET High-frequency swiching ransformer Oupu recifier reverse recovery The differenial noise is suppressed by an inpu elecrolyic capacior and a large decoupling capacior in parallel wih he inpu bulk capacior. The common mode curren is inroduced o earh ground by insulaion leakage in he ransformer and he parasiic coupling. The maximum value of ground leakage curren (filer capacior CY1 and CY2) ha can be placed is limied by regulaory agencies. 2007 Microchip Technology Inc. DS01114A -page 41

NOISE REDUCTION METHODS The parasiic capaciors, CP1 hrough CP5, shown in Figure 41, inroduce common mode noise o he ground line. To reduce noise, he ransformer should have a Faraday screen, which should reurn o he inpu DC line. The hea sink of he swiching device is one of he major sources of noise. Therefore, an insulaing pad should be used o reduce parasiic capaciance beween he MOSFET and hea sink. All high volage componens should be isolaed from he ground plane. To minimize he EMI filer inducor size, he larges decoupling capacior value should be used. To reduce noise generaed due o high ΔV/Δ and ΔI/Δ, a snubber circui is someimes added in parallel across he swiching device. A high permeabiliy core is used for a common mode inducor o provide high common mode inducance, as well as carry he line inpu curren in he smalles core. The winding of a common mode inducor is physically separaed, and a bobbin wih wo isolaion secions is used o mee safey requiremens and o have leakage inducance beween he wo windings. This leakage inducance will help in suppressing differenial noise. The self-resonan frequency of he common mode inducor should be as high as possible o mainain good high frequency rejecion. To mee his, inerwinding capaciance should be as low as possible. For his reason, a high permeabiliy ferrie oroidal core wih a single layer can be used o avoid inerwinding capaciance, and having a one or wo urn difference in he wo windings o creae leakage inducance o differenial noise. To know wha value of inducor o sar wih, measure he value of he larges noise volage in he sysem wih only a filer capacior presen, and hen decide he value of he inducor required o bring i down o an accepable limi a ha frequency. The losses in he common inducor will be only copper loss, as he core inducor and skin effec are negligible. FIGURE 41: SOURCE OF COMMON AND DIFFERENTIAL MODE NOISE C P4 X-capacior Diode Bridge C P2 C Y1 CY2 C P1 Y-capacior C P5 C P3 DS01114A -page 42 2007 Microchip Technology Inc.

SUMMARY The appropriae SMPS opology can be seleced based on inpu volage, oupu power, and oupu curren (see Table 4). The selecion of opology may differ o mee some of he specific requiremens of he power supply including cos, size and personal experience of he designer. TABLE 4: SMPS TOPOLOGY SELECTION GUIDELINES Inpu volage Oupu power Preferred Topology Universal inpu (90-264) VAC Po < 150 wa, Load curren < 10A Flyback, Forward Universal inpu (90-264) VAC Po < 150 wa, Load curren > 10A Forward Universal inpu (90-264) VAC 150 wa < Po > 350 Two-Swich Forward, Half-Bridge, Push-Pull Universal inpu (90-264) VAC Po < 500 wa Half-Bridge, Push-Pull Vin > 350 VDC Po < 750 wa Half-Bridge Vin<200VDC Po<500wa Push-Pull Vin > 350 VDC 500 < Po > 1000 wa Full-Bridge Vin > 350 VDC Po > 1000 wa ZVT Full-Bridge Vin > 350 VDC Po > 2000 wa More han one ZVT full-bridge in parallel, inerleaved wih more han one ZVT full-bridge 2007 Microchip Technology Inc. DS01114A -page 43

APPENDIX A: GLOSSARY Bipolar Juncion Transisor (BJT) A BJT is a hree-erminal device consruced of doped semiconducor maerial and may be used in amplifying or swiching applicaions. Boos Converer A basic SMPS opology in which energy is sored in a inducor when a swich is ON, and is ransferred o he oupu when he swich is OFF. I convers an unregulaed inpu volage o a regulaed oupu volage higher han he inpu. Buck Converer A basic SMPS opology in which a series swich chops he inpu volage and applies he pulses o an averaging LC filer, which produces a lower oupu volage han he inpu. Consan Oupu Volage A mode of operaion when oupu volage is regulaed regardless of any oher parameer changes in he sysem. Curren Mode Conrol A conrol mehod which is using a dual loop circui o adjus he PWM operaion. Elecromagneic Inerference (EMI) Unwaned energy, in he form of elecrical noise generaed from he SMPS, which may be conduced or radiaed. Faraday Shield An elecrosaic shield beween inpu and oupu windings of a ransformer. This is used o reduce primary o secondary coupling capaciance, which in urn will reduce oupu common mode noise. Feed Forward A erm describing a sysem ha reacs o changes in is environmen, usually o mainain some desired sae of he sysem. Also, i is a sysem ha exhibis feed-forward behavior ha responds o a measured disurbance in a predefined way, in conras wih a feedback sysem. Flyback Converer (FBT) An isolaed Buck-Boos SMPS opology in which, during he firs period of a swiching cycle, he energy is sored in a magneizing inducance of he ransformer. Then, during he second period, his energy is ransferred o a secondary winding of he same half-bridge resonan converer where he load is conneced in series wih he resonan ank capacior, C, and ino he load. Forward Converer A Buck-derived SMPS opology in which energy is ransferred o he secondary of a ransformer winding and ino he load, when he swiching ransisor is ON. Full-Bridge Converer An SMPS opology in which four swiches are conneced in a bridge configuraion o drive he primary of a ransformer. This is also known as an H-Bridge Converer. H-Bridge Converer See Full-Bridge Converer. Half-Bridge Converer A SMPS opology similar o a full-bridge converer in which only wo swiches are used. The oher wo are replaced by capaciors. Half-Bridge LLC Resonan Converer A SMPS half-bridge opology where he series resonan ank consising of he inducor, L, and he capacior, C, which is used o generae anoher resonan frequency wih ransformer magneizing inducance. Half-Bridge Resonan Converer A half-bridge converer using an LC resonan ank o reduce he swiching losses in he MOSFET. H-Bridge Phase-Shif ZVT Converer A full-bridge converer using he phase-shif ZVS echnique is known as an H-Bridge Phase-Shif ZVT opology. In his opology, he parasiic oupu capacior of he MOSFETs and he leakage inducance of he swiching ransformer are used as a resonan ank circui o achieve zero volage across he MOSFET a he urn-on ransiion. DS01114A -page 44 2007 Microchip Technology Inc.

LLC Resonan Converer A full-bridge converer wih an LC resonan ank, which is used o reduce swiching losses and he phase shif beween he wo leg gae pulse defined in he oupu power flow. Parallel Resonan Converer (PRC) A half-bridge resonan converer where he load is conneced in parallel wih he resonan ank capacior, C. Power Diode A power diode is a unidirecional semiconducor swich, which has only one PN juncion. A power diode is able o carry a large amoun of curren and ypically is able o suppor a large reverse-bias volage in he OFF sae. Power Facor Correcion (PFC) PFC is a echnique of couneracing he undesirable effecs of elecric loads ha creae a power facor ha is less han 1. Push-Pull Converer An SMPS opology which is using usually a cener-ap ransformer and wo swiches ha are driven ON and OFF alernaely. Series Resonan Converer (SRC) A half-bridge resonan converer where he load is conneced in series wih he resonan ank capacior, C. Snubber A componen or a circui, acive or passive, dissipaive or regeneraive used in a SMPS o reduce componens sress by limiing peak volage or curren, ΔV/Δ, ΔI/Δ. Swich Mode Power Supply (SMPS) A power supply echnology in which a swiching device, along wih a passive componen, is used o process he power flow. Toal Harmonic Disorion (THD) The oal harmonic disorion or THD, of a signal is a measuremen of he harmonic disorion presen and is defined as he raio of he sum of he powers of all harmonic componens o he power of he fundamenal. Two-Swich Forward Converer Used in series wih he ransformer primary o reduce he reverse blocking volage of he swich. Volage Mode Conrol A conrol mehod ha uses a single loop o conrol he oupu. 2007 Microchip Technology Inc. DS01114A -page 45

NOTES: DS01114A -page 46 2007 Microchip Technology Inc.

Noe he following deails of he code proecion feaure on Microchip devices: Microchip producs mee he specificaion conained in heir paricular Microchip Daa Shee. Microchip believes ha is family of producs is one of he mos secure families of is kind on he marke oday, when used in he inended manner and under normal condiions. There are dishones and possibly illegal mehods used o breach he code proecion feaure. All of hese mehods, o our knowledge, require using he Microchip producs in a manner ouside he operaing specificaions conained in Microchip s Daa Shees. Mos likely, he person doing so is engaged in hef of inellecual propery. Microchip is willing o work wih he cusomer who is concerned abou he inegriy of heir code. Neiher Microchip nor any oher semiconducor manufacurer can guaranee he securiy of heir code. Code proecion does no mean ha we are guaraneeing he produc as unbreakable. Code proecion is consanly evolving. We a Microchip are commied o coninuously improving he code proecion feaures of our producs. Aemps o break Microchip s code proecion feaure may be a violaion of he Digial Millennium Copyrigh Ac. If such acs allow unauhorized access o your sofware or oher copyrighed work, you may have a righ o sue for relief under ha Ac. Informaion conained in his publicaion regarding device applicaions and he like is provided only for your convenience and may be superseded by updaes. I is your responsibiliy o ensure ha your applicaion mees wih your specificaions. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liabiliy arising from his informaion and is use. Use of Microchip devices in life suppor and/or safey applicaions is enirely a he buyer s risk, and he buyer agrees o defend, indemnify and hold harmless Microchip from any and all damages, claims, suis, or expenses resuling from such use. No licenses are conveyed, implicily or oherwise, under any Microchip inellecual propery righs. Trademarks The Microchip name and logo, he Microchip logo, Accuron, dspic, KEELOQ, KEELOQ logo, microid, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, rfpic and SmarShun are regisered rademarks of Microchip Technology Incorporaed in he U.S.A. and oher counries. AmpLab, FilerLab, Linear Acive Thermisor, Migraable Memory, MXDEV, MXLAB, SEEVAL, SmarSensor and The Embedded Conrol Soluions Company are regisered rademarks of Microchip Technology Incorporaed in he U.S.A. Analog-for-he-Digial Age, Applicaion Maesro, CodeGuard, dspicdem, dspicdem.ne, dspicworks, dsspeak, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzylab, In-Circui Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Cerified logo, MPLIB, MPLINK, PICki, PICDEM, PICDEM.ne, PICLAB, PICail, PowerCal, PowerInfo, PowerMae, PowerTool, REAL ICE, rflab, Selec Mode, Smar Serial, SmarTel, Toal Endurance, UNI/O, WiperLock and ZENA are rademarks of Microchip Technology Incorporaed in he U.S.A. and oher counries. SQTP is a service mark of Microchip Technology Incorporaed in he U.S.A. All oher rademarks menioned herein are propery of heir respecive companies. 2007, Microchip Technology Incorporaed, Prined in he U.S.A., All Righs Reserved. Prined on recycled paper. Microchip received ISO/TS-16949:2002 cerificaion for is worldwide headquarers, design and wafer fabricaion faciliies in Chandler and Tempe, Arizona; Gresham, Oregon and design ceners in California and India. The Company s qualiy sysem processes and procedures are for is PIC MCUs and dspic DSCs, KEELOQ code hopping devices, Serial EEPROMs, microperipherals, nonvolaile memory and analog producs. In addiion, Microchip s qualiy sysem for he design and manufacure of developmen sysems is ISO 9001:2000 cerified. 2007 Microchip Technology Inc. DS01114A -page 47

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