High Efficiency DC-DC Converter for EV Battery Charger Using Hybrid Resonant and PWM Technique

Transcription

1 High Efficiency DC-DC Converer for EV Baery Charger Using Hybrid Resonan and PWM Technique Hongmei Wan Thesis submied o he faculy of he Virginia Polyechnic Insiue and Sae Universiy in parial fulfillmen of he requiremens for he degree of Maser of Science In Elecrical and Compuer Engineering Jih-Sheng Lai, Chair Douglas J. Nelson Kahleen Meehan April 3, Blacksburg, Virginia Keywords: Elecric Vehicle Baery Charger, DC-DC Converer, Phase-shifed Full Bridge Converer, LLC Resonan Converer, Hybrid Resonan and PWM Converer Copyrigh, Hongmei Wan

2 High Efficiency DC-DC Converer for EV Baery Charger Using Hybrid Resonan and PWM Technique Hongmei Wan ABSTRACT The baery charger plays an imporan role in he developmen of elecric vehicles (EVs) and plug-in hybrid elecric vehicles (PHEVs).This hesis focuses on he DC-DC converer for high volage baery charger and is divided ino four chapers. The background relaed o EV baery charger is inroduced, and he opologies of isolaed DC- DC converer possibly applied in baery charge are skeched in Chaper. Since he EV baery charger is high volage high power, he phase-shifed full bridge and LLC converers, which are popularly used in high power applicaions, are discussed in deail in Chaper. They are generally considered as high efficiency, high power densiy and high reliabiliy, bu heir prominen feaures are also limied in cerain range of operaion. To make full use of he advanages and o avoid he limiaion of he phase-shifed full bridge and LLC converers, a novel hybrid resonan and PWM converer combining resonan LLC half-bridge and phase shifed full-bridge opology is proposed and is described in Chaper 3. The converer achieves high efficiency and rue sof swiching for he enire operaion range, which is very imporan for high volage EV baery charger applicaion. A 3.4 kw hardware prooype has been designed, implemened and esed o verify ha he proposed hybrid converer ruly avoids he disadvanages of LLC and phase-shifed full bridge converers while mainaining heir advanages. In his proposed hybrid converer, he uilizaion efficiency of he auxiliary ransformer is no ha ideal. When he duy cycle is large, LLC converer charges one of he capaciors bu he energy sored in he capacior has no chance o be ransferred o he oupu, resuling in he low uilizaion

3 efficiency of he auxiliary ransformer. To uilize he auxiliary ransformer fully while keeping all he prominen feaures of he previous hybrid converer in Chaper 3, an improved hybrid resonan and PWM converer is proposed in Chaper 4. The idea has been verified wih simulaions. The las chaper is he conclusion which summaries he key feaures and findings of he wo proposed hybrid converers. iii

4 ACKNOWLEDGEMENTS Firs, I would like o express my deep graiude and appreciaion o my advisor, Dr. Jih-Sheng Lai. His knowledge, research aiude and ways of hinking are mos valuable during my years of sudy and hey will keep helping me in my fuure life. His guidance, experise, paience, and encouragemen were essenial during my ime a Virginia Tech. The lessons I learned from him will guide me hroughou my life. I am graeful o my commiee: Dr. Kahleen Meehan and Dr. Douglas J. Nelson for heir guidance and for serving on my commiee. Boh Dr. Kahleen Meehan and Dr. Douglas J. Nelson help make Virginia Tech s Bradley Deparmen of Elecrical and Compuer Engineering ino he excellen program ha i is. The classes I ook a Virginia Tech provided me wih knowledge criical for my graduae work. I would like o hank he Virginia Tech professors who augh he classes for sharing heir valuable experience and knowledge. I would also like o exend my hanks o my colleagues in he Fuure Energy Elecronics Cener (FEEC). Mr. Gary Kerr, Mr, Dr. Wensong Yu, Mr. Wei-Han Lai, Mr. Hidekazu Miwa, Mr.YoungHoon Cho, Mr. Pengwei Sun, Mr. Jian-Liang Chen, Mr.ThomasLaBella, Mr. Chrisopher Huchens, Mr. Benjamin York, Mr. Bre Whiaker, Mr. Hao Qian, Mr. Zidong Liu, Mr. Hsin Wang, Mr. Ahmed Koran, Mr. Cong Zheng, Mr. Baifeng Chen, Mr. Rui Chen, ZakariyaDalala, Mr. Bin Gu, Seung-Ryul Moon, Yaxiao Qin, Ms.Zheng Zhao, Mr. ZakaUllahZahid,Ms. Hyun SooKoh, and Mr.JohnReichl, all assised me grealy. In addiion, I would like o exend my graiude o visiing scholars, Prof. Huang-Jen Chiu, Prof. Yen-Shin Lai, Mr. Hongbo Ma, and Mr.Chuang Liu. My greaes graiude and hanks go o my family. My husband, Wensong Yu, provides me counless amouns of suppor and my son, Yunlong Yu, gives me a lo of fun and happiness. I would like o hank my faher, Wenbiao Wan, moher, ChadeXiong, brohers, Yinhua Wan and Yaohua Wan, sisers, Yinmei Wan and Xiaomei Wan, for heir encouragemen and suppor in my life. All phoographs by auhor,. iv

5 TABLE OF CONTENTS CH: Inroducion.... Background..... Typical Baery Charging Profile..... Charger Classificaions Charger Sysem Charger Sysem Requiremens for Isolaed DC-DC Converers Convenional Isolaed DC-DC Converers Basic Isolaed PWM Converers Basic Resonan Converers....5 Topology Selecion for EV Baery Charger Thesis Ouline... 7 CH: Phase-Shifed Full Bridge and LLC Resonan Converers for High Power Applicaion Inroducion Phase Shifed Full Bridge Converer..... Topology Descripion..... Operaing Modes ZVS Process Relaion beween Duy Cycle, Transformer Turns Raio and Swiching Frequency Disadvanages of Phase-shifed Full Bridge Converer LLC Resonan Converer Swiching Frequency Equal o Resonan Frequency Swiching Frequency Lower Than Resonan Frequency Swiching Frequency Higher Than Resonan Frequency Design Consideraions of LLC Resonan Converer Disadvanages of LLC Resonan Converer CH3: Hybrid Resonan and PWM Converer Moivaions Proposed Hybrid Resonan and PWM Converer Operaional Principles Design Consideraions Transformers Turns Raio ZVS under True Zero Load condiion v

6 3.4.4 Duy Cycle Loss Transformer Magneizing and Leakage inducance Resonan Capaciance Oupu Inducance Simulaion Circui and Simulaion Resuls Performance Analysis of Hybrid Resonan and PWM Converer Main Componens in This Circui MOSFETs and IGBTs Conducion Loss Analysis Diode Conducion Loss Analysis MOSFET and IGBT Swiching Loss Analysis Transformer Core Loss Analysis Transformer Copper Loss Analysis Inducor Loss Oher Losses Efficiency Esimaion Topology Variaions Implemened Hardware Complee Circui Srucure Implemened Hardware Prooype Experimenal Verificaion Summary CH4: Improved Hybrid Resonan and PWM Converer Issues in Previous Hybrid Resonan and PWM Converer The Improved Hybrid Resonan and PWM Converer Operaional Principles Design Consideraions Simulaion Verificaion Comparisons beween he Proposed and Improved Converers Summary...6 Conclusion... 8 References... vi

7 LIST OF FIGURES Fig.. Elecric vehicle and is main modules... Fig.. Sysem archiecure of HEV/EV... Fig..3 Typical charging profile of Li-Ion cell... 3 Fig..4 Block diagram of off-board charger... 4 Fig..5 Block diagram of on-board charger... 5 Fig..6 Baery charger sysem... 6 Fig..7 Half bridge SRC... Fig..8 Half Bridge PRC... 3 Fig..9 Half Bridge SPRC... 4 Fig.. Half Bridge LLC Resonan Converer... 5 Fig.. Phase-shifed Full bridge converer... Fig.. The difference beween regular Full Bridge and PH-Full Bridge ZVS PWM DC/DC converer opologies conrol swiching... Fig..3 Phase-shifed Full bridge converer... Fig..4 Mode: a ime... 3 Fig..5 Mode: a inerval ~... 3 Fig..6 Mode3: a inerval ~ Fig..7 Mode4: a inerval 3 ~ Fig..8 Mode5: a ime Fig..9 Mode6: inerval 4 ~ Fig.. Deail of he rising edge of he volage across he swich of lagging leg... 6 Fig.. Deail of he rising edge of he volage across he swich of leading leg... 8 Fig.. Relaion beween duy cycle, ransformer urns raio and swiching frequency... 3 Fig..3 Key waveforms and formula of convenional PSFB converer... 3 Fig..4 Half Bridge LLC Resonan Converer... 3 Fig..5 Equivalen Circui for Half Bridge LLC Resonan Converer Fig..6 LLC Equivalen Circui Fig..7 Gain curves of half bridge LLC Fig..8 Operaing Regions for LLC Resonan Converer Fig..9 DC Characerisic of LLC Resonan Converer Fig.. The swiching frequency vs. he peak gain frequency Fig.. LLC converer operaing a resonan frequency Fig.. LLC converer operaing a lower resonan frequency Fig..3 Topological modes for LLC converer operaing a lower resonan frequency Fig..4 LLC converer operaing a higher resonan frequency Fig..5 Topological modes for LLC converer operaing a higher resonan frequency... 4 Fig..6 Dead-ime requiremen... 4 Fig..7 Peak Gain vs Q for differen m values Fig..8 Deermining he Maximum Gain Fig..9 Key characerisics and formula of HB LLC converer Fig. 3. Hybrid Resonan and PWM Converer Fig. 3. Hybrid Resonan and PWM Converer Fig. 3.3 Topological modes of he proposed converer in half swiching cycle Fig.3.4 (a), (b) The equivalen circui for Mode [, ]; (c) he key waveforms Fig.3.5 The simplified circui for he primary side of Fig.3.4 (b)... 5 Fig.3. 6 The simplified circui for he secondary side of Fig.3.5 (b)... 5 Fig.3.7 The equivalen circui under zero load condiion (wors case)... 5 Fig.3.8 (a), (b)the equivalen circui for Mode [, 3 ];(c) zoomed key waveforms... 5 Fig.3.9 (a), (b) he equivalen circui for Mode [ 5, 6 ]; (c) zoomed key waveforms Fig.3. The secondary recifier volage waveform Fig.3. Volage gain vs. effecive duy cycle vii

8 Fig. 3. ZVS condiion under no load Fig. 3.3 Waveforms of recified volage v rec, main ransformer TR primary volage v pri and main ransformer TR primary curren i pri Fig. 3.4 Alernaive ransformer winding configuraions Fig.3.5 DC characerisics of half bridge LLC Fig.3.6 LLC converer volage gain vs. normalized frequency Fig. 3.7 Volage waveforms of recifier... 6 Fig.3.8 Normalized peak-o-peak oupu inducor curren vs. normalized oupu volage Fig.3.9 Power sage of he simulaion circui... 6 Fig.3. IGBT waveforms of he volage, curren, and is gae a full load... 6 Fig.3. MOSFET waveforms of he volage, curren, gae and oupu curren a full load... 6 Fig.3. MOSFET waveforms of he volage, curren, gae and oupu curren a no load Fig. 3.3 Full-bridge diode D waveforms of volage, curren and is associaed ransformer secondary curren a full load Fig. 3.4 Half-bridge diode D5 waveforms of volage and is associaed ransformer secondary curren a full load Fig. 3.5 Reading daa from daa shee Fig.3.6 Reading R DS(on)max (5 C) from he daa-shee Fig. 3.7 Diode resisance vs. he diode curren Fig. 3.8 Reading daa from daashee Fig. 3.9 Definiions of MOSFET swiching imes and energies... 7 Fig. 3.3 Definiions of IGBT swiching imes and energies... 7 Fig.3.3 An arbirary volage waveforms Fig. 3.3 Core loss densiy curves of he oupu inducor Fig.3.33 Calculaed oal loss and efficiency vs. oupu power... 8 Fig Esimaed power losses a 3.4 kw raed oupu power wih wo differen oupu volage levels.. 8 Fig.3.35 Several variaions hybrid resonan and PWM converers... 8 Fig.3.36 Complee srucure of he implemened hardware Fig.3.37 Prooype of he implemened hardware Fig Power circui and he parameers of he prooype Fig.3.39 IGBT ZCS experimen waveforms of device volage, curren, and is gae Fig. 3.4 MOSFET ZVS load adapabiliy experimens wih differen load condiions Fig.3.4 Full-bridge diode D waveforms of volage, curren and is associaed ransformer secondary curren Fig. 3.4 Half-bridge diode D5 experimenal waveforms of volage and is associaed ransformer secondary curren Fig Experimenal resuls of efficiency as a funcion of he oupu power Fig.3.44 Key waveforms and formulaof he proposed hybrid converer Fig. 4. Hybrid resonan and PWM converer in CH Fig. 4. Mode [, ] for he hybrid resonan and PWM converer Fig. 4.3 The improved circui configuraion... 9 Fig. 4.4 The improved converer... 9 Fig. 4.5 Topological modes of he improved converer in half swiching cycle... 9 Fig.4.6 (a), (b) The equivalen circui for Mode [, ];(c) The key waveforms... 9 Fig.4.7 The simplified circui for he primary side of Fig.4.6 (b) Fig.4.8 The simplified circui for he secondary side of Fig.4.6 (b) Fig.4.9 The equivalen circui under zero load condiion (wors case) Fig.4. (a), (b) he equivalen circui for Mode [, 3 ]; (c) he key zoomed waveforms Fig.4. (a), (b) he equivalen circui for Mode [ 5, 6 ];(c)he key zoomed waveforms Fig.4. The secondary recifier volage waveform Fig.4.3 Volage gain vs. effecive duy cycle Fig. 4.4 Waveforms of recified volage v rec, main ransformer TR primary volage v pri and main ransformer TR primary curren i pri Fig. 4.5 Volage waveforms of recifier Fig. 4.6 Normalized peak-o-peak oupu inducor curren vs. normalized oupu volage Fig.4.7 Power sage of he simulaion circui... viii

9 Fig.4.8 IGBT waveforms of he volage, curren, and is gae a full load... Fig.4.9 MOSFET waveforms of he volage, curren, gae and oupu curren a full load... Fig.4. MOSFET waveforms of he volage, curren, gae and oupu curren a no load... Fig. 4. Full-bridge diode D waveforms of volage, curren and is associaed ransformer secondary curren a full load... Fig. 4. Half-bridge diode D5 waveforms of volage and is associaed ransformer secondary curren a full load... 3 Fig. 4.3 Circui configuraions of he wo converers... 4 Fig.4.4 The secondary recifier volage waveform... 5 Fig. 4.5 Normalized peak-o-peak oupu inducor curren vs. normalized oupu volage... 5 ix

10 LIST OF TABLES Table.: Baery charger classificaion... 4 Table.: Baery charging levels... 6 Table.3: Power Supply Topologies from Table 3.: Simulaion specificaions... 6 Table 3.: main componens used in he circui Table 3.3: facors applied o he above formula (3.49) Table 3.4: Efficiency esimaion condiions... 8 Table 3.5: phase-shifed full bridge, LLC and Proposed Converers Table 4.: Simulaion specificaions... Table 4.: Phase-shifed full bridge, LLC, Previous Proposed and Improved Converers... 6 x

11 CH: Inroducion. Background As generally recognized, elecric vehicles can achieve higher energy conversion efficiency, moor-regeneraive braking capabiliy, fewer local exhaus emissions, and less acousic noise and vibraion, as compared o gas-engine vehicles. The baery has an imporan role in he developmen of elecric vehicles (EVs) and plug-in hybrid elecric vehicles (PHEVs). Fig.. Elecric vehicle and is main modules An EV shown in Fig.. [] is a vehicle propelled by elecriciy, unlike he convenional vehicles on road oday which are major consumers of fossil fuels. This elecriciy can be eiher produced ouside he vehicle and sored in a baery or produced on board wih he help of fuel cells (FC s). The developmen of EV s sared as early as 834 when he firs baery powered EV (ricycle) was buil by Thomas Davenpor [], which appeared o be appalling, as i even preceded he invenion of he ICE based on gasoline or diesel fuel. The developmen of EV s was disconinued as hey were no very convenien and efficien o use as hey were very heavy and ook a long ime o recharge. Moreover, from he end of he year 9, hey also became more expensive han ICE

12 vehicles. This led o he developmen of gasoline based vehicles. However, here are concerns over he depleion of fossil fuel and green house gases causing long erm global crisis like climaic changes and global warming. These concerns are shifing he focus back o developmen of auomoive vehicles which use alernaive fuels for operaions. The developmen of such vehicles has become imperaive no only for he scieniss bu also for he governmens around he globe as can be subsaniaed by he Kyoo Proocol which has a oal of 83 counries raifying i (As on January 9). The BEV has been since few years a very aracive research area boh by car manufacurers and scienific researchers. The sysem archiecure of HEV/EV is shown in Fig.. []. Fig.. Sysem archiecure of HEV/EV.. Typical Baery Charging Profile A baery is a device which convers chemical energy direcly ino elecriciy. I is an elecrochemical galvanic cell or a combinaion of such cells which is capable of soring chemical energy. Baeries are more desirable for he use in vehicles, and paricular racion baeries are mos commonly used by EV manufacurers. Tracion baeries include Lead Acid ype, Nickel and Cadmium, Lihium ion/polymer, Sodium and Nickel Chloride, Nickel and Zinc. Baeries are expeced o mee cerain crieria in erms of energy densiy, power densiy, safey, and cycle life in order o be feasible for use in EVs and PHEVs. For his reason, he Unied Saes Advanced Baery Consorium (USABC) and Elecrochemical Energy Sorage Tech Team (EESTT) collaboraed in 6 o develop PHEV end of life baery requiremens [3]. The baery for EVs should ideally provide a

13 high auonomy (i.e. he disance covered by he vehicle for one complee discharge of he baery saring from is poenial) o he vehicle and have a high specific energy and a high specific power (i.e. ligh weigh, compac and capable of soring and supplying high amouns of energy and power respecively). These baeries should also have a long life cycle (i.e. hey should be able o discharge o as near as i can be o being empy and recharge o full poenial as many number of imes as possible) wihou showing any significan deerioraion in he performance and should recharge in minimum possible ime. They should be able o operae over a considerable range of emperaure and should be safe o handle and recyclable wih low coss. Unlike baeries used in radiional low power/energy applicaions, EV baeries require exra care in erms of safey since frequen fas charge/discharge cycles and high amouns of delivered power may cause excess hea generaion. Advanced hermal managemen and cell balancing, plus he selecion of an appropriae chemisry are all facors ha affec cell losses. One passive soluion is o use phase change maerials, which remove large amouns of hea hrough laen hea of fusion [4]. Fig..3 shows he ypical charging profile of Li-ion baery cell [5]. The common charging profiles used in he indusry for Li-ion baeries are consan curren (CC) and consan volage (CV) charging. During CC charging he curren is regulaed a a consan value unil he baery cell volage reaches a cerain volage level. Then, he charging is swiched o CV charging and he baery is charged wih a rickle curren applied by a consan volage oupu of he charger. Fig..3 Typical charging profile of Li-Ion cell 3

14 .. Charger Classificaions Since he incepion of he firs EVs, here have been many differen charging sysems proposed. Due o many differen configuraions of he chargers, i is required o classify hem based on some common design and applicaion feaures. Table. [6] liss five differen mehods of classifying chargers. Table.: Baery charger classificaion Classificaion ype Opions Topology Dedicaed, Inegraed Locaion On-board, Off-board Connecion ype Conducive, Inducive, Mechanical Elecrical waveform AC, DC Direcion of power flow Unidirecional, Bidirecional Power level Level, Level, Level3 The chargers can be classified based on he circui opologies [7]. A dedicaed circui solely operaes o charge he baery. In comparison, he racion inverer drive can serve as he charger a he same ime when he vehicle is no working and plugged ino he grid for charging. This opion is commonly known as inegral/inegraed chargers. A second classificaion is he locaion of he charger. Carrying he charger on-board grealy increases he charging availabiliy of he vehicle. Off-board chargers can make use of higher amperage circuis and can charge a vehicle in a considerably shorer amoun of ime. Fig..4 Block diagram of off-board charger For off-board charger shown in Fig..4 [7], he charger is an exernal uni, raher han a componen of he EV. Furhermore an off-board charger produces a high DC volage. The inernal baery managemen sysem (BMS) mus be able o charge he baery using his volage. The major drawback of his opology is ha he charger is no inegraed in 4

15 he EV. Hence, i is impossible o charge he baery of an EV wihou an appropriae charger which provides he needed high DC volage on-sie. Fig..5 Block diagram of on-board charger For on-board charger shown in Fig..5 [7], he charger is a componen of he EV. The EV can be charged almos everywhere using a single-phase or hree-phase supply. The major drawback of his opology is ha his simple on-board charger requires an addiional DC/AC inverer. One inverer enables he vehicle-o-grid (VG) capabiliy and he second drives he AC propulsion machine. Third is he connecion mehod [8]. Conducive charging conains meal o meal conac, inducive charging connecs ac grid o vehicle indirecly via a ake-apar high frequency ransformer, and mechanical charging replaces he depleed baery pack wih a full one in baery swap saions. Fourh, he elecrical waveform a he connecion por of he vehicle o he grid can be eiher a dc connecion or an ac connecion [6]. Currenly, he PHEVs and EVs in he marke employ an ac connecion ype. However, in he fuure he availabiliy and commonaliy of he dc sources may change he connecion ype. Fifh, he charger can deliver power in unidirecional way by jus charging he baery. More advanced designs inroduce bidirecional power ransfer [9]. Again, all of he chargers in he marke employ unidirecional chargers. Las, hree charging levels have been defined for EVs and PHEVs []. These are deailed in Table.. Level and level charging are assumed o be he normal charging levels which will ake place where he vehicle will si for a subsanial amoun of ime such as he home or office []. However, he drawback of charging a vehicle wih hese normal charging levels is ha i can ake 4 o hours depending on available power, baery size and SOC of he baery [] and his is no a viable opion when long ravel disances are considered. The soluion o his lenghy charging ime issue is he level 3 fas charging. Level 3 charging makes baery powered vehicles more compeiive agains 5

16 convenional ICE vehicles by charging he baery in less han 3 minues [3]. Typically, level 3 charging is accomplished via an off-board charger by means of convering hreephase 48-V AC o a regulaed DC. Alhough here have no been any adoped sandards for level 3 charging in he US [4] or inernaionally oher han Japan [5], a Japanese proocol known as CHAdeMO [6] is gaining inernaional recogniion. CHAdeMO supplies he vehicle wih a regulaed DC volage requiring an exernal charging saion, and inerfaces direcly wih he vehicle baery and baery managemen sysem (BMS). Alernaively, several European auomakers are focusing on supplying vehicles direcly wih 3-phase and processing i via an on-board baery charger [7]. Table.: Baery charging levels AC Volage (V) Max. Curren (A) Max. Power (kw) Level 6.9 Level Level Charger Sysem The charging ime and lifeime of he baery have a srong dependency on he characerisics of he baery charger [8]-[]. Several manufacurers are working worldwide on he developmen of various ypes of baery modules for elecric and hybrid vehicles. However, he performance of baery modules depends no only on he design of modules, bu also on how he modules are used and charged. In his sense, baery chargers play a criical role in he evoluion of his echnology. Baery Charger: AC/DC converer Fig..6 Baery charger sysem The convenional baery charger sysem is shown in Fig..6 [44]. Because baeries have a finie energy capaciy, PHEVs and BEVs mus be recharged on a periodic basis, ypically by connecing o he power grid. The charging sysem for hese vehicles consiss of an AC/DC recifier o generae a DC volage from he AC line, followed by a DC/DC converer o generae he DC volage required by he baery pack. Addiionally, advanced charging sysems migh also communicae wih he power grid using power line 6

17 communicaion (PLC) modems o adjus charging based on power grid condiions. The baery pack mus also be carefully moniored during operaion and charging in order o maximize energy usage and prolong baery life. The focus of his hesis is o design and implemen he DC-DC converer which charges he high-volage baery..3 Charger Sysem Requiremens for Isolaed DC-DC Converers In EV applicaions, he propulsion baery is required o undergo a coninuous sequence of deep discharges followed by recharge o maximum capaciy. The prime requiremen is herefore a sysem ha provides a rapid and efficien charge, using as simple equipmen as possible and avoiding damage o he baery. The enire charging process should be arranged in wo phases. The firs charging phase is a consan curren and wih he baery volage progressively rises. As soon as he baery volage reaches he rickle level, he consan-volage charging mehod should be applied, wih he charging curren progressively falling down o he mainenance level. The consan volage charge phase requires a decoupled and very accurae (i.e., close o /) measure of he baery array volage involving an expensive conrol sysem. There are significan challenges associaed wih he design of he EV baery chargers, such as high power densiy, high efficiency, low cos, isolaion and volage adapion while complying wih harsh environmen auomoive. Alhough he cos of passive elemens can usually be decreased by simply increasing he swiching frequency, frequency is mosly limied by he swiching losses and urn on / urn-off ime. Therefore, sof swiching mehods and resonan circuis are widely used o increase he swiching frequency []. Operaing from a high inpu volage requires a sof ransiion opology o minimize he swiching losses and reduce he high frequency EM caused by a high dv/d. Anoher challenge of such design is associaed wih he reverse recovery losses and he noise caused by he high di/d and dv/d in he oupu recifiers. And also i is necessary o choose a opology ha is also capable of conrolling high oupu curren. In addiion, galvanic isolaion is required o disconnec grid from vehicle elecrically. Galvanic isolaion can be achieved by means of using a high frequency (HF) ransformer inegraed ino DC-DC converer. 7

18 .4 Convenional Isolaed DC-DC Converers.4. Basic Isolaed PWM Converers The DC-DC converer opologies can be divided in wo major pars: non-isolaed and insolaed converer as abulaed in Table. [35], depending on wheher or no hey have galvanic isolaion beween he inpu supply and he oupu circuiry. Isolaed power converer opologies can be classified as eiher single-ended or double-ended depending on he usage of he B-H curve. During he operaion, if he flux swings in only one quadran of he B-H curve, hen he opology is classified as single-ended. If he flux swings in wo quadrans of he B-H curve, hen he opology is classified as double-ended. For a given se of requiremens, a double-ended opology requires a smaller core han a single-ended opology and does no need an addiional rese winding. When designing an isolaed dc-dc power converer, he firs and mos criical choice is selecion of he opology. Hisorically, opology selecion was based upon he desired oupu power level. For he basic opologies, he order from lower power o higher power was usually flyback, forward, push-pull, half-bridge and full-bridge. The flyback may be he mos commonly used isolaed opology. I is generally found in low cos, low power applicaions. Flyback opology requires only a single acive swich and does no require a separae oupu inducor in addiion o he ransformer. This makes he opology easy o use and low cos. The disadvanages of he flyback opology are poor ransformer uilizaion, as i is a single-ended opology, and exra capaciors are required a boh he inpu and he oupu due o he high inpu and oupu ripple currens. The forward and acive clamp forward opologies are ofen employed in medium power applicaions. The forward opology also suffers from poor ransformer uilizaion due o he limied duy cycle and as i is also single-ended opology. The acive clamp forward ransformer does operae in wo quadrans during seady sae operaion however peak flux can reach high levels during sarup and ransien condiions. In order o rese he ransformer he maximum duy cycle is limied in boh he forward opology and he acive clamp forward opology. The remaining hree opologies; push-pull, half-bridge and full-bridge are rue doubleended opologies whereby power ransfer occurs in wo quadrans of he BH curve and does no require special provisions o rese he ransformer. These double-ended 8

19 opologies are he bes choice for applicaions where he highes power densiy is desired, since he ransformer core can be fully uilized. Anoher advanage of double-ended opologies is he ransformer can be furher opimized because of he larger available duy cycle range. Double-ended opologies can operae a a maximum duy cycle of almos 5% per side which equaes o an effecive maximum duy cycle of nearly % a he oupu filer inducor. Designing he ransformer urns raio o maximize he effecive duy cycle grealy reduces he RMS curren in he ransformer and reduces he size of he oupu filer. For push-pull opology configuraion, diodes D and D are shown for simpliciy however mos modern, high efficiency power converers use synchronous MOSFETs as secondary recifiers. The push-pull opology has he advanage of being double-ended however he peak volage sress placed upon he primary swiches during he off sae is very high, well over wo imes he inpu volage. The advanage of he half-bridge over he push-pull is he primary swich volage sress does no exceed he inpu volage. Anoher advanage is here is only one primary winding, allowing he ransformer core window o be beer uilized. The half-bridge opology is only compaible wih volage-mode conrol. The ½V in volage balance a he midpoin beween C and C is no mainained wih curren-mode conrol or when operaing in cycle-by-cycle curren limiing. Acive midpoin balancing circuis can be added o allow a half-bridge o operae wih curren-mode conrol; however hese circuis can be fairly complex. For he full-bridge opology, i has all of he double-ended benefis. The primary swich volage does no exceed he inpu volage. Transformer window uilizaion is very good since here is only a single primary winding. When one of he primary swiches is acive for he Half-Bridge opology he volage across he primary winding is ½Vin. For he Full-Bridge opology, he swiches are acivaed as diagonal pairs. When a pair of diagonal swiches is acive, he volage across he primary winding is he full value of Vin. Therefore for a given power, he primary curren will be half as much for he Full-Bridge as compared o he Half-Bridge. The reduced curren enables higher efficiency as compared o a Half-Bridge especially a high load currens. 9

20 Table.3: Power Supply Topologies from

21 The disadvanage of he full-bridge opology is he added complexiy of driving four primary swiches and he cos of he addiional swiches. Relaive o he Half-Bridge, par of his addiional cos is offse wih reducion of inpu capaciors. Anoher full-bridge configuraion, which is used in high inpu volage and high power applicaions, is he phase-shifed full-bridge. This opology is similar o he convenional full-bridge. However, he conrol mehodology is differen; he phase-shifed Full-Bridge (PSFB) resuls in zero-volage ransiions of he primary swiches while keeping he swiching frequency consan. Zero-vol swiching is especially beneficial a high inpu volage applicaions. Ofen his opology needs an exra commuaing inducor in series wih primary of he power ransformer o ensure zero-vol swiching a ligh load condiions. A disadvanage of his opology is increased conducion losses in he primary during he freewheeling ime..4. Basic Resonan Converers Resonan converer, which were invesigaed inensively in he 8's [36]-[43], can achieve very low swiching loss hus enable resonan opologies o operae a high swiching frequency. In resonan opologies, Series Resonan Converer (SRC), Parallel Resonan Converer (PRC) and Series Parallel Resonan Converer (SPRC, also called LCC resonan converer) are he hree mos popular opologies. The analysis and design of hese opologies have been sudied horoughly. ) Series Resonan Converer The circui diagram of a half bridge Series Resonan Converer is shown in Fig..7 (a) [45]-[5] and he gain curve of SRC is shown in Fig..7 (b). The resonan inducor L r and resonan capacior C r are in series. They form a series resonan ank. The resonan ank will hen in series wih he recifier-load nework. In his configuraion, he resonan ank and he load ac as a volage divider. By changing he frequency of driving volage V d, he impedance of resonan ank will change. The inpu volage is spli beween his impedance and he refleced load. Since i is a volage divider, he DC gain of SRC is always lower han. A ligh-load condiion, he impedance of he load is very large compared o he impedance of he resonan nework; all he inpu volage is imposed on he load. This makes i difficul o regulae he oupu a ligh load. Theoreically, frequency should be infinie o regulae he oupu a no load.

22 Square wave generaor V in S S v d Resonan nework L r Np C r TR SRC Ns Recifier nework v ac C o Volage load (a) Circui configuraion (b) Gain curves Fig..7 Half bridge SRC When swiching frequency is lower han resonan frequency, he converer will work under zero curren swiching (ZCS) condiion. When swiching frequency is higher han resonan frequency, he converer will work under zero volage swiching (ZVS) condiion. For power MOSFET, zero volage swiching is preferred. I can be seen from he operaing region ha a ligh load, he swiching frequency need o increase o very high o keep oupu volage regulaed. This is a big problem for SRC. To regulae he oupu volage a ligh load, some oher conrol mehod has o be added. As inpu volage increases, he converer is working a higher frequency away from resonan frequency. As frequency increases, he impedance of he resonan ank is increased. This means more and more energy is circulaing in he resonan ank insead of ransferred o oupu. Here he circulaing energy is defined as he energy send back o inpu source in each swiching cycle. The more energy is sending back o he source during each swiching cycle, he higher he energy needs o be processed by he semiconducors, he higher he conducion loss. Also he urn off curren is much smaller a lower inpu. When inpu volage increases, he urn off curren is increased. Wih above analysis, we can see ha he major problems of SRC are: ligh load regulaion, high circulaing energy and urn off curren a high inpu volage condiion. ) Parallel Resonan Converer The schemaic of parallel resonan converer is shown in Fig..8 (a) [5]-[54] and is gain curve is shown in Fig..8 (b). For parallel resonan converer, he resonan ank is sill in series. I is called parallel resonan converer because in his case he load is in parallel wih he resonan capacior. More accuraely, his converer should be called series resonan converer wih parallel load. Since ransformer primary side is a capacior, an inducor is added on he secondary side o mach he impedance. Ro V o Gain (nvo/vin) ZCS region Q= Q= Q= Q=3 Q=4 Q= fs/fr ZVS region Q increasing Ro decreasing Q=Zr/Ro

23 Square wave generaor V in S V d S Resonan nework L r C r PRC N p TR Ns Recifier nework i ac L f C o Curren load Ro V o Gain(nVo/Vin) SPRC Volage Gain a Cn= ZCS region ZVS region Q decreasing Ro decreasing Q=Ro/Zr Q=. Q=.6 Q= Q= Q= Q= fs/fr (a) Circui configuraion (b) Gain curves Fig..8 Half Bridge PRC From he gain curves in.8 (b), Similar o SRC, he operaing region is also designed on he righ hand side of resonan frequency o achieve Zero Volage Swiching. Compare wih SRC, he operaing region is much smaller because he mounain is much seeper. A ligh load, he frequency doesn' need o change oo much o keep oupu volage regulaed. So ligh load regulaion problem doesn' exis in PRC. A high inpu volage, he converer is working a higher frequency far away from resonan frequency. Also from he MOSFET curren we can see ha he urn off curren is much smaller a lower inpu. Compare wih SRC, i can be seen ha for PRC, he circulaing energy is much larger. For PRC, a big problem is he circulaing energy is very high even a ligh load. Since he load is in parallel wih he resonan capacior, even a no load condiion, he inpu sill see a prey small impedance of he series resonan ank. This will induce prey high circulaing energy even when he load is zero. The major problems of PRC are: high circulaing energy, high urn-off curren a high inpu volage condiion. 3) Series Parallel Resonan Converer The schemaic of series parallel resonan converer is shown in Fig..9 (a). [55]- [57] and he gain curve of SPRC is shown in Fig..9 (b). Is resonan ank consiss of hree resonan componens: L r, C sr and C pr. The resonan ank of SPRC can be looked as he combinaion of SRC and PRC. Similar as PRC, an oupu filer inducor is added on secondary side o mach he impedance. For SPRC, i combines he good characerisic of PRC and SRC. Wih load in series wih series ank L r and C sr, he circulaing energy is smaller compared wih PRC. Wih he parallel capacior C pr, SPRC can regulae he oupu volage a no load condiion. 3

24 Square wave generaor V in S V d S L r Resonan nework C sr C pr SPRC N p TR Ns Recifier nework i ac L f C o Curren load Ro V o Gain(nVo/Vin) SPRC Volage Gain a Cn= Q=Ro/Zr ZCS region ZVS region Q=. Q=.6 Q= Q= Q= Q=5 Q decreasing Ro decreasing fs/fr (a) Circui configuraion (b) Gain curves Fig..9 Half Bridge SPRC Similar o SRC and PRC, he operaing region is also designed on he righ hand side of resonan frequency o achieve Zero Volage Swiching. From he operaing region graph, i can be seen ha SPRC narrow swiching frequency range wih load change compare wih SRC. The inpu curren is much smaller han PRC and a lile larger han SRC. This means for SPRC, he circulaing energy is reduced compare wih PRC. Same as SRC and PRC, a high inpu volage, he converer is working a higher frequency far away from resonan frequency. Same as PRC and SRC, he circulaing energy and urn off curren of MOSFET also increase a high inpu volage. Wih above analysis, we can see ha SPRC combines he good characerisics of SRC and PRC. Smaller circulaing energy and no so sensiive o load change. Unforunaely, SPRC sill will see big penaly wih wide inpu range design. Wih wide inpu range, he conducion loss and swiching loss will increase a high inpu volage. The swiching loss is similar o ha of PWM converer a high inpu volage. These hree converers all canno be opimized a high inpu volage. High conducion loss and swiching loss will be resuled from wide inpu range. 4) LLC Resonan Converer Three radiional resonan opologies analyzed above have a major penaly for wide inpu range design. High circulaing energy and high swiching loss will occur a high inpu volage. There are some lessons learned from he above analyses. For a resonan ank, working a is resonan frequency is he mos efficien way. This rule applies o SRC and PRC very well. For SPRC, i has wo resonan frequencies. Normally, working a is highes resonan frequency will be more efficien. 4

25 To achieve zero volage swiching, he converer has o work on he negaive slope of DC characerisic. From above analysis, SPRC resonan converer also could no be opimized for high inpu volage. The reason is same as for SRC and PRC; he converer will work a swiching frequency far away from resonan frequency a high inpu volage. Look a DC characerisic of SPRC resonan converer, i can be seen ha here are wo resonan frequencies. One low resonan frequency deermined by series resonan ank L r and C sr. One high resonan frequency deermined by L r and equivalen capaciance of C sr and C pr in series. For a resonan converer, i is normally rue ha he converer could reach high efficiency a resonan frequency. For SPRC resonan converer, alhough i has wo resonan frequencies, unforunaely, he lower resonan frequency is in ZCS region. For his applicaion, we are no able o design he converer working a his resonan frequency. Alhough he lower frequency resonan frequency is no usable, he idea is how o ge a resonan frequency a ZVS region. An LLC resonan converer could be configured in Fig.. (a) [58]-[6]. The DC characerisic of LLC converer is like a flip of DC characerisic of SPRC resonan converer. There are sill wo resonan frequencies. In his case, L sr and C r deermine he higher resonan frequency. The lower resonan frequency is deermined by C r and he series inducance of L pr and L sr. Now he higher resonan frequency is in he ZVS region, which means ha he converer could be designed o operae around his frequency. Square wave generaor V in S V d S C r LLC Resonan nework i p L r L m N p TR Ns Recifier nework v ac (a) Circui configuraion (b) Gain curves Fig.. Half Bridge LLC Resonan Converer Applicaions in which he LLC converer is used can ake advanage of hese wo main feaures: a. Narrow swiching frequency range wih ligh load and ZVS capabiliy wih even no load, hus very low swiching losses (high efficiency). b. The capabiliy o conrol he oupu volage a all load and line condiions. C o Volage load Ro V o Gain(nVo/Vin) 3 Gain Curves of LLC Resonan Converer a Lpr/Lsr= Z r Q = R ac. f p = π ( Lr Lm) C r f p fo = fr = Q increasing π LC r r.3 Ro decreasing fs/fr f o 5

26 .5 Topology Selecion for EV Baery Charger A opological overview of he differen configuraions used in EV power conversion sysems and general sysem block diagrams are presened in [6]-[65]. For he DC-DC sage, many opologies can be considered as candidaes. Among hem, he mos aracive opologies are []-[4]: ) A sof-swiched full-bridge (FB) DC-DC converer; ) An asymmerically conrolled zero-volage swiched (ZVS) half-bridge (HB) converer; 3) An acive-clamped sof-swiched forward converer. All hese hree DC-DC converers can achieve very high efficiency and very good device uilizaion. Furher selecion of he dc-dc converer will depend on applicaion specificaions, including power level, inpu line volage, baery volage, iniial capial cos, long erm operaion expense, and some economics and business philosophy. Resonan converers are included in a wide range of converers. The sraegy of using one is o design a highly efficien converer while eliminaing a common disadvanage of radiional implemenaions based on Pulse-Widh Modulaion (PWM) high swiching losses. Many differen soluions have been suggesed, implemened, and esed in recen years, and many of hem are now widely used in commercial producs. Differen baery chargers based on resonan opologies have been repored in [5] [7]. Generally speaking, in order o guaranee ZVS in resonan converers, a high value of reacive curren circulaion is required, paricularly for a wide range of load variaions. This leads o a bulky resonan ank, lower power densiy, and lower efficiency. Auxiliary commuaed ZVS full-bridge converer opologies suiable for low-power applicaions have been repored in [8] and [9] and furher developed in [3]. In hese converers, an auxiliary circui is used o produce he reacive curren for he full-bridge swiches. The auxiliary circui is working independen of he sysem operaing condiions and is able o guaranee ZVS from no load o full load. Alhough his opology seems very suiable for he baery charger applicaion, here are some sebacks relaed o he auxiliary circui. Since he auxiliary circui should provide enough reacive power o guaranee ZVS a all operaing condiions, he peak value of he curren flowing hrough he auxiliary inducor is very high, which increases he MOSFET conducion losses drasically. Also, 6

27 due o he fac ha he volage and frequency across he auxiliary inducor are very high, he core losses of his inducor are also high. In addiion, oo much reacive curren leads o large volage spikes on he semiconducor swiches due o he delay in he body diode urn-on. [3] presens a conrol mehod, which opimizes he required reacive curren provided by he auxiliary circui. The proposed conrol circui adapively conrols he reacive curren required o guaranee ZVS under differen load condiions. This leads o significanly reduced semiconducor conducion losses as well as reduced auxiliary circui losses. This hesis works on he power sage, presening a hybrid phase-shifed full-bridge and LLC resonan converer, which guaranees ZVS under any load condiions, and hen ges i furher improved. This hybrid converer can achieve ZVS operaion in he enire load range by using he magneizing inducance of he ransformer. In addiion, he converer can operae wih wide inpu-volage variaions wihou penalizing he efficiency. Therefore, he converer is suiable for applicaions in which high efficiency and high power densiy are required such as EV baery charger..6 Thesis Ouline This hesis is divided ino four chapers. They are organized as follows. The firs chaper is background of baery charger. Since he DC-DC converer is he key elemen in baery charger sysem and his hesis mainly deals wih he DC-DC converer for EV baery charger, he isolaed DC-DC converers are also simply overviewed. In second chaper, wo basic ypes of DC-DC converers, which are applied in high power applicaion such as high volage baery for elecric vehicle, are analyzed heoreically in deail. The hird chaper gives he novel converer opology for EV baery charger and is corresponding deailed analysis. A 3.4 kw hardware prooype for baery charger has been designed, fabricaed and esed o verify he circui validiy and he improved performance of he proposed converer. In fourh chaper, an improved converer based on he one in chaper3 is developed and analyzed heoreically. 7

28 CH: Phase-Shifed Full Bridge and LLC Resonan Converers for High Power Applicaion. Inroducion In his chaper, wo basic ypes of DC-DC converers, which are applied in high power applicaion such as high volage baery for elecric vehicle, are analyzed heoreically in deail. The full-bridge and half-bridge converers are mosly used in high power applicaions. In boh converers, he inpu volage appears across he swiching ransisors. However, hey are required o carry wice as much curren in he half bridge converer. Therefore, in high power applicaions, i may be advanageous o use a full bridge over a half bridge. Efficiency, power densiy, reliabiliy, and cos are imporan for he swiched mode power supply marke. The effor o obain ever-increasing power densiy of swichedmode power supplies has been limied by he size of passive componens. Operaion a higher frequencies considerably reduces he size of passive componens, such as ransformers and filers. In order o achieve converers wih high power densiies, i is usually required ha hey operae a higher swiching frequencies, However, he high ransisor swiching frequencies increase he oal swiching loss and lower he supply efficiency. As swiching frequencies increase, he swiching losses associaed wih he urn-on and urn-off of he devices also increases. Therefore, zero volage or zero curren swiching opologies allow for high frequency swiching while minimizing he swiching loss. The ZVS opology operaing a high frequency can improve he efficiency and reduce he size and cos of he power supply resuling in higher power densiies. ZVS also reduces he sress on he semiconducor swich, which improves he converer reliabiliy. The Phase-Shifed ZVS Full Bridge DC/DC Converer has become a very popular opology due o above advanages. [3]- [33]analyzed he operaion of he phase shif full bridge (PSFB) ZVS dc-dc converer. The major problems are he high circulaing curren during normal operaion, hard swiching on he secondary side and ligh load efficiency. In addiion, due o duy cycle loss problem, he effecive duy cycle is even smaller. More conducion loss deerioraes he efficiency. 8

29 On he oher hand, alhough sof swiching is achieved a he primary side, hard swiching problems sill remain for he secondary side devices. Swiching loss and volage sress of secondary side devices are severe issues. A ligh-load condiions, ZVS may be los. Thus, he efficiency under ligh loads is anoher concern. To reduce swiching losses and allow high-frequency operaion, resonan swiching echniques have been developed. In swich-mode PWM power supplies, he swiching losses can be high enough ha hey prohibi he operaion of he power supply a very high frequencies, even when sof-swiching echniques are used. In resonan-mode power supplies, however, he swiching losses can be lower, allowing he resonan converer o operae a higher frequencies [34]-[35]. Therefore, he use of resonan converers remains an ineresing opion for some applicaions requiring high efficiency, high reliabiliy, high power densiy and low cos. These echniques process power in a sinusoidal manner and he swiching devices are sofly commuaed. Therefore, he swiching losses and noise can be dramaically reduced. For convenional PWM converers, LLC resonan converer becomes he mos aracive opology for medium power applicaions due o is high efficiency and wide inpu range. In general, LLC resonan converer can be employed in all applicaions wih variable inpu and oupu volages, demand of high efficiency and power densiy as well as low EMI. I exhibis superior performance, such as low swiching loss and low volage sress on he secondary side recifiers, as well as higher efficiency, han PWM converers. LLC resonan converers can achieve ZVS from zero load o full load condiions. The LLC resonan ank can be considered as a band pass filer, bu he frequency seleciviy of he LLC ank is poor. For a resonan ank, working a is resonan frequency is he mos efficien way. Due o very wide bandwidh, he frequency has o be increased very high o achieve enough volage gain conrollabiliy. However, his is no pracical for DC-DC converers due o he limiaion of driving circuis and he excessive swiching & driving losses. Alhough here are some disadvanages in hese wo kinds of converers, hey are widely used in high power applicaion. Nex, he convenional phase shifed full bridge converer and LLC converer will be discussed in deail in he following secions. 9

30 . Phase Shifed Full Bridge Converer When convenional PWM converers are operaed a higher frequencies, he circui parasiics are shown o have derimenal effecs on he converer performance. Swiching losses are especially pronounced in high-power, high-volage applicaions. To achieve ZVS, he wo legs of he bridge are operaed wih a phase shif. This operaion allows a resonan discharge of he oupu capaciance of he MOSFETs, and, subsequenly, forces he conducion of each MOSFET s ani-parallel diode prior o he conducion of he MOSFET. I provides ZVS for he swiches by using he leakage inducance of he ransformer and he oupu capaciance of he swiches. I has a somewha higher rms curren han he convenional full-bridge PWM converer, bu has much lower rms currens han he resonan converers. The ZVS allows operaion wih much reduced swiching losses and sresses, and eliminaes he need for primary snubbers. I enables high swiching frequency operaion for improved power densiy and conversion efficiency. These advanages make his converer well suied for high-power, high-frequency applicaions... Topology Descripion S 3 D 3 S D G V in A i p B G S 4 D 4 S D G 3 L lk TR v sec i o L o C o R o V o G 4 v AB v sec (a) Circui configuraion (b) Key operaing waveforms Fig.. Phase-shifed Full bridge converer Phase shif full bridge converer shown in Fig.., as one of he mos promising opology for high frequency, high power applicaion, has many good characerisics. I is a sof swiching converer. All four swiches on primary side can achieve Zero Volage Swiching (ZVS) wih proper design. This is very helpful for high frequency operaion. This opology has lower vol-sec on he oupu filer inducor. Phase shif full bridge can

31 achieve smalles vol-sec for same design specificaion compared wih wo-swich forward and half bridge converer. Anoher benefi of phase shif full bridge is is capabiliy o cover wide power range. For power from several hundred was o kilowas, full bridge converer can perform very well. In recen years, even for low power applicaion like Volage Regulaor Module, full bridge opology has been invesigaed and showed benefis. S & S4-ON S & S3-ON S & S4-ON S & S3-ON S & S4-ON Full bridge opology swiching conrol Transformer primary winding volage S -ON S -ON S -ON Phase shifed FB-ZVS PWM DC/DC converer swiching conrol S -ON S -ON S3 -ON S3 -ON S4 -ON S4 -ON Fig.. The difference beween regular Full Bridge and PH-Full Bridge ZVS PWM DC/DC converer opologies conrol swiching The convenional full-bridge opology is swiched off under hard swiching condiions where swich volage sress is also high. The convenional full bridge opology has been modified in wo ways o achieve ZVS. Firs, modulaion is done by phase shifing wo overlapping consan frequency square waves by using leading-leg and lagging-leg. Second, ZVS is achieved o minimize or reduce he swiching losses. The primary difference beween his opology and he radiional full-bridge opology is swiching mehod as shown in Fig... In conras o urning on he diagonally opposie swiches of he bridge simulaneously (i.e. S & S4, S & S3), a phase shif is inroduced beween he swiches in he lef leg (lagging-leg S3 & S4) and hose in he righ leg (leading-leg S & S). The phase shif deermines he operaing duy cycle of he converer. The DC bus volage is applied o ransformer primary and power is ransferred when wo diagonal MOSFETs are on

32 simulaneously. When wo high side swiches or wo low side swiches are on simulaneously (called freewheel sae) he ransformer primary is shored. This resuls in zero volage across primary and secondary. The ransformer primary curren rising edge slope as well as he falling edge slope reduces he duy cycle of he secondary volage. This reduces he oupu volage of he DC/DC converer so ransformer urns raio is effeced and hence he secondary side power devices volage. L lk and L o affec his so heir values should be seleced properly and effec should be analyzed... Operaing Modes The schemaic and operaing waveforms of phase shif full bridge converer are repeaed in Fig..3. Based on his, operaing modes are given. S 3 D 3 S D G V in A i p B G S 4 D 4 S D G 3 L lk TR v sec i o L o C o R o V o I I peak I S 4 D i p D3 D S S 3 v sec S 3 D G 4 v AB D4 D S S 4 (a) Circui configuraion (b) Key operaing waveforms Fig..3 Phase-shifed Full bridge converer ) A ime S 4 urns off, S 3 urns on, and S remains on. The equivalen capacior C s3 of S 3 ges sinusoidal discharged and he equivalen capacior C s4 of S 4 ges sinusoidal charged by he leakage inducor (L lk ) curren which is relaively small. Thus, hese wo capaciors C s3 and C s4 are much harder o ge fully charged and discharged. S 3 and S 4 are much harder o be urned on a zero-volage condiion. These wo swiches S, S form he lagging leg in he circui. The 4 diodes a he secondary side conduc. The ransformer is shored.

33 S 3 D 3 C s3 S D C s i p V in S 4 A D 4 i p C s4 B S D C s L lk TR v sec L o C o R o V o AB S3 S D D 3 4 D S S D 4 3 D D v sec S S4 v Fig..4 Mode: a ime ) A inerval ~ The equivalen capacior of S 3 ges fully discharged and he equivalen capacior of S 4 ges fully charged. To make sure he equivalen capaciors ge fully charged and discharged, i requires a period of ime during which boh S 3 and S 4 are off. The period is called dead ime. The body diode D 3 of S 3 is on, which can make S 3 urn on a zero-volage condiion. The 4 diodes a he secondary side are sill conducing. The ransformer is sill shored. S 3 V in S 4 A D C s3 3 i p D 4 C s4 S S L lk B TR D D v sec C s C s L o C o R o V o i p AB S3 S D D D S S D 3 D S D S4 v sec v Fig..5 Mode: a inerval ~ 3) A inerval ~ 3 L lk is charged. The primary curren swiches from D -D 3 o S 3 -S. The 4 diodes a he secondary side are sill conducing. The ransformer is sill shored. 3

34 S 3 V in S 4 A D 3 D 4 C s3 i p C s4 S S L lk B TR D D v C s C s sec L o C o R o V o i p AB S3 S D D D S S D 3 D S D S4 v sec v Fig..6 Mode3: a inerval ~3 4) A inerval 3 ~ 4 L lk keeps charged. The oupu inducor L o ges charged and he volage a he secondary side v sec builds up. The energy is ransferred o oupu load. This is power processing sage. The diodes a he secondary side are conducing. S 3 V in S 4 A D C s3 3 i p D 4 C s4 S S L lk B TR D D v sec C s C s i o L o C o R o V o i p AB S3 S D D D S S D 3 D S D S4 v sec v Fig..7 Mode4: a inerval 3 ~ 4 5) A inerval 4 S is urned off, S is urned on and S 3 is sill on. The equivalen capacior (C s ) of S ges linear discharged and he equivalen capacior (C s ) of S ges linear charged by he oupu inducor (L o ) curren which is relaively large. Thus, hese wo capaciors C s and C s are much easier o ge fully charged and discharged. S and S are much easier o be urned on a zero-volage condiion. These wo swiches S, S form he leading leg in he circui. The volage a he secondary side v sec drops. The circui is going o freewheeling sage from power processing sage. The diodes a he secondary side are conducing a his momen. 4

35 S 3 V in S 4 A D 3 D 4 C s3 i p C s4 S S L lk B TR D D v sec C s C s i o L o C o R o V o i p AB S3 S D D D S S D 3 D S D S4 v sec v Fig..8 Mode5: a ime 4 6) A inerval 4 ~ 5 The equivalen capacior of S ges fully discharged and he equivalen capacior of S ges fully charged. To make sure he equivalen capaciors ge fully charged and discharged, i requires dead ime beween S and S. The body diode D of S is on, which can make S is urned on a zero-volage condiion. The volage a he primary side v pri is clamped o zero. The 4 diodes a he secondary side are conducing. S 3 V in S 4 A D C s3 3 i p D 4 C s4 S S L lk B TR D D v sec C s C s L o C o R o V o i p AB S3 S D D D S S D 3 D S D S4 v sec v Fig..9 Mode6: inerval 4 ~ 5 In order o avoid shoo hrough and ensure ha S4 will urn-on wih ZVS a dead ime is needed beween he urn-off of S3 and urn-on of S4 and also make sure ha diode D4 has sared conducing. The resonance beween L lk, C s (C s3 //C s4 ) and C r provides sinusoidal volage across S3 and D3 and his volage peaks a one fourh of he resonan period. π τ peak = T = Llk ( Cs3// Cs4// Cr ) (.) 4 5

36 ..3 ZVS Process Zero-volage urn-on is achieved by using he energy sored in he leakage and series inducance of he ransformer o discharge he oupu capaciance of he swiches hrough resonan acion. In order o achieve ZVS urn-on he energy sored in he leakage and series inducance has o be larger han he energy sored in he oupu capaciances. The resonance forces he body diode ino forward conducion prior o gaing on he swich. Two differen mechanisms exis which provide ZVS for he lagging-leg and leading leg. a. ZVS for Lagging Leg I p i p I I S 3 vab D 3 DT ( /) T / d d Fig.. Deail of he rising edge of he volage across he swich of lagging leg where (a) corresponds o he limi case when he energy in L lk is equal o he energy required o charge he capaciances. (b) corresponds o he case when he energy in L lk is larger han he energy required o charge/discharge he capaciors. The swich oupu capaciances are charged/discharged in less han one fourh of he resonan period, and he volage is clamped o he inpu volage. (c) corresponds o he case when he energy in L lk is no sufficien o charge/discharge he oupu capaciances, and ZVS is los. During ligh loads, very lile energy is sored in he primary side inducance L lk (can be sum of he ransformer leakage inducance and exernal inducance in series wih he primary of he ransformer). This causes he lagging-leg o urn on under a hard swiching condiion which can be seen from Fig.. (c) and Loss of ZVS means exremely high d ( a ) ( b ) ( c ) 6

37 swiching losses a high swiching frequencies and very high elecromagneic inerference (EMI) due o he high di/d of he discharge curren. Loss of ZVS can also cause a very noisy conrol circui, which leads o shoo-hrough and loss of he semiconducor swiches. As he load increases he energy sored in inducor L lk increases. This energy is used o charge he oupu capaciance of he devices ha are urning off, and o discharge he oupu capaciance of he complemenary device, hus forward biasing he freewheeling diode. Full oupu capaciive discharge is necessary o cause he lagging-leg o sar urning-on under he ZVS condiion. The urn-off under he ZVS condiion closely mimics ha of resisive urn-off. A swich wih low oupu capaciance helps o achieve ZVS process a ligh load, improving he efficiency. Hard swiching occurs when he oupu capaciance of he swich requires more energy han is available in he inducance L lk o fully charge and discharge he swiches. And he energy sored available o urn on lagging-leg he diode is very small so is conducion ime is very small even a full load. The energy sored in L lk increases by a square law as load curren increases. Therefore, he sored energy in L lk increases rapidly a loads higher han he minimum load required for ZVS. The large amoun of available charging energy causes he swich drain-source volage o rise and fall a a linear rae. To achieve sof urn-on and urn-off of he lagging leg, he following equaion should be saisfied. LI lk > ( Cs3 Cs4) Vin CV r in (.) Where C s3, C s4 is effecive oupu capaciance of he power swiches S 3, S 4 respecively. I is Primary ransformer curren a urn-on and urnoff for S 3 &S 4. C r is ransformer winding capaciance. Thus, he criical load a which ZVS is los is I ZVS C // C C s3 s4 r = Vin (.3) Llk To make sure no o lose ZVS, he leakage inducance is adjused o obain a desired value of I ZVS 7

38 The lagging leg swich ransiion occurs due o resonance. The primary curren during his ransiion is sinusoidal wih peak ampliude occurring a he sar. C s (C s3 //C s4 ) and L lk form he resonan ank and is oscillaing frequency is given as follows. ω r = (.4) L C C ( // ) lk s3 s4 There mus be enough ime o ge he oupu capacior of he o-be urned on swich fully discharged o make sure he swich can operae a ZVS condiion. Meanwhile, he discharge ime should no be oo long in case of anoher oscillaing cycle sars, which is clear in Fig.. (b). The maximum discharge is a ¼ of he period as follows, which is also graphically shown in Fig.. (a). max π d = T = Llk ( Cs3// Cs4 // Cr) (.5) 4 b. ZVS for Leading Leg For he leading-leg swiches (S& S), a differen process provides he ZVS as explained below. Before S urns off, he curren in he primary reaches is peak value of he refleced filer inducor (L o ) curren. When S is urned off, he energy available o charge he oupu capaciance of S and o discharge he oupu capaciance of S is he sum of he energy sored in he oupu filer inducor Lo and he primary side inducor L lk. The energy sored in filer inducor L o is available because he filer inducor curren does no freewheel hrough he diode unil he volage across he secondary has fallen o zero. I p i I p I S vab D DT ( /) T / d Fig.. Deail of he rising edge of he volage across he swich of leading leg Accordingly, for sof urn on and urn-off of he leading leg he following equaion should saisfy. 8

39 ( Lo _ p Llk ) I > ( Cs// Cs) Vin CrV (.6) in wherec s, C s is effecive oupu capaciance of he power swiches S, S respecively. I is Primary ransformer curren a urn-on and urnoff for S &S. C r is ransformer winding capaciance. L o_p is he oupu filer inducance referred o primary. Since he sored energy in he oupu filer inducor is large when compared o ha required o charge and discharge he oupu capaciances of he leg and capaciance of he ransformer windings, he swich capaciance is charged and discharged a a linear rae. The resuling leading leg ransiion ime in liner ramp is given as dv Where I = Cs or d = C d dv dv I = Cs or d Cs d = I (.7) s dv I dv = V in, which is inpu o he bridge and d is swich ransiion ime. In his mode, even a ligher loads, much more sored energy is available o urn-on and urn-off he leading-leg swiches han is available for he lagging leg swiches. Therefore, he body diode in he leading leg urns on before he MOSFET is gaed on even a ligh loads. Since he energy sored in oupu filer is so high ha a small snubber capacior can be pu across leading leg swiches and hese devices can be urned off under real ZVS condiion. This will reduce he urn-off loss of hese swiches. The leading leg free-wheeling diode (FWD) conducion duy cycle is higher han lagging led diodes so leading-leg diodes will also dissipae a fair amoun of power...4 Relaion beween Duy Cycle, Transformer Turns Raio and Swiching Frequency Fig.. shows he relaionship beween duy cycle, ransformer urns raio and swiching frequency for he phase-shifed full bridge converer. NVo Dsec = Vin Deff = Dsec = Dpri ΔD Vin T 4L Δ lk D = ( I I) / = Dsec f Llk N Ro s (.8) 9

40 where N is he primary-o-secondary urns raio; D eff is effecive duy cycle on he secondary, ha is D sec ; Δ D is called duy cycle loss. Increasing L lk or f s will increase Δ D. And since ΔD canno exceed Dsec and D sec Δ D< D pri _ max <, here is a limi on he swiching frequency. Alhough some drawbacks for phase shif full bridge, i is sill a popular opology. Is capabiliy o operae a high frequency and wide power range enable i o be used for muli applicaions. I p I I Vin / N V slope = NL o i p slope = Vin / Llk AB o o Vo slope = NL v DT ( /) T / ( T /) Fig.. Relaion beween duy cycle, ransformer urns raio and swiching frequency..5 Disadvanages of Phase-shifed Full Bridge Converer Deff ΔD( T/) I p I I Vin / N V slope = NL slope = V / L f o in lk V slope = NL o f Circulaing curren v AB = C // C C s3 s4 r I IZVS Vin Llk i p DT ( /) Deff ΔD( T/) T / ( T /) 4L lk sec s N Ro Δ D = D f Fig..3 Key waveforms and formula of convenional PSFB converer ZVS FULL-BRIDGE opology is he mos popular opology used in he power range of a few kilowas ( 5 kw) for DC/DC converers [3]. Since he swich raings are opimized for he full-bridge opology, his opology is exensively used in indusrial applicaions. High efficiency, high power densiy, and high reliabiliy are he prominen feaures of his opology. Bu since ZVS in convenional full-bridge pulse widh modulaion (PWM) converers is achieved by uilizing he energy sored in he leakage 3

41 inducance o discharge he oupu capaciance of he MOSFETs, he range of he ZVS operaion is highly dependen on he load and he ransformer leakage inducance. I is difficul o design a wide-operaion-range PWM converer wih high efficiency. According o he key waveforms shown in Fig..3 of he phase-shifed full bridge converer, he disadvanages are summarized as follows. I is no able o ensure ZVS operaion a ligh loads. In baery charger applicaions, ZVS is vially imporan since he converer migh be operaing a absoluely no load for a long period of ime. In his applicaion, when he baery is charged, he load is absoluely zero, and he converer should be able o safely operae under he zero-load condiion. The magniude of L lk of he ransformer deermines he ZVS load range and he ZVS range can be exended by increasing he leakage inducance L lk. Since L lk limis he rising and falling imes of he primary currens, he available duy cycle in he secondary is reduced. A large leakage inducance limis he power ransfer capabiliy of he converer and reduces he effecive duy raio of he converer. This limis he maximum L lk o be used in a paricular design. The ransformer urns raio N s /N p can be maximized o reduce he volage sress of he recifiers. However, increasing N s /N p reduces he primary curren and consequenly increases he value of he L lk required for achieving a desired ZVS range. There is a limi on he swiching frequency. Increasing he swiching frequency also increase he duy cycle loss. I has high circulaing curren during normal operaion. During every swiching cycle, here is a ime inerval during which wo up swiches or low swiches are urned on a he same ime. This will shor he ransformer primary side. During his ime inerval, secondary is freewheeling and no energy ransfer from inpu o oupu. Primary curren during his period is prey high. This curren circulaes hrough he primary wo swiches and ransformer winding. This primary circulaing curren will increase conducion loss and should be minimized o achieve high efficiency. The smaller he duy cycle, he higher circulaing curren will be. 3

42 Due o ZVS operaion he primary side waveforms are free from swiching noise and require no snubber. The secondary volage waveform for a high oupu volage (36 V) has a subsanial ringing due o he reverse recovery of he diodes. The ringing frequency is usually oo close o he swiching frequency which makes i difficul o snub he ringing effecively using a RC snubber. An energy recovery snubber nework is employed o keep he snubber loss below % of he oupu power..3 LLC Resonan Converer Fig..4shows he circui configuraion of half bridge LLC resonan converer.wih variable frequency conrol, he volage gain of LLC resonan converer can be conrolled as boos mode or buck mode. During he holdup ime, he LLC resonan converer can operae in boos mode. Thus, high volage gain is achieved, which means ha bulky capaciors can be reduced considerably. Meanwhile, a he nominal condiion, he LLC resonan converer operaes very close o he resonan frequency, which is he bes operaion poin o accomplish high efficiency. In addiion, volage gains of differen Q converge a he series resonan poin. The LLC resonan ank parameers can be opimized o achieve high efficiency for a wide load range. The LLC resonan converer is considered as one of he mos desirable opologies for wide inpu volage range. Square wave generaor LLC S Resonan nework Recifier nework Volage load V in S V d C r i r L r L m N p TR Ns v ac C o Ro V o Fig..4 Half Bridge LLC Resonan Converer LLC resonan converer has small swiching loss. In LLC resonan converer, magneizing inducor curren is used o realize ZVS and ZVS can be achieved from he zero load o he full load condiions wih small urnoff curren. Therefore, zero urn-on loss and small urn-off loss can be achieved. Furhermore, secondary side diode of LLC resonan converer urns off wih low di/d. Thus, reverse recovery loss can be small on 3

43 secondary side. Combining smaller swiching loss on boh primary and secondary side, LLC resonan converer efficiency is no sensiive o he swiching loss and he circui is able o achieve high swiching frequency operaion. Suppose N / N =, by using he same previous mehod discussed before, he p s equivalen circui for LLC in Fig..5 can be obained and he volage gain, M, can be derived. V in L r C r V o V d L m v ac V o Fig..5 Equivalen Circui for Half Bridge LLC Resonan Converer By using he equivalen load resisance, he LLC AC equivalen circui is obained, as illusraed in Fig..6 (a) and Fig..6 (b) shows how o obain he equivalen load resisance, R ac. F v d L r C r L m R ac F v ac i ac (a) Primary side AC equivalen circui (b) Secondary side AC equivalen circui Fig..6 LLC Equivalen Circui v ac C o I o R o V o By using exacly he same mehod as ha applied in SRC, R ac F Vac 8 = = i π ac R o (Considering he ransformer urns raio ( n= N / N ), he equivalen load resisance is R ac F Vac 8n = = R ), and according o he LLC AC equivalen circui of Fig..6 (a), he o i π ac LLC volage gain, M, is obained as: p s M v 4 ω V ( m ) ω F V o o ac, pk o = = = π = F V / 4 V in vd, pk in ω ω ω π j ( m) Q ω p ωo ωo (.9) L where p Lr Z r Lp = Lm Lr, m =, Z r =, Q =, ωo =, ω p =. L C R LC L C r r ac r r p r 33

44 The gain curve is ploed in Fig..7 for differen Q values as follows. Gain(nVo/Vin) 3 Gain Curves of LLC Resonan Converer a Lpr/Lsr= Z r Q = R ac. f p = π ( Lr Lm) Cr f p Q increasing Ro decreasing f o fo = fr = π L C r r 3 5 Fig..7 Gain curves of half bridge LLC For his converer, here are wo resonan frequencies. One is deermined by he resonan componens L r and C r. The oher one is deermined by L m, C r and load condiion. As load geing heavier, he resonan frequency will shif o higher frequency. The wo resonan frequencies are: f o fs/fr = ; fp = π LC π L L C ( ) r r r m r (.) As observed in Fig..7, converer gain can be higher or lower han. The LLC resonan converer shows gain characerisics ha are almos independen of he load when he swiching frequency, f s, is around he resonan frequency, f o. This is a disinc advanage of LLC-ype resonan converer over he convenional series resonan converer. Therefore, i is naural o operae he converer around he resonan frequency o minimize he swiching frequency variaion. The DC characerisic of LLC resonan converer could be divided ino ZVS region and ZCS region as shown in Fig..8 (a). Wih his characerisic, i could be placed a he resonan frequency of f o a high inpu, which is a resonan frequency of series resonan ank of C r and L r. While inpu volage drops, more gain can be achieved wih lower swiching frequency. Wih proper choose of resonan ank, he converer could operae wihin ZVS region for load and line variaion. There are some ineresing aspecs of his DC characerisic. On he righ side of f o, his converer has same characerisic of SRC. On he lef side of f o, he image of PRC and SRC are fighing o be he dominan. A heavy 34

45 load, SRC will dominan. When load ge ligher, characerisic of PRC will floaing o he op. Wih hese ineresing characerisics, we could design he converer working a he resonan frequency of SRC o achieve high efficiency. Then we are able o operae he converer a lower han resonan frequency of SRC sill ge ZVS because of he characerisic of PRC will dominan in ha frequency range. From above discussion, he DC characerisic of LLC resonan converer could be also divided ino hree regions, region and region and Region 3, according o differen mode of operaion as shown in Fig..8 (b). Volage Gain (Vo/Vin) DC Characerisic of LLC Resonan Converer ZCS Region ZVS Region Q=. Q=.3 Q=.5 Q=.7 Q= Q= Q=3 Q=5 Volage Gain (Vo/Vin) DC Characerisic of LLC Resonan Converer Region 3 Region ZVS Region Region Q=. Q=.3 Q=.5 Q=.7 Q= Q= Q=3 Q= fs/fr ZCS Region fs/fr (a) (b) Fig..8 Operaing Regions for LLC Resonan Converer Volage Gain (Vo/Vin) Gain Curves of LLC Resonan Converer a Lm/Lr= 4 Q increasing Peak gain decreasing f o Q=. Q=.3 Q=.5 Q=.7 Q= Q= Q=3 Q=5 Volage Gain (Vo/Vin).5 Gain Curves of LLC Resonan Converer a Q=.33 m increasing Peak gain decreasing f o m=lm/lr m=3 m=4 m=5 m=6 m=7 m=8 m=9 m= fs/fo fs/fo (a) A given Lm/Lr (b) A given Q Fig..9 DC Characerisic of LLC Resonan Converer The operaing range of he LLC resonan converer is limied by he peak gain (aainable maximum gain), which is indicaed wih and conneced as he boundary of ZVS and ZCS in Fig..8 (a). I should be noed ha he peak gain does no occur a f o 35

46 nor f p. The peak gain frequency where he peak gain is obained exiss beween f p and f o, as shown in Fig..8 (a). As Q decreases (as load decreases), he peak gain frequency moves o f p and higher peak gain is obained. Meanwhile, as Q increases (as load increases), he peak gain frequency moves o f o and higher peak gain drops; hus, he full load condiion should be he wors case for he resonan nework design. And from Fig..9, i can be seen ha he volage gain is uniy a resonan frequency, f o, regardless of he Q or m variaion. The converer should be prevened from enering region 3 which is ZCS region, as illusraed wih one gain curve in Fig... Gain( M ) capaciive region peak gain inducive region ZCS region ZVS region Fig.. The swiching frequency vs. he peak gain frequency Above he peak gain frequency also called here inducive region, he inpu impedance of he resonan ank is inducive and he inpu curren of he resonan nework (i p ) lags he volage applied o he resonan ank (V d ). This permis he MOSFETs o urn on wih zero volage (ZVS). Meanwhile, he inpu impedance of he resonan ank becomes capaciive and he inpu curren of he resonan nework (i p ) leads he volage applied o he resonan ank (V d ). below he peak gain frequency also called here capaciive region. When operaing in capaciive region, he MOSFET body diode is reverse recovered during he swiching ransiion, which resuls in severe noise. Anoher problem of enering ino he capaciive region is ha he oupu volage easily becomes ou of conrol since he slope of he gain is reversed. Due o differen operaion mode of LLC resonan converer, is operaion principles are quie complex. According o is swiching frequency, LLC operaion modes can be separaed ino above, below and equal o he resonan frequency..3. Swiching Frequency Equal o Resonan Frequency For convenional resonan converers, such as SRC and PRC, i is desired o make he converer operae a he resonan frequency o maximize he circui efficiency. However, f s 36

47 when hese circuis operae on he lef hand side of resonan frequency, circuis work under zero curren swiching. To ensure ZVS operaion enough design margins has o be considered during design sage. Thus, he circui would no be able o operae a he opimal operaion poin. For LLC resonan converer, ZVS swiching can be achieved for he swiching frequency eiher higher or lower han he resonan frequency. Thus, here is no such requiremen for he design margin, and he circui is able o operae a he resonan frequency while achieving opimal efficiency. For he circui diagram shown in Fig.. (a), operaing principle a resonan frequency can be demonsraed in Fig.. (b) and he corresponding opological modes can be summarized as in Fig.. (c). V in S V d S C r i r L r L m i m N p i sec TR Ns D D 3 C o Ro V o V in S V d S C r L r ( ~ ) i sec N p Ns L m TR D D 4 C o Ro V o ( a) D D 4 V g _ s V g _ s V d V in S V d S C s C r C s L r ( ~ ) N p Ns L m TR C o Ro V o i r i m i sec 3 ( b ) ( c) (a) Topology; (b) Key waveforms; (c) Topological modes Fig.. LLC converer operaing a resonan frequency A inerval beween and, swich S is conducing. In his period, he resonan ank curren is larger han he magneizing inducor curren. According o he polariy of he ransformer, secondary diodes D and D 4 are conducing. Therefore, volage applied o he ransformer magneizing inducance is he oupu volage refleced o ransformer primary side. Thus, magneizing curren linearly increases. During his period, he difference beween he inpu volage and oupu volage is applied o he resonan ank, and resonan ank curren is a sinusoidal waveform. A ime, resonan ank curren reaches V in S V d S Cr L r ( ~ ) 3 N p L m TR isec Ns D D 3 C o Ro V o 37

48 magneizing curren and S urns off. A inerval and, secondary diodes are off, because he resonan ank curren is he same as magneizing curren and here is no curren ransferred o load. Due o he juncion capaciors of S and S, magneizing curren discharges he capaciors and help o achieve ZVS urn on of S. Boh S and S are off. This period is known as he dead-ime, which is used o allow enough ime o achieve ZVS, as well as preven shoo hrough of wo swiches. A ime, S urn on wih zero volage swiching. A inerval beween and 3, he difference beween he resonan ank curren and he magneizing inducor curren is ransferred o load. Afer 3, S is urn off and circui operaes ino anoher half cycle. A resonan frequency, LLC resonan converer is able o achieve ZVS urn on for he primary side swiches. Meanwhile, he swiching urn-off curren is maximum ransformer magneizing inducor curren. By choosing a suiable magneizing inducor, small urn-off loss can be realized. Moreover, secondary diodes urn off wih low di/d, which means smaller reverse recovery loss. Therefore, a resonan frequency, opimal performance of LLC resonan converer is expeced. A resonan frequency, he series resonan ank impedance is equal o zero. Therefore, he inpu and oupu volages are virually conneced ogeher. Thus, he volage gain a resonan frequency is equal o..3. Swiching Frequency Lower Than Resonan Frequency When he swiching frequency of LLC resonan converer is lower han he resonan frequency, magneizing inducor paricipaes in he circui operaion, which modifies he converer volage gain characerisics. The equivalen circui and key waveforms are shown in Fig.. and he opological modes are shown in Fig..3. S D D 3 V g _ s V g _ s (a) Topology (b) Key waveforms Fig.. LLC converer operaing a lower resonan frequency A inerval beween and, swiching S and diodes D and D 4 are conducing, and he converer deliveries energy o load. A ime, he resonan ank curren resonaes back i r V d V in S V d C r i r L r L m i m N p TR i sec Ns C o Ro V o i sec D 3 D 4 4 i m 38

49 wih a magniude equal o he magneizing curren. Afer ha, he magneizing inducor begins o paricipae in he resonance. Since he resonan curren is equal o magneizing inducor curren, he secondary diodes are urned off. A inerval beween and 3, S urns off and he magneizing inducor ransfers is sored energy o he resonan capacior. Therefore, in his operaion mode, he converer is able o boos he gain up. And he juncion capaciors C s, C s of he swiches ge fully charged and discharged before 3. Then resonan ank ransfers o he body diode of S. Thus S achieves ZVS urn on. A inerval 3 and 4, circui eners he oher half cycle. V in S S V d C r L r L m ( ~ ) N p TR Ns i sec D D 4 C o Ro V o V in S S V d C r L r L m ( ~ ) N p TR Ns C o Ro V o ( a) ( b) V in S V d S C s ( ) ~ 3 C r L r C s L m N p TR N s Fig..3 Topological modes for LLC converer operaing a lower resonan frequency.3.3 Swiching Frequency Higher Than Resonan Frequency D 4 C o R o V o When LLC resonan converer operaes wih swiching frequency higher han he resonan frequency, he circui operaes as a SRC circui. The equivalen circui and key waveforms are shown in Fig..4 and he opological modes shown in Fig..5, respecively. V in S S V d Cr L r L m ( ~ ) ( c ) ( d ) 3 4 N p TR isec Ns D D 3 C o Ro V o S D D 3 V g _ s V g _ s (a) Topology (b) Key waveforms Fig..4 LLC converer operaing a higher resonan frequency i r V d V in S V d C r i r L r L m i m N p i sec TR N s D D 4 C o Ro V o i sec 3 i m 4 39

50 A inerval and, swich S is conducing and he circui is ransferring energy o load hrough diode D and D 4. A ime, S is urned off. Because he swiching frequency is higher han resonan frequency, he resonan ank curren is higher han he magneizing curren. A inerval beween and, boh S and S are off, he resonan ank curren is charging and discharging he juncion capaciors of primary side swiches. A ime, volage on juncion capacior of swich S is discharged o zero. A inerval beween and 3, he body diode of swich S is urned on, he resonan ank curren decreases quickly. A ime 3, he resonan ank curren is equal o magneizing curren and diodes D and D 4 urn off. A inerval 3 and 4, S can be urned on wih zero volage swiching and diodes D and D 3 urn on and he circui begins o ransfer energy o load. In his operaion mode, ZVS swiching on primary side swiches can be guaraneed due o he large urn off curren. However, he large urn off curren generaes excessive urn-off loss on he primary side swiches. Moreover, he secondary side diode urns off wih large di/d, which can cause large reverse recovery on he diodes. Furhermore, he high di/d urn off of he diodes cause exra volage sress on he diode, which makes he circui less reliable. V in S V d S C r L r N p Ns L m TR i sec D C o Ro V o V in S V d S C s C r ( ~ ) ( ~ ) D 4 C s L r N p Ns L m TR i sec D D 4 C o R o V o ( a) ( b) Vin S Vd S C s C r L r L m ( ~ ) N p 3 TR Ns i sec D D 4 C o R o V o Fig..5 Topological modes for LLC converer operaing a higher resonan frequency From previous analysis, i can be seen ha LLC resonan converer is able o achieve a larger gain below resonance operaion, smaller above resonance operaion or equal o a resonance operaion. When he circui operaes a resonan frequency, he converer volage gain is equal o one, and circui operaes opimally. Operaion below he resonan V in S V d S Cr ( ~ ) 3 4 L r i TR sec N p Ns L m ( c ) ( d ) D D 3 C o Ro V o 4

51 frequency allows he sof commuaion of he recifier diodes in he secondary side, while he circulaing curren is relaively large. The circulaing curren increases more as he operaion frequency moves downward from he resonan frequency. Below resonance operaion also has a narrow frequency range wih respec o he load variaion since he frequency is limied below he resonan frequency even a he no-load condiion. Operaion above he resonan frequency allows he circulaing curren o be minimized, bu he recifier diodes are no sofly commuaed such ha he reverse recovery loss migh be severe. Above resonance operaion has less conducion loss han he below resonance operaion. However, operaion a above he resonan frequency may cause oo much frequency increase a ligh-load condiion..3.4 Design Consideraions of LLC Resonan Converer Since LLC resonan converer operaes wih swiching frequency higher han resonan frequency, he circui operaes as a SRC circui which canno demonsrae he benefis of LLC resonan converer. In his case, ZVS swiching on primary side swiches can be guaraneed due o he large urn off curren bu i is very difficul o regulae he oupu a ligh load. Therefore, he LLC resonan converer is always designed o operae a region, which is below or equal o he resonan frequency bu in ZVS region. a. Deermine Transformer Turns Raio n By choosing a suiable ransformer urns-raio, LLC resonan converer could operae wih resonan frequency a normal condiion and achieve high efficiency. Since a he resonan frequency, he converer volage gain is equal o. To allow LLC converer operaing wih resonan frequency a normal condiion, ransformer urns-raio in urn requires meeing he equaion n V V o = (.) in In his equaion, V o is he desired oupu volage, V in is he resonan ank inpu volage a normal operaion condiion, which is equal o he bus volage for full bridge srucure and is equal o half of he bus volage for half bridge srucure. b. ZVS Operaion In region, o achieve ZVS, here should be enough dead-ime during which boh swiches S and S are off and duy cycle loss occurs because no power is delivered o load. 4

52 Fig..6 shows how o ge enough dead-ime o guaranee ZVS, where C s and C s is he equivalen oupu juncion capaciance of S and S, respecively. V g _ s V g _ s S C s I v cs Lm _max nvo T = L 4 m i r v ds i m ( a) dead I Lm_max V in S v ds v cs C s ( b) i r I Lm _max Fig..6 Dead-ime requiremen To realize ZVS, he urn-off curren should be able o discharge and charge he juncion capaciors during dead-ime. I requires he urn-off curren is smaller han he maximum curren of he magneizing inducor, hus, ducs ducs nvo T Cs Cs = ir ILm_max = (.) d d Lm 4 So he dead-ime should mee ( ) 8L C C f (.3) dead m s s s c. Deermine Magneizing Inducance Given he dead-ime and swiching frequency, o achieve ZVS i requires he magneizing inducance o mee L m 8 dead T ( C C ) s s s (.4) Comparing wih series resonan converer, LLC resonan largely reduces he magneizing inducance. In his way, he magneizing inducor can be used o realize sof swiching for primary side swiches. Furhermore, he magneizing inducor paricipaes ino he resonance and modifies volage gain characerisic. Lm needs o be designed very properly. Swiching loss is a conrolled parameer. he urn-off curren of primary swiching is deermined byhe choice of resonan inducor L m.alarger L m can produce less magneizing curren and less circulaing energy, and RMS curren can be minimized. Bu a larger L m can lead o smaller aainable maximum volage gain, causing he oupu volage no able o be regulaed o mee he desired requiremens. d. Deermine he Raio L / L m r 4

53 While deermining he maximum gain (Aainable Maximum Gain), he raio m (m=l m /L r ) and Q need o be chosen properly. From Fig..7, i shows ha higher peak gain can be obained by reducing Q or m values. Wih a given resonan frequency (f o ) and Q value, decreasing m means reducing he magneizing inducance, which resuls in increasing circulaing curren. Accordingly, here is a rade-off beween he available gain range and conducion loss. However, once magneizing inducor is chosen, he relaionship beween Ln and Q has been fixed. From he definiion of mand Q, heir produc is Peak Gain Lr L C m r π fo mq i = i = Lm (.5) L R R r o o Peak Gain vs Q for Differen m Values L m = L m increasing Peak Gain decreasing m= m=.5 m=3 m=3.5 m=4 m=5 m=6 m=7 m=8 m= Q Fig..7 Peak Gain vs Q for differen m values Once converer specificaion is defined and swiching frequency is chosen, he produc of m and Q is only deermined by he magneizing inducor. Therefore, for he designed magneizing inducor, he produc of m and Q is se. Usually small m and large Q is preferred o ge narrower f s operaion range which can be observed from Fig..9. e. Maximum Operaion Gain The minimum swiching frequency should be well limied above he peak gain frequency, which can be referred o Fig..8. The available inpu volage range of he LLC resonan converer is deermined by he peak volage gain. Thus, he resonan ank should be designed so ha he gain curve has m r 43

54 an enough peak gain o cover he inpu volage range. However, ZVS condiion is los below he peak gain poin as depiced in Fig..8. Therefore, some margin is required when deermining he maximum gain o guaranee sable ZVS operaion during he load ransien and sar-up. Typically ~% of he maximum gain is used as a margin for pracical design, as shown in Fig..8. Gain( M ) max ~ % of M peak gain maximum operaion gain max ( ) M f o f s Fig..8 Deermining he Maximum Gain.3.5 Disadvanages of LLC Resonan Converer LLC is very aracive o overcome he issues of convenional circuis. Wih LLC resonan converer, performance a high inpu volage could be opimized and he converer sill could cover wide inpu volage range. Fig..9 illusraes he key characerisics and formula of half-bridge LLC converer under ZVS condiions. Operaion below he resonan frequency allows he sof commuaion of he recifier diodes in he secondary side, while he circulaing curren is relaively large. The circulaing curren increases more as he operaion frequency moves downward from he resonan frequency. Larger m leads o wider frequency range. To ge he frequency range narrower, m can be reduced. Decreasing m means reducing magneizing inducance, L m, which resuls in increased circulaing curren, hus, swiching loss and conducion loss will increase. And larger Lm means larger duy cycle loss because here is no power delivery during deadime. Since he produc of m and Q is fixed once Lm and swiching frequency are given, smaller m and larger Q is preferred o ge narrower frequency range bu resuls in smaller aainable peak gain. The problem wih swiching frequency lower han 44

55 resonan frequency is he conducion loss will increase as swiching frequency drops. Volage Gain (Vo/Vin) Gain Curves of LLC Resonan Converer a Lm/Lr= 4 Border line Q increasing Ro decreasing Peak gain decreasing f o Q=. Q=.3 Q=.5 Q=.7 Q= Q= Q=3 Q=5 Z Q = R r ac Volage Gain (Vo/Vin).5 Gain Curves of LLC Resonan Converer a Q=.33 m increasing Peak gain decreasing f o m=lm/lr m=3 m=4 m=5 m=6 m=7 m=8 m=9 m=.5.5 fo = π L C r r fs/fo Peak Gain (a) DC characerisics of half bridge LLC Peak Gain vs Q for Differen m Values L m = L m increasing Peak Gain decreasing Q fs/fo m= m=.5 m=3 m=3.5 m=4 m=5 m=6 m=7 m=8 m=9 (b) Peak Gain vs Q for differen m values and key formula for half bridge LLC Fig..9 Key characerisics and formula of HB LLC converer For same specificaion, L r and C r can have differen values, which will work. Alhough here is a limi on how small C r can be in order o keep Q reasonable, C r can be chosen larger, which makes smaller volage sress on C r, bu he impedance of he resonan ank will be small oo. Wih smaller ank impedance, he shor circui curren will be higher and higher swiching frequency is needed o limi he oupu curren, which will affec he shor circui performance. m r I Lm_max L m 8 nvo T = L 4 m dead T ( C C ) s s Lr L C m r π f mq i = i = L R R s ( ) 8L C C f dead m s s s r o o o L m 45

56 CH3: Hybrid Resonan and PWM Converer 3. Moivaions From he previous chaper, i can be concluded h a he phase shifed full bridge converer and LL C half-bridge resonan converer have heir own meris and deme r is, some of which are considered imporan for EV baery charger and summarized in Table 3., and none of he wo are perfec. Table 3.: Phase-Shifed Full Bridge vs. LLC Converers Consan Conrol ZVS Circulaing Oupu diode mehod range curren Curren and volage sress Volage Fixed Limied PS FB High Yes High frequency range Variable Full LLC Low No Low frequency range Noe: PS FB represens phase-shifed full bridge converer; LLC represens LLC converer. In baery charger applicaions, ZVS is vially imporan since he converer migh be operaing a absoluely no load for a long period of ime. In his applicaion, when he baery is charged, he load is absoluely zero, and he converer should be able o safely operae under he zero-load condiion. From his view, he phase-shifed full bridge converer is very hard o mee his requiremen. LLC seems a good candidae, bu he variable frequency conrol makes i very complicaed o handle all he condiions, and i is no easy o regulae he oupu curren, which canno mee he consan curren charging requiremen for EV baery charger. So, wha if hey are hybrid ogeher? Le LLC operae a fixed frequency very close o he resonan frequency, which is he bes operaing poin o accomplish high efficiency. I can achieve ZVS from zero load o full load which is very vial in he baery charger sysem. I seems a good idea o make LLC solve sof swiching problem and make he phase-shifed full bridge converer adjus he oupu volage and he power levels. 3. Proposed Hybrid Resonan and PWM Converer A novel Hybrid Resonan and PWM Converer in Fig.3.is presened o keep he advanages of high efficiency and small oupu inducance. The major feaures of he 46

57 hybrid resonan and PWM converer are as follows: ) zero-volage swiching of MOSFETs in he leading-leg can be achieved from rue zero o full load because of he parallel LLC resonan half-bridge configuraion; ) zero-curren swiching of IGBTs in he lagging-leg is realized in full line and load range wih minimum circulaing conducion loss due o effecively reseing of he parallel secondary-side consan DC volage source; 3) duy cycle loss is negligible since he ZVS operaion can be ensured even wihou he leakage inducance of he main ransformer; 4) conducion loss during he oupu inducor freewheeling inerval is significanly reduced because of no need for series diodes. S 3 S V rec V in TR TR S 4 S C 3 V o D D 3 D 5 C L o D D 4 D 6 D 7 C C o v rec R o V o Fig. 3. Hybrid Resonan and PWM Converer 3.3 Operaional Principles Fig.3. (a) show he circui diagram of he Hybrid Resonan and PWM Convererwhich composed of wo pars: ) he resonan half-bridge circui including wo MOSFETs S and S, loosely coupled ransformer TR, resonan capacior C 3, and he secondary recifier D 5, D 6, and C, C ; ) he phase shifed full-bridge circui including wo MOSFETs S and S as leading-lag, wo IGBTs as lagging-leg, ighly coupled ransformer TR, he secondary recifier D ~4, and D 7, and he LC oupu filer. The opology operaing principle can be explained by he gaing sequence and associaed key volage and curren waveforms shown in Fig.3. (b). Where C s, C s are he equivalen capaciance of he MOSFETs S, S, respecively; v rec is volage of he oupu inducor lef-side poin referred o he oupu ground; V o is he oupu volage; i pri and i pri are he primary curren of he ransformer TR and TR respecively; i Lm is he magneizing curren of he ransformer TR ; and he v ds is he device S drain-o-source volage. 47

58 S 3 V in S 4 D D S Llk ipri TR i pri S D 3 D 4 D 5 D 6 C S v ds C S i Lm D 7 L m Llk TR C C vrec L o C 3 C o R o V i pri i pri i o L m v ds (a) Circui configuraion (b) Key operaing waveforms Fig. 3. Hybrid Resonan and PWM Converer v GS v GS V v o rec S S S S 3 S 4 S 3 S 3 S Llk C S L m Llk [, ] S 3 S Llk C S L m Llk [, ] V in S 4 i i pri pri S TR TR C S C 3 V in S 4 i i pri pri S TR TR C S C 3 D D 3 D D4 D 5 D 6 D 7 C C vrec L o C o R o vo D D 3 D D4 D 5 D 6 D 7 C C vrec L o C o R o vo S 3 S Llk C S L m Llk [, ] 3 S 3 S Llk C S L m Llk [, ] 3 4 V in S 4 i i pri pri S TR TR C S C 3 V in S 4 i pri S TR TR C S C 3 D D D 3 D 4 D 5 D 6 D 7 C C vrec L o C o R o vo D D D 3 D 4 D 5 D 6 D 7 C C vrec L o C o R o vo S 3 S Llk C S L m Llk [, ] 4 5 S 3 S Llk C S L m Llk [, ] 5 6 V in i pri V in i pri i pri S 4 S TR TR C S C 3 S 4 S TR TR C S C 3 D D D 3 D 4 D 5 D 6 D 7 C C vrec L o C o R o vo D D D 3 D 4 D 5 D 6 D 7 C C vrec L o C o R o vo Fig. 3.3 Topological modes of he proposed converer in half swiching cycle 48

59 This Hybrid Resonan and PWM Converer combines he behavior of wo differen converer opologies: LLC half-bridge converer operaing a he load-independen resonan frequency which makes he circui operae a opimal condiion o achieve maximum efficiency and he consan frequency phase shifed full-bridge converer which is used o regulae he oupu by means of he phase shif. There are six disinc operaion modes for his opology in he PWM half cycle, as shown as Fig.3.3. Mode [, ]: A, Diode D 7 urns off since he secondary curren of ransformer TR reaches a he oupu inducor curren. Swiches S 3 and S remain on. Suppose he leakage inducance of he main ransformer is zero, ha is L lk =. Thus, he equivalen circui a his inerval is shown in Fig.3.4, as well as he key waveforms. i pri :n V in TR (a) v L o rec C o L i pri i x lk :n C3 i L Lm m C TR (b) R o v v o sec v GS v GS v v o rec i pri i pri i m v ds S S S S 3 S (c) Fig.3.4 (a), (b) The equivalen circui for Mode [, ]; (c) he key waveforms Clearly from Fig.3.4 (a), he refleced inpu volage applies o he lef-side of he oupu inducor called he recified volage, v rec, which can be expressed as v = n V (3.) rec where n is he secondary-o-primary urns raio of TR. v rec is he recified volage and V in is inpu volage shown in Fig.3.(b). The primary curren of he main ransformer reaches he refleced curren of he oupu inducor, L o, and increases wih he slope as di pri d in ( nv V ) ( L / n ) = (3.) in o o According o half bridge LLC characerisics, he v sec shown in from Fig.3.4 (b) can be expressed as 49

60 vsec = n V in (3.3) Suppose oupu capaciors, C and C, are large enough. Thus, he primary side of Fig.3.4 (b) can be simplified as Fig.3.6as follows. L lk C 3 i Lm i pri Lm i x V in Fig.3.5 The simplified circui for he primary side of Fig.3.4 (b) The magneizing curren i Lm can be simplified as a riangle wave wih a consan upward slope as follows. dilm Vin / = (3.4) d L where n are he secondary-o-primary urns raio TR. Thus, Lm m V / in ilm() = ilm( ) ( ) Lm i ( ) is he curren flowing he resonan capacior L m a. (3.5) Since he circui operaes a resonan frequency, where he volage gain is consan, a lile bi higher han uniy, which is independen of load and raio of m ( m= Lm / Llk, Lm is he ransformer magneizing inducance and L lk is he ransformer leakage inducance), L m can be relaively large as needed. Suppose oupu capaciors, C and C, are large enough. Then he secondary side of Fig.4 (b) can be simplified as Fig.3.6 as follows. ix / n n V in C / n 3 n L lk Fig.3. 6 The simplified circui for he secondary side of Fig.3.5 (b) 5

61 Suppose he volage across he resonan capacior C 3 a is Vc 3( ), he i x can be derived as follows by means of he Laplace model of he circui in Fig.3.5. [ V V ] in / c3( ) sin o ( ) ix = Z ω r (3.6) Thus, he auxiliary ransformer primary curren, i pri, which increases wih resonance beween he leakage inducor, L lk, and he resonan capacior, C 3, is given by where Z = L / C3 and o [ V V ] / ( ) i = sin ω ( ) i ( ) (3.7) in c3 pri r Lm Z o lk ω r =, Vc 3( ) is he volage across he resonan L C lk 3 capacior C 3 a. Mode [, ]: A, S is urned off by he PWM command, and he sum of wo ransformers primary curren will charge and discharge he MOSFET capaciors C s and C s, respecively. A, C s and C s can be fully discharged and charged under any oupu curren condiion due o load-independen magneizing curren i Lm. Wih C s being discharged, swich volage v ds sars falling. Under zero-load condiion which he worse case for his circui, he main ransformer (TR) primary curren is zero, i pri = and he auxiliary ransformer (TR) primary curren, i pri equivalen o i Lm, is designed o have he abiliy o fully charge and discharge he oupu capaciors of he swiches o guaranee he devices under ZVS condiion. V in S v ds C s v ds i = i pri Lm S L m C s Fig.3.7 The equivalen circui under zero load condiion (wors case) Fig.3.7 shows how he circui guaranees he devices under ZVS condiion only if he L m is designed well o guaranee he curren, i Lm discharge he oupu capaciors of he swiches., is big enough o fully charge and 5

62 In his case, L m is resonan wih C s //C s and he maximum resonan ime is a quarer of he swiching period. where ω = / L ( C C ) m m s s ( ) v = V cos ω ds in m The recified volage, v rec, sars falling o he valley as rec in (3.8) v = n V (3.9) Mode [, 3 ]: The body diode of S is on and swich S volage v ds keeps zero. The TR primary curren sars o be reseing effecively by he parallel secondary-side DC volage source produced by LLC half-bridge converer. The equivalen circui a his inerval is shown in Fig.3.8, as well as he key zoomed waveforms. i pri :n L lk TR (a) v L o rec C o R o v o v GS v GS vrec S S S 3 S 4 v o L i pri i x lk :n C3 i L Lm m C TR (b) v sec i pri i pri v ds 3 (c) i m Fig.3.8 (a), (b)the equivalen circui for Mode [, 3 ];(c) zoomed key waveforms From Fig.3.8, i can be seen ha he primary curren of he main ransformer decreases wih he slope as follows. dipri n V in L lk d n = (3.) Since L lk can be designed very small because here is no need o consider he radeoff resuling from L lk in his proposed circui, he reseing ime can be very shor. And he magneizing curren i Lm sars o decrease wih a consan slope as dilm Vin / d = L (3.) Mode [ 3, 4 ]: A 3, S can be urned on under zero-volage condiion by PWM m 5

63 command. The gae of S 3 remains on bu no curren flowing hrough S 3. Mode [ 4, 5 ]: A 4, he swich S 3 is urned off by PWM command under zero curren condiion since he ransformer TR curren keeps zero. During he inervals [ 3, 4 ] and [ 4, 5 ], he energy is sill being ransferred from inpu o he oupu even when he oupu inducor is freewheeling because he LLC half-bridge is working. Mode [ 5, 6 ]: A 5, IGBT S 4 is urned on. The TR secondary curren value sars increasing unil i arrives a curren level of he oupu inducor. The equivalen circui a his inerval is shown in Fig.3.9, as well as he key zoomed waveforms. i pri :n L lk V in L lk TR (a) i pri v L o rec C o :n C3 i L Lm m C (b) TR R o v v Fig.3.9 (a), (b) he equivalen circui for Mode [ 5, 6 ]; (c) zoomed key waveforms From Fig.3.9, i can be seen ha he slope of he TR primary curren can be simply expressed as dipri n n Vin = (3.) d n L lk where n and n are he secondary-o-primary urns raio of TR and TR respecively; L lk is he primary leakage inducance of TR and i pri is he primary curren of he main ransformer TR. Duy cycle loss occurs during his inerval. This proposed circui can have he poenial o ge very small duy cycle loss because he leakage inducance of he main ransformer is independen of he zero-volage-swiching and can be minimized. 3.4 Design Consideraions 3.4. Transformers Turns Raio i x o sec v GS v GS vrec i pri i pri v ds S S S 3 S 4 v i m 3 4 (c) o

64 According o he volage-second balance across he oupu inducor and he secondary recifier volage waveform shown in Fig. 3., we can obain ( nv - V ) D = ( V - n V ) (- D ) (3.3) whered eff is he effecive duy cycle. in o eff o in eff nv V rec in V o nv in Fig.3. The secondary recifier volage waveform Then, he seady sae volage gain in coninuous conducion mode can be described as V / V = D ( n - n ) n (3.4) o in eff where n < n. This equaion shows ha he volage gain varies beween n (when D=) and n (when D=) as illusraed in Fig.3.. V / V o in n Fig.3. Volage gain vs. effecive duy cycle Therefore, he secondary-o-primary urns raio n of TR and n of TR should be chosen as n V / V = (3.5) o,max in,min n V / V = (3.6) o,min in,max 3.4. ZVS under True Zero Load condiion I can be seen from opology mode [, ] shown in Fig. 3.3 ha he half-bridge and full-bridge are in parallel during he leading leg ransiion. The ZVS energy and ime condiions can be saisfied from rue zero o full load because he peak value of magneizing curren in he auxiliary ransformer is independen of he oupu volage and oupu curren as follows. I L m n = V / f (3.7) in _ peak 4 L m eff D s 54

65 where I Lm_peak is he peak magneizing curren of he auxiliary ransformer TR, L m is he magneizing inducance of he auxiliary ransformer TR, f s is swiching frequency. Equaion (7) shows ha he magneizing inducance, L m, should be designed well o ge lower conducion loss under ZVS condiion. To guaranee ZVS under no load condiion, he urn-off curren should be able o discharge and charge he juncion capaciors during dead-ime as illusraed in Fig.3.. V in S v ds C s v ds i off S i Lm _ peak C s Fig. 3. ZVS condiion under no load I requires he urn-off curren is smaller han he maximum curren of he magneizing inducor, hus, dvds dvds Cs Cs = ioff ILm_ peak (3.8) d d So he dead-ime should mee ( ) 8L C C f (3.9) dead m s s s where dead is dead ime. Equaions (3.7) and (3.9) show ha magneizing inducance selecion L m is a radeoff beween he minimum dead ime limiaion for ZVS under no load condiion and he curren sress of MOSFETs Duy Cycle Loss From Fig.3.3 and he opology mode [ 5, 6 ] shown in Fig.3.3, he duy cycle loss seen by he oupu inducor can be derived as Δ D = loss n LlkIo fs ( ) n n V in (3.) where I o is he oupu curren. I is clear from he equaion (3.) ha if L lk is close o zero, he duy cycle loss is close o zero. Here, L lk can be designed very small because he zerovolage-swiching range is independen of he value of L lk in his circui. 55

66 nv in V in nv in v rec v pri i pri ΔD loss ( Ts /) Trese T ZCS T s / Fig. 3.3 Waveforms of recified volage v rec, main ransformer TR primary volage v pri and main ransformer TR primary curren i pri Transformer Magneizing and Leakage inducance The fundamenal purpose of any magneic core is o provide an easy pah for flux in order o faciliae flux linkage, or coupling, beween wo or more magneic elemens. I serves as a "magneic bus bar" o connec a magneic source o a magneic "load". In a rue ransformer applicaion, he magneic source is he primary winding -ampere-urns and vols/urn. The magneic "load" is he secondary winding (or windings). The flux hrough he core links he windings o each oher. I also enables elecrical isolaion beween windings, and enables adapaion o differen volage levels by adjusing he urns raio. Ideally, a ransformer sores no energy, bu ransfers energy immediaely from inpu o oupu. In a pracical ransformer, undesired sored energy does occur in parasiic leakage inducances (ouside he core), and magneizing inducance (wihin he core). Energy sorage in a ransformer core is an undesired parasiic elemen. Wih a high permeabiliy core maerial, energy sorage is minimal. Magneizing inducance is maximized by using a gapless, high permeabiliy core maerial. a. Magneizing and Leakage inducance of Main Transformer TR The larger magneizing inducance is, he less energy sorage in a ransformer core is and he less circulaing curren is, hus, he main ransformer magneizing is beer designed very large. In his circui, zero-volage-swiching range is independen of he value of L lk. Thus, he opimal is making he leakage inducance very small. How o ge i desired? The magneizing inducance and leakage inducance of he main ransformer can be designed naurally. The magneizing inducance can be designed well by using a gapless, high permeabiliy core maerial o ge i as large as possible. The leakage inducance can be reduced by exensive inerleaving of primary and secondary windings 56

67 as shown in Fig.3.4, where MMF is magneo- moive force or Ampere urns and M is number of primary secondary inersecions. The main ransformer leakage inducance, L lk, can be expressed analyically as follows. N l L h h M M w lk = μ o p M b 3 P = = w Δ (3.) If h Δ h p, ransformer leakage inducance is approximaely L l h N = (3.) lk w w μ o 3bw M where h Δ is heigh of primary-secondary inersecion; hp is heigh of P h winding porion; hw is oal heigh of ransformer winding; l w is mean urn lengh; bw is breadh of winding; M is number of primary secondary inersecions; N is number of winding urns; μ is permeabiliy of free space. From (3.) and (3.), i is clear ha he exensive inerleaving of primary and secondary windings, as required in high-power low-volage ransformers, will lead o very small sored energy in ransformer leakage inducance. Furhermore, i becomes clear ha, wih leakage inducance being proporional o he squared number of urns N, he few primary urns of low volage high-power ransformers have inherenly exremely small leakage inducance. M= (a) Wihou inerleaving MMF (b) Single inerleaving MMF MMF (c) Double inerleaving (d) Quadruple inerleaving Fig. 3.4 Alernaive ransformer winding configuraions MMF 57

68 b. Magneizing and Leakage inducance of Auxiliary Transformer TR Firs, le us go over he design consideraions of LLC a resonan frequency which is he bes operaing poin o ge highes efficiency. From Fig.3.5, i can be seen ha he volage gain of LLC keeps consan while operaing a resonan frequency regardless he variaions of m or Q. Thus he par of LLC design becomes very easy. The LLC design a resonan frequency is simplified a lo because only he bes operaing poin is considered, hus here is no rade-off o be considered during design. Volage Gain (Vo/Vin) Gain Curves of LLC Resonan Converer a Lm/Lr= 4 Border line Q increasing Ro decreasing Peak gain decreasing fs/fo (a) Fig.3.5 DC characerisics of half bridge LLC A full load, a reasonable Q mus be se o make sure here is some margin o guaranee sable ZVS operaion since he swiching frequency is no exacly he same as he resonan frequency, pracically a lile bi lower han resonan frequency. For L m, using his formula L f o m Q = 8 dead T ( C C ) s s s o guaranee ZVS realizaion, Lm can be larger under his condiion in he hybrid converer because here is no need o consider frequency range where he converer operaes a fixed frequency. Since he volage gain is independen of m (m=l m /L r ), he raio of magneizing inducance and leakage inducance of he LLC ransformer, L r is only limied by Q and f r. Since his circui operaes a he resonan frequency, here is no worry abou he aainable peak volage gain of he circui o ge he desired regulaed oupu volage, which is conrolled by he phase shifed full bridge converer. Because he volage gain of LLC converer is independen of m ( m= L / L ) a resonan frequency as shown in Fig.3.5, he m Q=. Q=.3 Q=.5 Q=.7 Q= Q= Q=3 Q=5 Z R r ac r Volage Gain (Vo/Vin).5.5 Gain Curves of LLC Resonan Converer a Q=.33 m increasing Peak gain decreasing m=lm/lr fs/fo (b) f o f o = π LC r r m=3 m=4 m=5 m=6 m=7 m=8 m=9 m= 58

69 magneizing inducance and leakage inducance of he auxiliary ransformer can also be designed naurally, which is much easier compared o he pure LLC converer. The magneizing inducance can be obained by adjusing he gap which is physically in series wih he core under he only ZVS requiremen of L m 8 dead C C f ( ) s s s. Since he leakage inducance is resonan wih he resonan capacior o se he operaing frequency, here is no need o use inerleaving windings o ge he leakage inducance reduced. The leakage inducance can be naurally obained and precisely conrolled by he pracical insulaion disance beween he primary and he secondary windings. When he ETD ype core wih he simples winding srucure wihou inerleaving is employed, he leakage inducance is calculaed by 4π N pri _ l h h3 9 Llk = ( h) (3.3) H 3 where l is he mean lengh of urn for whole coil, H is he oal winding heigh, h is he primary winding widh, h is he insulaion disance, and h 3 is he secondary winding widh. Noe ha all dimensions are in cenimeers and L lk is in henries Resonan Capaciance From Fig.3.6 i can be seen ha he volage gain of LLC half-bridge converer is independen of he load when i operaes a he resonan frequency f r, he resonan capacior can be found o be LLC Converer Volage Gain 3 C = / L (3.4) ( π f ) 3 lk r Ligh load Full load Operaing poin Normalized frequency Fig.3.6 LLC converer volage gain vs. normalized frequency In his converer, he phase-shifed full bridge ZVZCS converer is responsible o ge he expeced oupu volage of he converer. The LLC half bridge converer is o guaranee he leading leg, S and S, o operae a ZVS from rue zero load o full load. The operaing 59

70 frequency is given consan a he opimized frequency according o he LLC half bridge converer, for example, 46.7 khz in he following experimenal prooype nex chaper. Theoreically, his hybrid converer can inegrae he advanages of he LLC resonan converer and phase-shifed PWM full bridge converer Oupu Inducance Fig.3.7 (a) is he recified volage waveform of he convenional full bridge converer. The peak-o-peak curren ripple can be expressed as T V Δ i ( V ) = ( n ) V (3.5) s o pk pk o o nl o Vin V rec nv in V o nv V rec in V o nv in (a) convenional full bridge converer (b) he proposed converer Fig. 3.7 Volage waveforms of recifier Fig.3.7 (b) is he recified volage waveform of he proposed converer. The peak-opeak curren ripple can be expressed as V T V V Δ i ( V ) = ( n )( n ) in s o o pk pk o ( n n) Lo Vin Vin By solving he equaions (5) and (6), i yields Δ i Δ i n = n pk pk,max pk pk,max (3.6) (3.7) where n <n. And given n :n =4:9, he relaionship of he normalized oupu volage and normalized oupu inducor peak-o-peak curren is shown in Fig Normalized Curren Ripple. Convenional Full Bridge Proposed Converer Normalized oupu volage Fig.3.8 Normalized peak-o-peak oupu inducor curren vs. normalized oupu volage. 6

71 I can be seen from he equaion (3.7) and Fig. 3.8 ha he oupu inducor curren ripple in he proposed converer can be reduced by n /n compared o he convenional full bridge, which means he inducance can be reduced by n /n compared o he convenional full bridge under he same curren ripple condiion. 3.5 Simulaion Circui and Simulaion Resuls Based on he previous analysis, he circui is designedd and he simulaion circui is shown in Fig.3.9. Correspondingly, he simulaion resuls are given a full load (wors case for IGBTs ZCS condiion) and no load (wors case for MOSFETs ZVS condiion) shown in Figs.3.~4. And he specificaions are given in able 3.. Fig.3.9 Power sage of he simulaion circui Table 3.: Simulaion specificaions Inpu Volage Oupu Volage Oupu Power Swiching freq. Full load (wors case for IGBT ZCS) 39V 385V 6.6kW 46.7kHz No load (wors case for MOSFET ZVS) 39V 385V W 46.7kHz 6

72 From Fig.3., i can be seen ha ZCS operaion of he main device IGBTs is verified by he simulaion waveforms of he IGBT (S 4 ) volage V ce4, device curren i c4, and gae volage G 4. Before he gae is urned off, he device curren i c4 is zero, so he IGBT operaes a zero-curren swiching condiion in he wors case of he maximum oupu power. IGBT ZCS urn off Fig.3. IGBT waveforms of he volage, curren, and is gae a full load MOSFET ZVS urn on Fig.3. MOSFET waveforms of he volage, curren, gae and oupu curren a full load 6

73 MOSFET ZVS urn on Fig.3. MOSFET waveforms of he volage, curren, gae and oupu curren a no load I can be seen from Figs. 3., 3. ha he main swiches of MOSFETs demonsrae ZVS operaion wih load curren adapabiliy. Fig.3. shows he device MOSFET, S, drain-o-source volage v ds and is gaing signal G a he full load condiion and Fig.3. shows v ds and G a no load curren condiion. By observing ha v ds drops o zero before G urns ON a differen oupu curren levels, boh figures clearly indicae ha ZVS is achieved from rue zero o full load. =.8μ s Fig. 3.3 Full-bridge diode D waveforms of volage, curren and is associaed ransformer secondary curren a full load 63

74 The fas rese of he circulaing curren of he ransformer TR during he oupu inducor freewheeling inerval is illusraed in Fig.3.3. The secondary side curren i sec of ransformer TR drops o zero in.8µs wih he low leakage inducance because ha ZVS of MOSFET can be achieved in he converer even while he leakage inducance is zero. I also can be seen ha full-bridge diode D is urned off under relaively low volage wihou severe reverse curren. ZVS urn off ZCS urn on Fig. 3.4 Half-bridge diode D5 waveforms of volage and is associaed ransformer secondary curren a full load Fig. 3.4 shows he waveforms of he half-bridge diode ZCS urn-on and urn-off in he wors case of full load condiion. The well-clamped volage sress and ZCS operaion of he half-bridge diode imply ha he diode volage sress is low and he low-volage drop diode can be uilized o furher improve he efficiency. 3.6 Performance Analysis of Hybrid Resonan and PWM Converer As menioned previously, his converer is able o achieve very high efficiency. In order o obain high efficiency, proper opology selecion is criical bu undersand he sources of sysem loss is also crucial. Many sources of loss exis in a sysem. Firs, primary sources of loss will be considered. Some primary sources of loss are easy o model while ohers may be more difficul. Primary sources of loss include he following. Acive device conducion loss Diode conducion loss 64

75 Swiching loss Transformer core loss Transformer winding loss Inducor loss Boh acive device conducion loss and diode conducion losses are fairly easy o esimae as long as circui operaion is properly undersood. Complicaions arise when emperaure effecs are aken ino accoun. Losses increase for MOSFETs and IGBTs a higher emperaures and losses decrease for diodes a higher emperaures. A rough emperaure predicion can be used o improve he models. Swiching loss may be difficul o esimae accuraely due o various parasiics. Package and PCB parasiic inducances may aler swiching imes and swiching waveforms. Boh core and dc ransformer winding losses are relaively easy o esimae, alhough hermal effecs can creae inaccuracies. In addiion o he above menioned primary sources of loss, several parasiic sources of loss exis. The parasiic losses include bu are no limied o he following: Snubber loss Capacior ESR loss Body diode conducion loss Skin effec Proximiy effec Conac and erminaion loss Swiching losses due o loss of sof swiching condiion Various losses due o emperaure variaion The parasiic losses menioned above are paricularly difficul o characerize. The losses due o skin effec and proximiy effec are very difficul o model. Skin effec losses can be prevened for he mos par by uilizing copper windings which are hin enough o ensure ha sufficien surface area is available. Proximiy effecs are difficul o predic as he effec is heavily dependen on how he ransformer is wound. Conac and erminaion losses are also difficul o model and predic. The resisance of a conac may be very small bu under high curren condiions, he loss can be subsanial. Swiching losses due o non-full ZVS condiion is once again, difficul o predic. Parial ZVS condiions are 65

76 possible as shown previously. Therefore, he acual loss is very difficul o model. Finally, he sysem suffers from losses due o emperaure variaions. I is difficul o know exac juncion emperaures of devices or core emperaures. The emperaure is also dependan on cooling and environmenal facors as well. Temperaure effecs are parially considered in order o form beer models Main Componens in This Circui The prooype converer has he following specificaions: inpu volage V = 38 V ~ 4V ; oupu volage V = 5 V ~ 45V ; Maximum oupu curren I in o _max 5 o = A ; swiching frequency f = 46.7kHz. And he main componens are abulaed s as follows. Table 3.: main componens used in he circui Designaor MFN# Manufacurer Descripion MOSFETs S, IPW6R45 Infineon MOSFET N-CH 65V Technologies 6A TO-47 IGBTs S 3, 4 IRGP463 Inernaional IGBT PDP N-CH 6V Recifier 96A TO-47AC Diodes D,,3,4 8EPF6 Vishay/ DIODE FAST REC Semiconducors 6V 8A TO-47AC Diodes D 5,6 APT3S Microsemi Power DIODE SCHOTTKY Producs Group 45A V TO-47 Diodes D 7 APT75DQ6 Microsemi Power DIODE ULT FAST 75A Producs Group 6V TO-47 Transformers and inducor informaion: Transformer TR Core: Pri. wire #: Ferrie EE8 Sec. wire#: Main ransformer Transformer TR Core: Pri. wire #: Ferrie EE8 Sec. wire#: 4 Auxiliary ransformer Inducor Lo Core: Wire#: C5895A(High flux) (Liz wire) Oupu inducor 3.6. MOSFETs and IGBTs Conducion Loss Analysis According daashee, he power losses of MOSFETs and IGBTs can be calculaed [68], [69]. (a) MOSFETs Conducion Loss Analysis 66

77 Conducion losses in power MOSFET can be calculaed using an MOSFETapproximaion wih he drain source on-sae resisance ( R DS( on) ): v ( i ) = R ( i ) i (3.8) DS D DS( on) D D where v DS andi D are drain-source volage and he drain curren, respecively. The ypical RDS( on) can be read from he daa-shee diagram, as shown in Fig. 3.5(a), where I D is he MOSFET on-sae curren as defined by he applicaion. Therefore, power losses over he swiching cycle gives an average value of he MOSFET conducion losses: where I Drms P = R I (3.9) CM DS ( on) Drms is he rms value of he MOSFET on-sae curren. R D S ( o n ) R D S ( on ) R D S ( o n ) I D T T j j (a) R DS(on) vs. drain curren (b) T j vs. R DS(on) Fig. 3.5 Reading daa from daa shee The procedure for R DS( on) deerminaion, shown in Fig.3.5 (b), refers o he R DS( on) ypical values. While his procedure should be saisfying for he majoriy of applicaions, he R DS( on) value can be calculaed by aking ino accoun he emperaure and producion variaions. I can be done using following equaion: α RDS ( on) ( Tj ) = RDS ( on)max(5 C) ( ) Tj 5 C (3.3) Where T j is he juncion emperaure and R DS ( on)max (5 C) is he maximum value of R DS( on) a 5 C, which can be read from he produc summary able in he daa-shee as shown in he Fig

78 Fig.3.6 Reading R DS(on)max (5 C) from he daa-shee The emperaure coefficien α can be calculaed in he following manner: Two ses of values ( Tj, R DS( on)) and ( j, DS( on)) T R can be read from he daa shee as shown in Fig.3.7. These values can be used o deermine α in equaion (3.9). The conducion losses of he ani-parallel diode can be esimaed using a diode approximaion wih a series connecion of DC volage source ( v D ) represening diode onsae zero-curren volage and a diode on-sae resisance ( across he diode and i F he curren hrough he diode: D F D D F R D ), v D being he volage v ( i ) = V R i (3.3) These parameers can be read from he diagrams in he MOSFET daashee as shown in Fig.3.7. In order o ake he parameer variaion ino accoun, and hus o have a conservaive calculaion, he V D value read from he diagram have o be scaled wih ( V V ). Those exac values can be read from he daashee ables, bu for an / D max Dyp engineering calculaion a ypical safey margin value of (%-%) can also be used. If he average diode curren is I Fav, and he rms diode curren is I Frms diode conducion losses across he swiching period ( T = / f ) are: CD D Fav D Frms sw sw, he average P = V I R I (3.3) R D V = I D F I F V D V D Fig. 3.7 Diode resisance vs. he diode curren 68

79 (b) IGBTs Conducion Loss Analysis IGBT Conducion losses can be calculaed using an IGBT approximaion wih a series connecion of DC volage source ( V CE ) represening IGBT on-sae zero-curren collecor-emier volage and a collecor-emier on-sae resisance ( r C ): v ( i ) = V r i (3.33) CE C CE C C The same approximaion can be used for he ani-parallel diode, giving: v ( i ) = V r i (3.34) D D D D D These imporan parameers can be read direcly from he IGBT Daashee (see Fig.3.8 (a) for he IGBT and Fig.3.8 (b) for he Diode). In order o ake he parameer variaion ino accoun, and hus o have a conservaive calculaion, he V CE and V D values read from he diagram have o be scaled wih ( V / max V ) or ( V / max V ) values. Those exac values can be read from he daashee ables, bu for an engineering calculaion a ypical safey margin value of (.-.) can be used. If he average IGBT curren value is I Cav, and he rms value of IGBT curren is I Crms, hen he average losses can be expressed as: CT CE Cav C Crms CE CEyp P = V I r I (3.35) If he average diode curren is I Dav, and he rms diode curren is I Drms, he average diode conducion losses across he swiching period ( T = / f ) are: CD D Dav D Drms sw sw P = V I r I (3.36) D Dyp V CE I c V rc = I CE C V D VD rd = I I D D V CE V D (a) V CE vs. r c (b) V D vs. r D Fig. 3.8 Reading daa from daashee 69

80 3.6.3 Diode Conducion Loss Analysis In addiion o MOSFETs and IGBTs conducion losses, here are diode conducion losses on he secondary side. When he forward curren Imax is lower han 3 I Fav, similar o he ani-parallel diode loss calculaion of he acive device, he diode conducion loss can be calculaed as PCD VF IFav Rak IFrms = (3.37) where V F is Diode fixed volage drop under zero curren condiion; I Fav is average forward curren in he diode; I Frms is RMS forward curren in he diode; R ak Diode ondrop resisance. When he forward curren Imax is higher han 3 I Fav, diode on-drop resisance, R ak, becomes very pessimisic. The diode conducion loss can be calculaed as VFM I M is he FM where ( ) diode. ( ) P = V I I (3.38) CD FM M Fav V value when I FM = IM ; I Fav is average forward curren in he MOSFET and IGBT Swiching Loss Analysis Swiching loss is also a common source of loss in swiching converers. Loss mus be calculaed for boh urn-on and urn-off condiions o find he oal swiching loss. During commuaion, volage and curren can be high as each crosses over he oher. The swiching energy loss, E sw, is he inegraion of he Vi I produc during he commuaion sae. (3.39) E = v () i () d = E E = v () i () d v () i () d sw sw sw on off sw sw sw sw swiching ime i_ on i_ off where i_ on is used for he unambiguous definiion of inegraion limis for he deerminaion urn-on swiching losses; i_ off is used for he unambiguous definiion of inegraion limis for he deerminaion urn-off swiching losses; loss; Eoff is urn-off energy loss. E on is urn-on energy 7

81 If sof swiching is achieved, he swiching loss for ha paricular device can be reduced significanly. Under ZVS or Zero Curren Swiching (ZCS) condiions, he swiching loss can be considered zero. Then he average swiching loss can be expressed as E P = = f E (3.4) sw sw sw sw Tsw The swiching imes are defined as follows: d( on) is urn-on delay ime; d( off ) is urn-off delay ime; r is rise ime; f is fall ime; and = is urn-on ime; = ( ) is urn-off ime. on d ( on) r off d off f The values for off and on should ideally be measured. Someimes, measuremen may be difficul. Typically, he device manufacurer will provide some ypical values for off and on and values for E off and E on maybe provided as well. Unforunaely, he values for off, on, and E off, and E on are dependen on many facors including emperaure, curren, gae resisor, gae volage, load ype (resisive or inducive), ec. Typically, he values provided by he manufacurer will no mach exacly. If he es condiions are very similar, hen he manufacurer s daashee may provide a reasonable esimae. The manufacurer does provide a plo of swiching energy vs. load curren based on inducive swiching. Fig.3.9 shows MOSFET ypical characerisic of gae-source volage V GS, drainsource volage V DS and drain-source curren I DS, and is definiion of swiching imes and swiching energies. % VDS d ( on ) on r VGS d ( off ) off % % f I DS P P off on % ( E ) % % ( E ) on off i _ on Fig. 3.9 Definiions of MOSFET swiching imes and energies E on is urn-on swiching energy wih diode, which is he inegral of he produc of drain curren and drain-source volage over he inerval ( i_ on) from when he drain curren sars o rise o when he volage falls o zero in order o exclude any losses. E off is Turnoff Swiching Energy, which is he inegral of he produc of drain curren and drain- i _ off 7

82 source volage over he inerval ( i_ off ) saring from when he gae-source volage drops below 9% o when he drain curren reaches zero. In our circui, MOSFETs operae a ZVS condiions, so here is no urn-on loss, which means E on =. Swiching energy can be scaled direcly for variaion beween applicaion volage and he daashee swiching energy es volage. So if he daashee ess were done a 33 Vols for example, and he applicaion is a 4 Vols, simply muliply he daashee swiching energy values by he raio 4/33 o scale. MOSFET swiching loss may be esimaed by calculaing he area underneah he V DS and I D waveforms and muliplying by he swiching frequency and swiching imes. The equaions [67] below can be used as crude esimaes of he area underneah he V DS and I D waveforms or he swiching energy. E on = V DS I DSi _ on (3.4) E off = V DS I DSi _ off (3.4) ( ) P = E E f (3.43) loss _ sw _ M OSFET on off s Fig.3.3 shows IGBT ypical characerisic of gae-emier volage V GE, collecoremier volage V CE and collecor curren I c, and is definiion of swiching imes and swiching energies. on d ( on ) V CE r off d ( off ) f % I C % V GE % % % P on ( E on ) ( E off ) i on i off Fig. 3.3 Definiions of IGBT swiching imes and energies E on is Turn-On Swiching Loss, which is he amoun of oal energy loss, including he loss from he diode reverse recovery, measured from he poin where he collecor curren begins o flow o he poin where he collecor-emier volage compleely falls o zero in P off.i c 7

83 order o exclude any conducion loss. E off is urn-off Swiching Loss, which is he amoun of oal energy measured from he poin where he collecor-emier volage begins o rise from zero o he poin where he collecor curren falls compleely o zero. In our circui, IGBTs operae a ZCS condiions, so here is no urn-off loss, which means E off =. Similarly, IGBT swiching loss may be esimaed by calculaing he area underneah he V CE and I C waveforms and muliplying by he swiching frequency and swiching imes. The equaions [67] below can be used as crude esimaes of he area underneah he V CE and I C waveforms or he swiching energy. E on = VCE I Ci _ on (3.44) E off = VCE ICi _ off (3.45) ( ) P = E E f (3.46) loss _ sw _ IGBT on off s Time and loss componens which canno be unambiguously described by he swiching ime definiions can be aken in consideraion pracically (e.g. he ail curren characerisic for he IGBT) Transformer Core Loss Analysis Magneic componens such as inducors and ransformers ypically have core loss associaed wih hem. The firs sep is o find he applied volage-seconds. The volage seconds is dependen on he duy cycle. v () area λ Fig.3.3 An arbirary volage waveforms 73

84 An arbirary periodic ransformer primary volage waveform v () is illusraed in Fig.3.3. The vol-seconds applied during he posiive poion of he waveform is denoed λ : () λ = v d (3.47) These vol-seconds, or flux-linkages, cause he flux densiy o change from is negaive peak o is posiive peak value. Hence, from Faraday law, he peak value ( Δ B ) of he ac componen of he flux densiy is λ Δ B = (3.48) n A e n = Number of Primary Transformer Turns A e = Effecive Core Area of Transformer Some key rends may be noiced from equaions (3.46), (3.47): Increases in inpu volage increases peak flux densiy. Increases in swiching frequency decreases peak flux densiy. Increasing he number of primary urns decreases peak flux densiy The peak flux densiy is dependen on applied volage-seconds, primary ransformer urns raio, and effecive core area. Since peak flux densiy is direcly relaed o core loss, one can easily see how o modify he ransformer design o reduce core loss. Typically, he inpu volage canno be changed bu swiching frequency can be increased o reduce applied volage-seconds. Unforunaely, increases in swiching frequency may lead o increased swiching loss. Primary urns raio can easily be increased as long as here is sufficien space, bu resisance and losses will increase due o increased winding lenghs. Larger cores may be used o increase effecive core area bu size and cos of he ransformer will increase. Once he ac peak flux densiy is known, he core loss can be esimaed. The following equaion for core loss calculaion offers a close approximaion. c d P L = af B (3.49) 74

85 3 where P L is Power loss in mw / cm ; B is Peak flux densiy in kg; f is frequency in khz. In our circui, a ferrie EE8 core is used and he loss parameers can be looked up in he able as follows provided by Magneics Inc. Table 3.3: facors applied o he above formula (3.49) Maerial ype Frequency range a c d R Maerial f < khz khz f < 5kHz f 5kHz f < khz P Maerial khz f < 5kHz f 5kHz f < khz F Maerial khz f < khz khz f < 5kHz f 5kHz J Maerial f f khz > khz W Maerial f f khz > khz H Maerial f f khz > khz Then we can esimae approximaely he oal core loss as follows. P = PV = af B Al (3.5) c d fe L c e m A e = Effecive Core Area of Transformer (cm ) l m =Magneic pah lengh (cm) Like many oher devices componens, core loss is heavily dependen on emperaure. The ransformer core emperaure coefficien varies and may be negaive or posiive over differen emperaure ranges. A low emperaures, he core loss is ypically high. The core 75

86 loss decreases as emperaure increases. A a cerain poin, here is an inflecion poin and he core loss increases again as emperaure increases. The emperaure range ha minimizes he core loss is dependen on he maerial of he core. The core loss variaion due o emperaure is also dependen on frequency and peak flux densiy which core loss esimaions even furher Transformer Copper Loss Analysis Transformers also have copper loses in addiion o core losses. The copper losses are increased furher due o skin and proximiy effecs if he ransformer is no properly designed. Copper loss simply due o curren is easy o esimae, bu he loss esimaion becomes subsanially more difficul when oher facors such as skin effec and proximiy effecs are considered. Ignoring he copper losses due o skin and proximiy effecs, he oal copper loss can be expressed in he form I ( MLT ) n I o cu = (3.5) WK A u P Combining equaions (47) and (49), i yields n P cu ρ ( MLT ) ρλ I o = 4Ku WAAe (3.5) B k j o = I j, is he sum of he rms winding currens, referred o he primary winding. j= n 6 ρ = Resisiviy of copper =.74 Ω C and 6.3 cm C. MLT = Mean lengh per urn. n = Number of primary winding urns. W A = Bobbin winding area. K u = Winding fill facor, is he fracion of he core window area ha is filled wih copper. The dc resisance of a ransformer winding can be calculaed wih he following equaion. l A c = Lengh of winding = Cross-secional area of copper R l = ρ (3.53) A c 76

87 Under given core ype and size, winding urns and he wire ha is used, we can look up he daa we need from he core daa and wire gauge daa provided by he manufacurer. The DC resisance of primary and secondary windings can also be obained as follows. The DC winding resisance for he primary side is: ( )( ) R = n MLT R (3.54) pri pri _ AWG # The DC winding resisance for he secondary side is ( )( AWG ) R = n MLT R (3.55) sec sec_ # If he primary and secondary currens are known, hen he oal copper loss is given P = I R I R (3.56) cu pri pri sec n = Number of primary winding urns. n = Number of secondary winding urns. R pri _ AWG # is he primary wire resisance in sec 6 Ω / cm. 6 Rsec_ AWG # is he secondary wire resisance in Ω / cm. Losses such as core loss, conac loss, and copper loss, creae hea and raise he emperaure of he ransformer windings. This in urn causes copper losses o increase. The increase in emperaure also makes copper more suscepible o skin effec. Skin effec can grealy increase he effecive resisance of a high frequency ransformer winding and, herefore, creaing addiional losses. Even if wire is seleced such ha skin deph maches he copper hickness, he curren densiy varies hroughou he deph. Therefore, greaer amouns of curren will flow a he surface and less curren a he cener of he conducor. The conducor is sill no fully uilized and herefore, he effecive resisance will increase Inducor Loss Inducors dissipae power in he core and in he windings. Though deermining hese losses wih precision can require complex measuremens, an easier alernaive exiss. Inducor losses may be esimaed using readily available daa from core and inducor suppliers along wih he relevan power supply applicaion parameers. The power loss of an inducor is defined by he basic formula: P = P P P (3.57) loss _ inducor core dcr acr 77

88 The calculaed and/or measured core loss, P core, is ofen direcly provided by he inducor supplier. If no, a formula can be used o calculae he core loss. Firs of all, he ac peak flux densiy (B in Telsa) needs o be obained and i is given as follows. B = N I μl e (3.58) where N=number of urns l e =effecive magneic lengh Measuring core loss and geing repeaable resuls can be a edious ask depending on he es frequency. A general form of he core loss formula for ferrie cores is: x y P ( mw) = af B V (3.59) core where: a= Consan for core maerial f = Frequency in khz B = Peak Flux Densiy in kgauss x = Frequency exponen y = Flux Densiy exponen Ve= Effecive core volume (cm 3 ) The core loss can be calculaed by enering he a coefficien and he frequency and flux densiy exponens, which are unique o each core maerial. For example, in his circui, high flux core is used and B in he formula is in Tesla and he core loss densiy curves can be obained from he supplier (Magneics) as shown in Fig.3.3. e Fig. 3.3 Core loss densiy curves of he oupu inducor 78

89 The wire loss ( P dcr ) caused by dc resisance is easy o calculae. I is defined by his basic formula: P = I R (3.6) dcr rms dc where: I rms = Therms value of he peak curren applied o he inducor R dc = The dc resisance of he inducor The wire loss ( P acr ) caused by ac resisance is more difficul o calculae since ac winding resisance values are no always readily available from magneics vendors. Pacr is defined by he following formula: P = I R (3.6) acr rms ac where: I rms = Therms value of he peak-peak ripple curren applied o he inducor R ac = The ac resisance of he inducor In many cases P acr is a small percenage of he overall inducor power loss, hus, he power loss of an inducor is defined by he simple formula Oher Losses P = P P (3.6) loss _ inducor core dcr Calculaing power loss for he snubber is raher difficul since i can be dependen on swiching characerisics. When full ZVS condiion is obained, he snubber loss decreases due o less severe perurbaions. Hard swiching condiions creae heavy volage spikes and ripples, which mus be damped by he snubber. Many oher parasiic losses exis wihin he sysem. For example, capacior ESR is a concern, paricularly for high curren sysems. Capaciors are imporan for mainaining waveform qualiy and reducing volage spikes and ripples. These capaciors may have o supply and draw large amouns of curren. The capacior ESR losses can become significan when he curren is large. Paralleling addiional capaciors can help reduce losses due o capacior ESR since RMS curren hrough individual capaciors is reduced. Anoher source of loss, which is difficul o be esimaed is parasiic inducance. Parasiic inducance can cause excessive volage spikes during swiching. Swiching waveforms affeced will see larger losses in addiion o higher volage sress. Higher 79

90 volage sress may lead o device failure. If higher volage raing devices are used, ypically conducion loss of he device increases since he volage raing has increased. Terminaion is anoher major parasiic loss, especially for high curren siuaion. Each mechanical connecion made inroduces erminaion losses. Mechanical connecions do no have perfec conac and a small resisance exiss beween he wo conacs. Ideally, mechanical conacs should be eliminaed where possible and one piece of copper should be used for connecion. The mechanical conacs may have a small resisance bu he loss can become very high due o he large currens of high curren sysems. The loss would be simple o calculae wih he conducion loss equaion, bu he resisance is difficul o predic since he resisance is due o he physical consrucion. Under high curren condiions, he erminals can ge ho due o he power loss. The higher emperaure increases he resisance of copper, furher increasing parasiic losses. In addiion o mechanical conac resisance, he resisance increases furher if wo differen maerials are used for conacs. Skin effec and proximiy effec can also creae significan amouns of loss. Skin effec raises he effecive resisance of he ransformer winding. Since large currens are flowing hrough he ransformer, an increase in resisance can creae large amouns of loss Efficiency Esimaion Based on he loss esimaions above, he efficiency can be esimaed. Once again, he emperaure and oher facors have a significan effec on sysem efficiency. For his esimaion, he following condiions will be assumed. Table 3.4: Efficiency esimaion condiions Inpu Volage 38~4V Oupu Volage 5~45V Maximum Oupu Power Swiching frequency 6.6kW 46.7kHz The oal power loss can be calculaed shown in Fig.3.33 (a) and he efficiency of he sysem can be esimaed shown in Fig.3.33 (b). 8

91 Toal loss (W) Efficiency Po (kw) Po (kw) (a) Calculaed oal loss vs. P o (b) Calculaed efficiency vs. P o Fig.3.33 Calculaed oal loss and efficiency vs. oupu power As an example, specifically he esimaed power losses a 3.4-kW raed oupu power wih wo differen oupu volage levels are lised in he Fig I indicaes ha he oupu diodes and IGBTs are he dominan sources of he power losses under full-load condiion. Power loss (W) 3 Po=34W;Vin=39V; Vo=385V 5 Po=34W;Vin=39V;Vo=8V IGBTs MOSFETs Main ransformer Auxiliary rans. Oupu inducor Oupu diodes Ohers Fig Esimaed power losses a 3.4 kw raed oupu power wih wo differen oupu volage levels 3.7 Topology Variaions Fig.3.35 demonsraes several ZVZCS full-bridge combining resonan half-bridge converers wih differen recifier configuraions, which share he common feaure ha he full-bridge converer changes o half-bridge converer and keeps ransferring energy from he inpu o he oupu during he freewheeling inerval of he oupu inducor. I is worh o 8

92 noe ha he resonan converer can be half-bridge or full-bridge or oher high efficiency parallel or series or muli-elemen resonan converers, and ha he swiches leg configuraion can be wo-level or hree-level wih IGBT or MOSFET or hybrid devices. S 3 S Vin TR TR S 4 S C D D D 3 D 4 L o D 5 C o R o C (a) wih wo cenral apped recifiers S 3 S V in TR TR S 4 S C L o D D 3 D D4 D5 D 4 D6 C C o R o (b) wih full-bridge and cenral apped recifiers S 3 S V in TR TR S 4 S C L o D D 3 D 5 D D4 S 5 S 6 C C o R o (c) wih full-bridge and cenral apped synchronous recifiers Fig.3.35 Several variaions hybrid resonan and PWM converers 8

93 3.8 Implemened Hardware 3.8. Complee Circui Srucure Fig.3.36 shows he complee circui srucure of he implemened hardware, including PFC circui, conrol circui, hybrid resonan and PWM converer, and oupu. 85 ~ 65V rms 4V L o 5 ~ 45V Boos PFC C dc Hybrid Resonan and PWM Converer C o Baery v conrol G ic I I v sense sense conrol G ic I ref G vc V ref Fig.3.36 Complee srucure of he implemened hardware 3.8. Implemened Hardware Prooype The following in Fig is he implemened hardware prooype. PCB for primary componens Min G vc V ref I ref Transformers PCB for secondary componens Fig.3.37 Prooype of he implemened hardware Experimenal Verificaion A 3.4 kw hardware prooype for baery charger has been designed, fabricaed and esed o verify he circui validiy and he improved performance of he proposed converer. The prooype converer has he following specificaions: Inpu volage V in =38V - 4V; 83

94 Oupu volage V o =5V 45V; Maximum oupu curren I o-max =5A; Swiching frequency f s =46.7kHz. S 3 V in S 4 L L m k 9 34 = 7.mH = 3.9μ H TR S S S, : IPW 6R45 Lm = 566μ H L = 35μ H 4 3 k TR.33μ F C 3 S 3,4 : H GTG3N6 D D D~ 4 : 8EPF6 D 3 D 4 D 5 C L o μ F.mH μ F D C C o 6 D 7 μ F D 5,6 : D 7 : 8CPQ5 A PT 75DQ6 R o V o Fig Power circui and he parameers of he prooype Fig.3.38 shows he power circui and he parameers of he prooype wih he par numbers of he componens used. All power semiconducor devices including MOSFETs (S and S ), IGBTs (S 3 and S 4 ) and diodes (D ~D 7 ) are mouned on he hea-sink wih he same TO47 package. The ransformer TR is designed wih ighly coupling and wihou airgap in he Ferrie EE8 core (magneizing inducance L m =7.mH, leakage inducance L lk =3.9µH), and he ransformer TR wih loosely coupling and airgap in he core (magneizing inducance L m =566µH, leakage inducance L lk =35µH). ZCS operaion of he main device IGBT is verified by he experimenal waveforms of he IGBT (S 4 ) volage V ce4, device curren i c4, and gae volage G 4, shown in Fig Before he gae is urned off, he device curren i c4 is nearly zero, so he IGBT operaes a zerocurren swiching condiion in he wors case of he maximum oupu power. V ce4 (V/div) C3 i c4 (A/div) ZCS G 4 (V/div) (µs/div) Fig.3.39 IGBT ZCS experimen waveforms of device volage, curren, and is gae. 84

95 Fig. 3.4 shows he experimenal verificaion of he MOSFETs main swiches ZVS operaion wih load curren adapabiliy. Fig.3.4 (a) shows he device MOSFET, S, draino-source volage v ds and is gaing signal G a no load condiion, and Fig.3.4 (b) shows v ds and G a he full load curren condiion (8.8A). The gae volage is 5V for urn on and -5V for urn off. By observing ha v ds drops o zero before G urns ON a differen oupu curren levels, boh figures clearly indicae ha ZVS is achieved from zero o full load. The fas rese of he circulaing curren of he ransformer TR during he oupu inducor freewheeling inerval is illusraed in Fig3.4. The secondary side curren i sec of ransformer TR drops o zero in.7µs wih he low leakage inducance because ha ZVS of MOSFET can be achieved in he proposed converer even while he leakage inducance is zero. I also can be seen ha full-bridge diode D is urned off under relaively low volage wihou severe reverse curren. i o (5A/div) i o (5A/div) 8.8A V ds (5V/div) V ds (5V/div) ZVS G (V/div) ZVS G (V/div) (µs/div) (µs/div) (a)zero load(b) full load Io= 8.8A Fig. 3.4 MOSFET ZVS load adapabiliy experimens wih differen load condiions V D (V/div) Δ=.7 µs C3 i D (A/div) i sec (A/div) (5µs/div) Fig.3.4 Full-bridge diode D waveforms of volage, curren and is associaed ransformer secondary curren. Fig. 3.4 shows esed waveforms of he half-bridge diode ZCS urn-on and urn-off in he wors case of he maximum oupu curren. The well-clamped volage sress and ZCS 85

96 operaion of he half-bridge diode imply ha he diode volage sress is low and he lowvolage drop diode can be uilized o furher improve he efficiency. ZCS urn-off ZCS urn-on i sec (5A/div) V D5 (V/div) (5µs/div) Fig. 3.4 Half-bridge diode D5 experimenal waveforms of volage and is associaed ransformer secondary curren. The measured efficiency a differen loads under he condiion of 46.7 khz swiching frequency, 39 V inpu, 385 V and 8 V oupu is given in Fig I can be seen ha high efficiency over wide load curren and oupu volage range is achieved. The efficiency wih load range from % o % mainains 96% or higher, and he maximum efficiency achieves 98% under he condiions of 385V oupu volage and 3.4 kw oupu power. The efficiency is higher wih a higher oupu volage because ha he conducion losses of he acive swiches and oupu diodes are reduced wih he lower curren sresses. Efficiency % 98% 96% 94% 9% 9% 88% 86% Vo = 385V Vo = f = 46.7 khz, V in = 39V Oupu power (W) Fig Experimenal resuls of efficiency as a funcion of he oupu power. 3.9 Summary A novel hybrid resonan and PWM converer combining resonan half-bridge and phase shifed full-bridge opology has been proposed o achieve high efficiency and rue full sof- 86

97 swiching range, which is also verified by a 3.4 kw hardware prooype. Table 3. summarizes he facors ha deermine he performances of he hree converers. Table 3.5: phase-shifed full bridge, LLC and Proposed Converers Conrol ZVS Circulaing Consan Curren Oupu diode mehod range curren and Volage volage sress Fixed Limied PS FB High Yes High frequency range Variable Full LLC Low No Low frequency range Proposed Fixed Full Low Yes Low converer frequency range NOTE: PS HB represens phase-shifed full bridge converer; LLC represens LLC converer; L lk is Leakage inducance of he ransformer in PS FB; L m is Magneizing inducance he ransformer in LLC; L f is Oupu inducor; R o is oupu load. From Table 3.5 and Fig.3.44, i can be seen ha he proposed hybrid converer can realize he full range ZVS by designing suiable magneizing inducancel m used in LLC and he leakage inducance L lk of he ransformer used in phase-shifed full bridge called main ransformer TR is independen of he ZVS. Since L lk is no longer relaed o he ZVS, i can be minimized o reduce he duy cycle loss and circulaing curren. nv in V in nv in v rec v pri n slope = Vin / Llk n n ΔD loss i pri ( Ts /) ( ) ( / ) slope = n V V L n in o o T s / Trese n slope = Vin Llk n T ZCS Fig.3.44 Key waveforms and formulaof he proposed hybrid converer The disincive feaures of he proposed circui are summarized as follows: 87

98 ) Wih he parallel LLC resonan half-bridge configuraion, zero-volage swiching of MOSFETs in he leading-leg can be ensured from rue zero o full load, and hus, he super-juncion MOSFET wih slow reverse recovery body diode can be reliably used. ) IGBTs in he lagging-leg work a zero-curren swiching wih minimum circulaing conducion loss because he parallel secondary-side DC volage source effecively rese he circulaing curren, herefore, he urn-off loss and he conducion loss of he IGBTs are significanly reduced. 3) Duy cycle loss is negligible since he leakage inducance of he main ransformer can be minimized wihou losing ZVS operaion, hus, he curren sresses hrough he primary-side semiconducors are minimized by he opimized urns raio of he main ransformer. 4) The opology is suiable for wide-range oupu volage or curren source applicaions because of he buck-ype configuraion wih he simple phase-shif pulse widh modulaion, and hus, i is a good candidae for he elecrical vehicle baery charger. 88

99 CH4: Improved Hybrid Resonan and PWM Converer 4. Issues in Previous Hybrid Resonan and PWM Converer The hybrid LLC resonan and phase-shifed full bridge PWM converer described in CH3 is repeaed here as shown in Fig.4. (a) and he key operaion waveforms is shown in Fig. 4.(b). S 3 V in S 4 D D S Llk ipri TR i pri S D 3 D 4 D 5 D 6 C S v ds C S i Lm D 7 L m Llk TR C C vrec L o C 3 C o R o i pri i pri i o L m v ds (a)the circui configuraion (b) Key operaion waveforms Fig. 4. Hybrid resonan and PWM converer in CH3 Fig.4.3 is he opological mode [, ] repeaed here in which he blue regular indicaes he effecive duy cycle in he operaion waveforms as shown in Fig.4.3 (b). V v GS v GS V v o rec S S S S 3 S 4 S 3 S 3 V in S 4 C S S L L lk m i i pri pri S TR TR C S Llk [, ] C 3 v GS v GS v v o rec S S S S 3 S 4 S 3 D D D 3 D 4 D 5 D 6 D 7 C C C o rec v L o R o vo i pri i pri i m v ds (a)the circui mode opology (b) Key operaion waveforms Fig. 4. Mode [, ] for he hybrid resonan and PWM converer From Fig.4., i can be concluded ha if he effecive duy cycle is large for he main ransformer, he energy sored in capacior C or C charged by LLC converer has no chance o be ransferred o he oupu, which means he uilizaion efficiency of he auxiliary 89

100 ransformer is very low in his case. When i is high power applicaion, i requires he duy cycle large, hen he auxiliary ransformer TR charges he capacior C or C while he main ransformer TR is ransferring he energy o he oupu load. So he issue is how o ge he auxiliary ransformer TR uilized more efficienly? 4. The Improved Hybrid Resonan and PWM Converer Fig.4.3 is a soluion for he previous issues, in which he oupu of he LLC resonan converer is in series wih he oupu load, heoreically ransferring energy o he oupu all he ime. S S 3 V rec V in TR TR V o C 3 S S 4 D 5 D 6 C C D 3 D 4 D D v rec L o C o R o V o Fig. 4.3 The improved circui configuraion 4.. Operaional Principles Fig.4.4 (a) show he circui diagram of he improved Hybrid Resonan and PWM Converer which composed of wo pars similar o he previous hybrid resonan and PWM converer: ) he resonan half-bridge circui including wo MOSFETs S and S, loosely coupled ransformer TR, resonan capacior C 3, and he secondary recifier D 5, D 6, and C, C ; ) he phase shifed full-bridge circui including wo MOSFETs S and S as leadinglag, wo IGBTs as lagging-leg, ighly coupled ransformer TR, he secondary recifier D ~4, and he LC oupu filer. The opology operaing principle can be explained by he gaing sequence and associaed key volage and curren waveforms shown in Fig.4.4 (b). Where C s, C s are he equivalen capaciance of he MOSFETs S, S, respecively; v rec is volage of he oupu inducor lef-side poin referred o he oupu ground; V o is he oupu volage; i pri and i pri are he primary curren of he ransformer TR and TR respecively; i Lm is he magneizing curren of he ransformer TR ; and he v ds is he device S drain-osource volage. 9

101 V in L lk C 3 i Lm L m TR S i pri S C S v ds i pri C S TR S 3 L lk S 4 v GS v GS v v o rec S S S S3 S4 D 5 D 6 C C D 3 D 4 D D L o C v o rec R o V o i pri i pri i m v ds (a)the Circui configuraion (b) Key operaion waveforms Fig. 4.4 The improved converer V in L lk i Lm L m S i pri C S v ds i pri TR S 3 L lk [, ] V in L lk i Lm L m S i pri C S v ds i pri TR S 3 L lk [, 3] C 3 TR S C S S 4 C 3 TR S C S S 4 D 5 D 6 C C D 3 D 4 D D L o C R v o o rec V o D 3 D D 5 C D 6 C ( a ) ( b) D 4 D L o C v o rec R o V o V in L lk i Lm L m S i pri C S v ds TR S 3 L lk [ 3, 5] V in L lk i Lm L m S i pri C S v ds i pri TR S 3 L lk [ 5, 6] C 3 TR S C S S 4 C 3 TR S C S S 4 D 5 D 6 C C D 3 D 4 () c D D v rec L o C o R o V o Fig. 4.5 Topological modes of he improved converer in half swiching cycle This improved Hybrid Resonan and PWM Converer combines he behavior of wo differen converer opologies: LLC half-bridge converer operaing a he load-independen resonan frequency which makes he circui operae a opimal condiion o achieve maximum efficiency and he consan frequency phase shifed full-bridge converer which is used o regulae he oupu by means of he phase shif. The mos imporan is ha he D 5 D 6 C C D 3 D 4 ( d) D D L o C v o rec R o V o 9

102 oupu of he LLC half bridge is in series wih he oupu of he converer, hus he auxiliary ransformer TR can ge improved grealy. Whaever he duy cycle is, he energy sored in he capacior C or C hrough he auxiliary ransformer TR can be ransferred o he oupu load. There are six disinc operaion modes for his opology in he PWM half cycle, as shown as Fig.4.5. Mode [, ]: A, he secondary curren of ransformer TR reaches a he refleced oupu inducor curren. Swiches S 3 and S remain on. Suppose he leakage inducance of he main ransformer is zero, ha is L lk =. Thus, he equivalen circui a his inerval is shown in Fig.4.6, as well as he key waveforms. V in i pri :n C v TR v c (a) L o rec C o R o vo v GS v GS v v o rec S S S S 3 S 4 L i pri lk C3 i L Lm m C (b) i x :n TR v sec i pri i pri i m v ds Fig.4.6 (a), (b) The equivalen circui for Mode [, ];(c) The key waveforms According o half bridge LLC characerisics, he vsec shown in from Fig.4.6 (b) can be expressed as v n = V = V = V sec in c c (4.) where n is he secondary-o-primary urns raio of TR. Clearly from Fig.4.6 (a), he refleced inpu volage applies o he lef-side of he oupu inducor called he recified volage, v rec, which can be expressed as vrec = n Vin nvin (4.) where n is he secondary-o-primary urns raio of TR. v rec is he recified volage and V in is inpu volage shown in Fig.4.4. The primary curren of he main ransformer reaches he refleced curren of he oupu inducor, L o, and increases wih he slope as 9

103 di pri d = nv nv V L n ( / ) in in o o (4.3) Suppose oupu capaciors, C and C, are large enough. Thus, he primary side of Fig.4.6 (b) can be simplified as Fig.4.7 as follows. L lk C3 i Lm i pri Lm i x V in Fig.4.7 The simplified circui for he primary side of Fig.4.6 (b) The magneizing curren i Lm can be simplified as a riangle wave wih a consan slope as follows. dilm Vin / = (4.4) d L where n are he secondary-o-primary urns raio TR. Thus, Lm m V / in ilm() = ilm( ) ( ) Lm i ( ) is he curren flowing he resonan capacior L m a. (4.5) Since he circui operaes a resonan frequency, where he volage gain is consan, a lile bi higher han uniy, which is independen of load and raio of m ( m= Lm / Llk, Lm is he ransformer magneizing inducance and L lk is he ransformer leakage inducance), L m can be relaively large as needed. Suppose oupu capaciors, C and C, are large enough. Then he secondary side of Fig.4.6 (b) can be simplified as Fig.4.8 as follows. n V in ix / n C / n 3 n L lk Fig.4.8 The simplified circui for he secondary side of Fig.4.6 (b) Suppose he volage across he resonan capacior C 3 a is Vc 3( ), he i x can be derived as follows by means of he Laplace model of he circui in Fig

104 [ V V ] in / c3( ) sin o ( ) ix = ω Z r (4.6) Thus, he auxiliary ransformer primary curren, i pri, which increases wih resonance beween he leakage inducor, L lk, and he resonan capacior, C 3, is given by where Z = L / C3 and o [ V V ] / ( ) i = sin ω ( ) i ( ) (4.7) in c3 pri r Lm Zo lk ω r =, Vc 3( ) is he volage across he resonan L C lk 3 capacior C 3 a. Mode [, 3 ]: A, S is urned off by he PWM command, and he sum of wo ransformers primary curren will charge and discharge he MOSFET capaciors C s and C s, respecively. A, C s and C s can be fully discharged and charged under any oupu curren condiion due o load-independen magneizing curren i Lm, hen he body diode of swich S is on, hus S can be urned on a zero-volage condiion a inerval [, 3 ]. Wih C s being discharged, swich volage v ds sars falling. The energy sored in C, C is ransferred o he oupu load. A inerval [, ], he MOSFET capaciors C s and C s ge charged and discharged, respecively. Under zero-load condiion which he worse case for his circui, he main ransformer (TR) primary curren is zero, i pri = and he auxiliary ransformer (TR) primary curren, i pri, is designed o have he abiliy o fully charge and discharge he oupu capaciors of he swiches o guaranee he devices under ZVS condiion. V in S v ds C s v ds i = i pri Lm S L m C s Fig.4.9 The equivalen circui under zero load condiion (wors case) Fig.4.9 shows how he circui guaranees he devices under ZVS condiion only if he L m is designed well o guaranee he curren, i Lm, is big enough o fully charge and 94

105 discharge he oupu capaciors of he swiches. In his case, L m is resonan wih C s //C s and he maximum resonan ime is a quarer of he swiching period. where ω = / L ( C C ) m m s s ( ) v = V cos ω ds in m The recified volage, v rec, sars falling o he valley as rec in (4.8) v = n V (4.9) A inerval [, 3 ]: The body diode of S is on and swich S volage v ds is zero. The TR primary curren sars o be reseing effecively by he parallel secondary-side DC volage source produced by LLC half-bridge converer. The equivalen circui a his inerval is shown in Fig.4., as well as he key zoomed waveforms. L lk i pri :n L i pri lk v TR C v c (a) i x :n L o rec C o C3 i L Lm m C (b) TR R o v sec v o v GS v GS vrec i pri i pri v ds S S S 3 S 4 v i m o Fig.4. (a), (b) he equivalen circui for Mode [, 3 ]; (c) he key zoomed waveforms From Fig.4., i can be seen ha he primary curren of he main ransformer decreases wih he slope as follows. dipri n V in L lk d n = (4.) Since L lk can be designed very small because here is no need o consider he radeoff resuling from L lk in his proposed circui, he reseing ime can be very shor. And he magneizing curren i Lm sars o decrease wih a consan slope as 95

106 dilm Vin / d = L (4.) Mode [ 3, 5 ]: A 3, S can be urned on under zero-volage condiion by PWM command. The gae of S 3 remains on bu no curren flowing hrough S 3. A 4, he swich S 3 urns off by PWM command under zero curren condiion since he ransformer TR curren keeps zero. The energy sored in C, C is ransferred o he oupu load. Mode [ 5, 6 ]: A 5, IGBT S 4 is urned on. The TR secondary curren value sars increasing unil i arrives a curren level of he oupu inducor. The equivalen circui a his inerval is shown in Fig.4., as well as he key zoomed waveforms. m i pri :n L lk V in v TR v c (a) L o rec C o L i pri i x lk :n C3 i L Lm m C (b) C TR R o v sec v o v GS v GS vrec i pri i pri v ds S S S 3 S 4 v i m o Fig.4. (a), (b) he equivalen circui for Mode [ 5, 6 ];(c)he key zoomed waveforms From Fig.4., i can be seen ha he slope of he TR primary curren can be simply expressed as dipri n.5n Vin = (4.) d n L lk where n and n are he secondary-o-primary urns raio of TR and TR respecively; L lk is he primary leakage inducance of TR and i pri is he primary curren of he main ransformer TR. Duy cycle loss occurs during his inerval. This proposed circui can have he poenial o ge very small duy cycle loss because he leakage inducance of he main ransformer is independen of he zero-volage-swiching and can be minimized. 4.. Design Consideraions The design consideraions and seps are he same as he one proposed in chaper 3, bu some of resuls are differen and beer as follows. 96

107 All he oher circui parameer designs are referred o chaper3. a) Transformers Turns Raio According o he volage-second balance across he oupu inducor and he secondary recifier volage waveform shown in Fig. 4., we can obain ( nv.5nv - V ) D = ( V - nv ) (- D ) (4.3) in in o eff o in eff where D eff is he effecive duy cycle. nv.5nv V rec in in V o nv in Fig.4. The secondary recifier volage waveform Then, he seady sae volage gain in coninuous conducion mode can be described as V / V = D ( n -.5 n ) n (4.4) o in eff where n < n. This equaion shows ha he volage gain varies beween n (when D=) and n (when D=) as illusraed in Fig.4.3. V / V o n.5n in Fig.4.3 Volage gain vs. effecive duy cycle Therefore, he secondary-o-primary urns raio n of TR and n of TR should be chosen as b) Duy Cycle Loss n = V / V.5 V / V (4.5) o,max in,min o,min in,max n V / V = (4.6) o,min in,max From Fig.4.4 and he opology mode [ 5, 6 ] shown in Fig.4.5, he duy cycle loss seen by he oupu inducor can be derived as Δ D = loss n eff D n Llk Io fs n n V (.5 ) in (4.7) 97

108 where I o is he oupu curren. I is clear from he equaion (7) ha if L lk is close o zero, he duy cycle loss is close o zero. Here, L lk can be designed very small because he zerovolage-swiching range is independen of he value of L lk in his circui. nv.5nv in in v rec V in nv in v pri i pri ΔD loss ( Ts /) Trese T ZCS / T s Fig. 4.4 Waveforms of recified volage v rec, main ransformer TR primary volage v pri and main ransformer TR primary curren i pri Suppose n and n are he secondary-o-primary urns raio of TR and TR in he proposed one in chaper 3, respecively, and hen he equaion (4.7) becomes ( ) ( ) n.5n Llk Io fs Δ Dloss = n n V in (4.8) c) Oupu Inducance Fig.4.5 (a) is he recified volage waveform of he convenional full bridge converer. The peak-o-peak curren ripple can obained from chaper3, repeaed here as follows. T V Δ i ( V ) = ( n ) V (4.9) s o pk pk o o nl o Vin Fig.4.5 (b) is he recified volage waveform of he proposed converer. The peak-opeak curren ripple can obained from chaper3, repeaed here as follows. V T V V Δ i ( V ) = ( n )( n ) in s o o pk pk o ( n n) Lo Vin Vin (4.) V rec nv in V o nv V rec in V o nv in nv.5nv in in V o nv in (a) (b) (c) (a) Convenional FB converer; (b) he proposed converer; (c) he improved converer Fig. 4.5 Volage waveforms of recifier V rec 98

109 Fig.4.5 (c) is he recified volage waveform of he improved converer. The peak-opeak curren ripple can be expressed as VT V V Δ i ( V ) = ( n.5 n )( n ) in s o o 3pk pk o ( n.5n) Lo Vin Vin By solving he equaions () and (9), i yields Δ i Δ i n = n 3 pk pk,max pk pk,max (4.) (4.) Suppose n and n are he secondary-o-primary urns raio of TR and TR in he proposed one in chaper 3, respecively, and hen he equaion (4.) becomes Δi3 pk pk,max n = Δ i n n n ( ) pk pk,max (4.3) And he raio of he proposed one in Chaper 3 o he convenional one is repeaed as follows. Δi Δi n = n pk pk,max pk pk,max (4.4) where n <n. And given n :n =4:9, he relaionship of he normalized oupu volage and normalized oupu inducor peak-o-peak curren is shown in Fig Normalized curren ripple Convenional Proposed Improved Normalized oupu volage Fig. 4.6 Normalized peak-o-peak oupu inducor curren vs. normalized oupu volage. I can be seen from Fig.4.6 ha he oupu inducor curren ripple in he proposed converer can be reduced by n /n compared o he convenional full bridge, which means he inducance can be reduced by n /n compared o he convenional full bridge under he same curren ripple condiion, and he oupu inducor curren ripple in he improved converer can be reduced by n /(n -n )compared o he convenional full bridge, which 99

110 means he inducance can be reduced by n /(n -n )compared bridge under he same curren ripple condiion. Since n <n, improved converer has smalles curren ripple. o he convenional full i can be seen ha he 4.3 Simulaion Verificaion Based on he previous analysis, he circui is designed and he simulaion circui is shown in Fig.4.7. Correspondingly, he simulaion resuls are given a full load (wors case for IGBTs ZCS condiion) and no load (wors case for MOSFETs ZVS condiion) shown in Figs.4.8~. Fig.4.7 Power sage of he simulaion circui The specificaions are given in able 4. as follows. Table 4.: Simulaion specificaions Inpu Volage Oupu Volage Oupu Power Swiching Frequency Full load ( wors case for IGBT ZCS ) 39V 385V 6.6kW 46.7kHz No load ( wors case for MOSFET ZVS ) 39V 385V W 46.7kHz From Fig.4.8, i can be seen ha ZCS operaion of he main device IGBTs is verified by he simulaion waveforms of he IGBT (S 4 ) volage V ce4, device curren i c4, and gae

111 volage G 4. Before he gae is urned off, he device curren i c4 is zero, so he IGBT operaes a zero-curren swiching condiion in he wors case of he maximum oupu power. IGBT ZCS urn off Fig.4.8 IGBT waveforms of he volage, curren, and is gae a full load I can be seen from Figs. 4.9, 4. ha he main swiches of MOSFETs demonsrae ZVS operaion wih load curren adapabiliy. Fig.4. shows he device MOSFET, S, drain-o-source volage v ds and is gaing signal G a he full load condiion and Fig.4. shows v ds and G a no load curren condiion. By observing ha v ds drops o zero before G urns ON a differen oupu curren levels, boh figures clearly indicae ha ZVS is achieved from rue zero o full load. MOSFET ZVS urn on Fig.4.9 MOSFET waveforms of he volage, curren, gae and oupu curren a full load

112 MOSFET ZVS urn on Fig.4. MOSFET waveforms of he volage, curren, gae and oupu curren a no load The fas rese of he circulaing curren of he ransformer TR during he oupu inducor freewheeling inerval is illusraed in Fig.4.. The secondary side curren i sec of ransformer TR drops o zero in.7µs wih he low leakage inducance because ha ZVS of MOSFET can be achieved in he converer even while he leakage inducance is zero. I also can be seen ha full-bridge diode D is urned off under relaively low volage wihou severe reverse curren. =.63μs Fig. 4. Full-bridge diode D waveforms of volage, curren and is associaed ransformer secondary curren a full load

113 ZVS urn off ZCS urn on Fig. 4. Half-bridge diode D5 waveforms of volage and is associaed ransformer secondary curren a full load Fig. 4. shows he waveforms of he half-bridge diode ZCS urn-on and urn-off in he wors case of full load condiion. The well-clamped volage sress and ZCS operaion of he half-bridge diode imply ha he diode volage sress is low and he low-volage drop diode can be uilized o furher improve he efficiency. 4.4 Comparisons beween he Proposed and Improved Converers These wo converers have many similariies, which are also heir advanages, as follows. ) Wih he parallel LLC resonan half-bridge configuraion, zero-volage swiching of MOSFETs in he leading-leg can be ensured from rue zero o full load, and hus, he super-juncion MOSFET wih slow reverse recovery body diode can be reliably used. ) IGBTs in he lagging-leg work a zero-curren swiching wih minimum circulaing conducion loss because he parallel secondary-side DC volage source effecively rese he circulaing curren, herefore, he urn-off loss and he conducion loss of he IGBTs are significanly reduced. 3

114 3) Duy cycle loss is negligible since he leakage inducance of he main ransformer can be minimized wihou losing ZVS operaion, hus, he curren sresses hrough he primaryside semiconducors are minimized by he opimized urns raio of he main ransformer. 4) The opologies are suiable for wide-range oupu volage or curren source applicaions because of he buck-ype configuraion wih he simple phase-shif pulse widh modulaion, and hus, hey are a good candidae for he elecrical vehicle baery charger. And his improved converer demonsraes beer performances han he previous proposed one does. a) Energy Transfer Mehod These wo converer opologies are repeaed here in Fig.4.3 (a),(b). S 3 V in S 4 C S S Llk ipri TR i pri S v ds i Lm L m Llk TR C 3 V in L lk C 3 i Lm L m TR S i pri S C S v ds i pri TR S 3 L lk S 4 C S C S D D D 3 D 4 D 5 D 6 D 7 C C vrec L o C o R o Vo D 5 D 6 C C D 3 D 4 D D L o C v o rec R o V o (a)the converer proposed in CH3 (b) The improved converer in CH4 Fig. 4.3 Circui configuraions of he wo converers Fig.4.3 (a) shows ha he oupu of LLC half bridge converer and he oupu of he phase shifed full bridge are in parallel o ge he energy ransferred. When i operaes a ( ) < < D T /, he phase shifed full bridge converer is in charge o ransfer he eff s energy o he load and no energy sored in C or C ge ransferred while he LLC converer charges he capaciors C or C. Only when i operaes a ( ) D T / <, he energy sored in C or C ges ransferred o he load by he LLC converer. Thus when he effecive duy cycle ransferred o he load. D eff approaches one, he energy sored in C or C has no chance o be eff s 4

115 Fig.3 (b) shows ha he LLC half bridge converer and he he phase shifed full bridge are in series o ge he energy ransferred. When i operaes a D ( T /) < <, he phase shifed full bridge converer ransfers he energy o he load and also energy sored in C or C ge ransferred o he load while he LLC converer charges he capaciors C or C. When i operaes a ( ) D T / <, he energy sored in C or C ges eff s ransferred o he load by he LLC converer. Thus whaever he effecive duy cycle is, he energy sored in C or C is always ransferred o he load. b) Transformer Size The secondary recifier volage waveforms for hese wo converers are repeaed here in Fig.4.4. eff s D eff nv V rec in V o nv in (a) nv.5nv V rec in in V o nv in (b) (a) The converer proposed in CH3 (b) The improved converer in CH4 Fig.4.4 The secondary recifier volage waveform From Fig.4.4, i can be seen ha he raio of he main ransformer in he improved converer can be.5n smaller han ha in he converer proposed in Chaper3 under he same specificaions due o he energy sored in C or C ransferred o he load during he inerval D ( T /) < <. eff c) Oupu Inducor Size s Normalized curren ripple Convenional Proposed Improved Normalized oupu volage Fig. 4.5 Normalized peak-o-peak oupu inducor curren vs. normalized oupu volage 5

116 Suppose n is he same in he convenional full bridge, he proposed one in Chaper3 and he improved one in his chaper, i can be seen from Fig.4.5 ha he oupu inducor curren ripple in he proposed converer can be reduced by n /n compared o he convenional full bridge, which means he inducance can be reduced by n /n compared o he convenional full bridge under he same curren ripple condiion, and he oupu inducor curren ripple in he improved converer can be reduced by n /(n -n )compared o he convenional full bridge, which means he inducance can be reduced by n /(n - n )compared o he convenional full bridge under he same curren ripple condiion. Thus n( n n) he inducance can be reduced by compared o he proposed converer. Since n ( n n ) n <n, i can be seen ha he improved converer has smalles curren ripple. 4.5 Summary To solve he problem a he cerain case in he previous proposed novel hybrid resonan and PWM converer in chaper 3, an improved hybrid resonan and PWM converer has been proposed. Is basic operaion has been analyzed and verified by simulaions. Table 4. summarizes he performances of hese four converers. Table 4.: Phase-shifed full bridge, LLC, Previous Proposed and Improved Converers Conrol ZVS Circulaing Consan Curren Oupu diode mehod range curren and Volage volage sress PS FB Fixed Limied frequency range High Yes High LLC Variable Full frequency range Low No Low Proposed Fixed Full converer frequency range Low Yes Low Improved Fixed Full converer frequency range Low Yes Low From Table 4. i can be seen ha he improved hybrid converer can keep all he advanages of he previous proposed converer in chaper 3 repeaed as follows: 6

117 ) Wih he parallel LLC resonan half-bridge configuraion, zero-volage swiching of MOSFETs in he leading-leg can be ensured from rue zero o full load, and hus, he super-juncion MOSFET wih slow reverse recovery body diode can be reliably used. ) IGBTs in he lagging-leg work a zero-curren swiching wih minimum circulaing conducion loss because he parallel secondary-side DC volage source effecively rese he circulaing curren, herefore, he urn-off loss and he conducion loss of he IGBTs are significanly reduced. 3) Duy cycle loss is negligible since he leakage inducance of he main ransformer can be minimized wihou losing ZVS operaion, hus, he curren sresses hrough he primary-side semiconducors are minimized by he opimized urns raio of he main ransformer. 4) The opology is suiable for wide-range oupu volage or curren source applicaions because of he buck-ype configuraion wih he simple phase-shif pulse widh modulaion, and hus, i is a good candidae for he elecrical vehicle baery charger. And heoreically he improved converer demonsraes beer performances han he previous proposed one does. ) The auxiliary ransformer is uilized fully since he LLC half bridge converer and he phase shifed full bridge are in series o ge he energy ransferred. When i operaes a ( ) < < D T /, he phase shifed full bridge converer ransfers he energy o he eff s load and also energy sored in C or C ge ransferred o he load while he LLC converer charges he capaciors C or C. When i operaes a ( ) D T / <, he energy sored in C or C ges ransferred o he load by he LLC converer. Thus whaever he effecive duy cycle D eff is, he energy sored in C or C is always ransferred o he load. ) The main ransformer can be smaller. I is.5n smaller han ha in he converer proposed in Chaper3 under he same specificaions due o he energy sored in C or C ransferred o he load during he inerval D ( T /) < <. 3) The oupu inducor can be smaller han ha in he proposed converer in chaper 3. eff s eff s 7

118 Conclusion In his hesis, key feaures of differen isolaed DC-DC converers are discussed, and wo new hybrid isolaed converers are proposed for he EV baery charger applicaion. The convenional isolaed DC-DC converers suiable for high power applicaions are phase-shifed full-bridge and LLC converer. Alhough hey are suiable for high efficiency, high power densiy and high reliabiliy, hey are also limied in some operaing ranges. To make full use of heir advanages and o avoid heir drawbacks of losing zero-volage swiching and oupu regulaion, a novel hybrid resonan and PWM converer combining resonan LLC half-bridge and phase shifed full-bridge opology is proposed for high efficiency and rue full sof-swiching range, which is very criical for he baery charger applicaion because he baery requires a consan curren charging wih variable volage and a consan volage charging wih variable curren. A 3.4-kW hardware prooype has been designed, implemened and esed o verify ha he proposed hybrid converer ruly avoids he convenional converers while mainaining heir advanages. In his proposed hybrid converer, he uilizaion efficiency of he auxiliary ransformer is no ha ideal. When he duy cycle is large, LLC converer charges one of he capaciors bu he energy sored in he capacior has no chance o be ransferred o he oupu, resuling in he low uilizaion efficiency of he auxiliary ransformer. To uilize he auxiliary ransformer fully while keeping all he prominen feaures of he previous hybrid converer, an improved hybrid resonan and PWM converer is proposed, and is basic operaion is analyzed and simulaed o verify he validiy. These wo proposed converers show some common advanages as described below. ) Wih he parallel LLC resonan half-bridge configuraion, zero-volage swiching of MOSFETs in he leading-leg can be ensured from rue zero o full load, and hus, he super-juncion MOSFET wih slow reverse recovery body diode can be reliably used. ) IGBTs in he lagging-leg work a zero-curren swiching wih minimum circulaing conducion loss because he parallel secondary-side DC volage source effecively rese he circulaing curren, herefore, he urn-off loss and he conducion loss of he IGBTs are significanly reduced. 8

119 3) Duy cycle loss is negligible since he leakage inducance of he main ransformer can be minimized wihou losing ZVS operaion, hus, he curren sresses hrough he primaryside semiconducors are minimized by he opimized urns raio of he main ransformer. 4) The opologies are suiable for wide-range oupu volage or curren source applicaions because of he buck-ype configuraion wih he simple phase-shif pulse widh modulaion, and hus, hey are a good candidae for he elecrical vehicle baery charger. The improved hybrid converer demonsraes some addiional advanages: ) The auxiliary ransformer is uilized fully since he oupu of he LLC resonan converer is in series wih he oupu load, hus he energy sored in he capacior can be ransferred o he oupu. ) The main ransformer can be smaller because he energy sored in he capacior, which was charged by he LLC converer in he las effecive duy cycle, can be ransferred o he oupu during he effecive duy cycle. 3) The oupu inducor of he improved hybrid converer can be smaller han ha of he firs proposed hybrid converer. 9

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