Analog outputs. Public Document. VS10XX AppNote: Connecting analog outputs



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: Connecting analog outputs Description This document describes how to protect the analog outputs of VS10XX series devices from ESD and how to make a prtoected line-out connection. It shows an example schematic and gives general info on output protection including issues with single ended line-out connections. This document applies to VS1001, VS1011, VS1002, VS1003, VS1033, VS1053 and VS1000. Revision Histor Rev Date Author Description 1.25 2009-03-23 In Figure 7 R3 and R19 changed to 10kOhms 1.24 2008-12-04 New line-out -circuit recommendation 1.23 2006-11-27 GBUF RC values changed to 10ohm and 47n 1.22 2006-08-18 Additional ESD protection and line-out info 1.21 2006-04-20 New Simple line-out schematic. 1.20 2006-04-06 Notes on power-down. 1.10 2006-03-06 More info on ESD. 1.00 2006-02-28 Initial revision. Rev. 1.25 Page 1(10)

Table of Contents 1 Background 3 1.1 What is ESD?.............................. 3 2 Output Connection Using GBUF 4 2.1 Additional ESD Protection....................... 5 3 Line-out Connection 6 3.1 Recommended Connection....................... 7 3.2 Simple Connection........................... 8 4 Document Version Changes 9 5 Contact Information 10 List of Figures 1 The Human Bod Model (HBM)................... 3 2 The Machine Model (MM)....................... 3 3 Minimal output connection using RC-protection........... 4 4 ESD protection using Transient Voltage Supressor (TVS)...... 5 5 ESD protection using diodes...................... 6 6 Ground loop is formed when GBUF and USB is connected to PC ground................................. 6 7 Transient free line-out connection................... 7 8 Simple line-out connection....................... 8 Rev. 1.25 Page 2(10)

1 Background VS10XX devices are qualified to withstand an ESD charge of 2 kv accroding to MIL-STD-883 method 3015.7 HumanBod Model (HBM). Additional protection is needed when VS10XX s analog outputs are connected to external connectors that ma give higher energ electrical shocks than the HBM. An example would be earphones with long cable, where up to 15 kv ESD pulses need to be treated. 1.1 What is ESD? ESD (ElectroStatic Discharge) generall means the discharge of energ charged between two subjects. ESD is generated from two insulators or a conductor and an insulator rubbing together. Electrons transfer from one subject to the other and a charge is generated. For example, a person walking across a carpet floor can generate a static charge of over 10kV. Two most common ESD models used in IC testing are Human Bod Model and Machine Model. Figure 1: The Human Bod Model (HBM) Figure 2: The Machine Model (MM) The Human Bod Model (HBM) replicates the tpical discharge from the finger of a standing person of average weight and height. Testers use a 100pF capacitor in series with a 1500ohm resistor to simulate the ESD from people. (Figure 1) Rev. 1.25 Page 3(10)

Machine Model (MM) shown in figure 2 replicates the charge generated b for example pick and place IC handlers or soldering iron. The MM has no series resistance but a larger capacitor. The voltages in MM test are generall lower than in HBM. Due to the lack of the series resistor chips often fail in lower voltages than in HBM tests. (Reference: Carl Duff, AMD, Test & Measurement Europe/April- Ma 1998) Our qualification tests use the HBM. IC s are tested (or shot ) with three positive and three negative pulses between each pin. Ground pins are grouped together. Each pin is then tested against GND. Next each pin is tested against each power pin group. In last phase each IO pin is tested against an other IO pin. 2 Output Connection Using GBUF In VS10XX devices the analog output pins (LEFT, RIGHT and GBUF) are biased close to 1.25V to allow DC-coupling to headphones. Minimal recommended output connection is shown in figure 3. The RC-combo on each analog pin protects the VS10XX device from ESD surges on the analog signals. The RC-combo also provides a resistive load for the DAC at high frequencies and must not be omitted even if other methods of ESD protection are used. Notice the different values for R4 and C5. Figure 3: Minimal output connection using RC-protection Laborator tests show that this connection can tolerate 8kV ESD pulses (HBM) repeatedl with no damage to the VS10XX device. Depending on the application the sstem ma halt or reset itself but the VS10XX device is not damaged. Tests were cunducted with Prototping board (http://www.vlsi.fi/plaer vs10xx proto/plaer.shtml) and ESD pulses were shot to the output connector with power on and with and wihtout headphones. Rev. 1.25 Page 4(10)

To prevent ESD surges entering the PCB the RC-combo should be placed as close to the output connector as possible. High frequenc capacitors with low internal resistance should be used. 2.1 Additional ESD Protection Extra protection can be achived b using a suitable TVS (Transient Voltage Supressor). Figure 4 shows one wa of connecting TVS to VS10XX. The TVS should be connected as close to the input connector as possible. Qualit device with short turn-on time and suitable clamping voltage and peak pulse power should be selected. Figure 4: ESD protection using Transient Voltage Supressor (TVS) Our laborator tests show that with a good TVS device VS10XX devices can tolerate ESD pulses (HBM) up to 10kV contact discharge and 16kV air discharge (HBM). Test setup was the same as with RC protection. ESD protection diodes can also be used to provide extra protection. Figure 5 shows one wa of using diodes to protect the analog signals. Notice C8 which provides a short path to GND for positive ESD surges when a short connection to AVDD is not possible. Traces on PCB must be kept as short as possible to minimize parasitic inductances. Good grounding is essential. Ground plane should be used for best performance. Rev. 1.25 Page 5(10)

Figure 5: ESD protection using diodes 3 Line-out Connection It s not recommended to use GBUF as audio ground when connecting to other electrical equipment such as power amplifiers or PC line-inputs. The GBUF pin is internall biased to 1.25V and it is possible that a ground loop is formed when the GBUF is connected to the ground of the target device. This ma damage the VS10XX device and will prevent normal operation. Figure 6: Ground loop is formed when GBUF and USB is connected to PC ground A ground loop can happen for example with a VS10XX application that uses GBUF and has USB or Ethernet connected and the output of VS10XX is connected to a PC souncard. Figure 6 illustrates this situation. DC blocking capacitors should be Rev. 1.25 Page 6(10)

used and the outputs referenced to ground. Notice: GBUF must not be connected to ground! 3.1 Recommended Connection A power-on transient is a general problem of an single-ended audio device. Since the analog outputs are biased above zero there will be a pop when the coupling capacitors charge during power-up. This chapter shows a wa to minimize this transient. Figure 7 shows a high qualit and cost-effective solution to the transient problem. The circuit uses bipolar NPN transistors to hold the outputs near ground level when the output capacitors charge. PNP transistors are used to drive the NPN s. This wa when the output mute is off (the /MUTE signal is high) and the output signal goes below ground the NPN will not conduct due to reverse gain of the NPN. The circuit was measured with Rohde&Schwarz audio analzer. It did not effect the THD+N performance of the analog output in normal operation mode. In Mute -mode the attenuation was approximatel 40dB. Figure 7: Transient free line-out connection Usage (power-up): 1. Keep VS10XX in reset 2. Use uc to pull the /MUTE signal down. 3. Release VS10XX from reset (set XRESET high) Rev. 1.25 Page 7(10)

4. Wait for 100ms 5. Turn /MUTE high to enable outputs. Usage (power-down): 1. Pull /MUTE low to mute outputs. 2. Shutdown VS10xx The value of coupling capacitors (C1 and C68) should be chosen based on the input impedance of the amplifier the VS10XX will be connected to and on the low freq cut-off desired. R2 and R80 should be in the range from 10k to 100k ohms. The cut off frequenc is calculated as follows: f 3dB = 1 where: C = C1 2πRC R = R1 + R2 R load R2+R load and R load is the resistance of the load. Bigger C will give lower cut-off frequec but increases required wait time to disable the mute circuit. C2 and C69 form a low-pass filter with R1 and R79. This filters some of the quantization noise of the Delta-Sigma DA-converter. The values can be adjusted to suit the application. 470ohm/3.3nF gives Fc of approx 100kHz. 3.2 Simple Connection Figure 8 shows the current recommendation for a simplified line-out connection. This connection is suitable for example when connecting VS10XX to an external on-board amplifier. Some transient in the outputs during power up and down will occure if the startup is not slowed down with software. Figure 8: Simple line-out connection Rev. 1.25 Page 8(10)

4 Document Version Changes This chapter describes the most important changes to this document. Version 1.25, 2005-03-23 In Figure 7 R3 and R19 changed from 100ohms to 10kOhms. Version 1.24, 2008-12-04 New line-out -circuit recommendation. Bipolar transistors used instead of analog switch. Version 1.23, 2006-11-27 GBUF RC values changed to 10ohm and 47n Version 1.22, 2006-08-18 Updated ESD protection recomendations. Added TVS info. Added info on line out. Version 1.21, 2006-04-20 Updates to line-out schematic and a new simplified line-out connection. Version 1.20, 2006-04-06 Notes on power-down. Version 1.10, 2006-03-06 More detailed ESD info added. Version 1.00, 2006-02-28 Initial version. Rev. 1.25 Page 9(10)

5 Contact Information VLSI O Hermiankatu 8 B FIN-33720 Tampere FINLAND Phone: +358-3-340 8222 Email: mp3@vlsi.fi URL: http://www.vlsi.fi/ Note: If ou have questions, first see http://www.vlsi.fi/vs1001/faq/ http://www.vlsi.fi/vs1011/faq/ http://www.vlsi.fi/vs1002/faq/ http://www.vlsi.fi/vs1003/faq/ http://www.vlsi.fi/appnotes/ Rev. 1.25 Page 10(10)