Computer Science Personal Computer (PC) Architecture Cezary Bolek cbolek@ki.uni.lodz.pl University of Lodz Faculty of Management Department of Computer Science Case Power supply Personal Computer construction Processor Memory Extension cards Graphic card Sound card Network card, etc. Mass storage Hard drive Floppy drive CDROM Motherboard Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> Motherboard, Mainboard Mechanical base for computer components such as memory, processor, etc. Multilayer (37 layers) Printed Circuit Board (PCB) Sockets for processor, memory modules, extension cards System and external buses Set of integrated circuits (chipset) Readonly memory (ROM) containing boot program (BIOS) Nonvolatile RAM memory where computer configuration is stored Real Time Clock (RTC) Electromagnetic interference! very high operating frequency limitations for length and shape of interconnections board screening Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 3 1
Motherboard evolution Before ~19931995: only basic components of system (chipset+bios): expansion slots according to ISA bus standard processor socket (no mechanical insertion support) the oldest DIL (Dual In Line) modern: PGA (Pin Grid Array) keyboard plugin sockets memory modules sockets After ~19931995: tendency to integrate additional computer components (controllers: in/out, drives, graphics, sound, network) new processor sockets: ZIP (Zero Insertion Force) variety of expansion slots (ISA, PCI, VLB, AGP) Configuration standards: (form factor) AT, (babyat), ATX (microatx max:xmm) Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> Motherboard Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 5 Motherboard construction Expansion slots ISA, PCI AGP Sound Chip Game Port Parallel and serial port connectors Mouse and keyboard connectors USB connector Processor socket or slot Bios memory Memory sockets Power supply connector SCSI chipset SCSI devices controller conn. IDE devices controller conn. CMOS RAM battery Floppy disc controller connector Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 6
BIOS Basic InputOutput System (PC Firmware) ROM memory containing startup program which is executed after computer power up. Hardware configuration checking (processor type, memory size, extension cards, storage media presence) Hardware testing for failure POST (PowerOn Self Test + audible diagnostic signals) Bootstrap operating system loading from mass storage system. Data source fixed in CMOS RAM (hard drive, CDROM, floppy, network) BIOS memory in general cannot be changed programmatically what ensures that system will always boot. But, usually BIOS is implemented in Flash Memory, what allows periodical changes by reprogramming (bios upgrade) www.wimsbios.com Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 7 PnP BIOS (Plug and Play) PnP automatic configuration, selfconfiguration of expansion cards in PC system input/output address space fixing interrupt number Input/output address space allows exchange data between external device and processor Interrupts mechanism which allows devices to notify the processor that they need immediate service For older BIOS all external devices configuration must have been performed manually (card configuration) to avoid hardware conflicts. Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 8 Microprocessors Type Year Processor clock Memory clock Multplier Cache L1 Cache L (builtin) Memory space Transistors number 8086 1978,778,778 1MB 9 tys. 8088 1980,778,778 1MB 9 tys. 8086 198 60 60 16MB 13 tys. 80386DX 1985 1633 1633 GB 75 tys. 80386SX 1988 1633 1633 16MB 75 tys. 8086DX 1989 550 550 8kB GB 1, mln 8086SX 1991 550 550 8kB GB 1,18 mln 8086DX 199 5080 50 8kB GB 1, mln 8086DX 199 7510 50 3 8KB+8KB GB 1,6 mln Pentium 1993 6000 6066 13 8KB+8KB GB 3,1 mln Pentium Pro 1995 16600 6066,53 8KB+8KB 5651KB 6()GB mln Pentium MMX 1997 16633 66,53,5 GB,5 mln Pentium II (Klamath) 1997 00 66 3,5,5 51KB (ext) 6()GB 7,5 mln Pentium II (Deschutes) 1998 6650 66100 3,55 51KB (ext) 6() GB 7,5 mln Celeron (Covington) (PII) 1998 66300 66,5 6() GB 7,5 mln Celeron (Mendocino) (PII) 1998 300533 66,58 18KB 6() GB 19. mln Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 9 3
Microprocessors Type Year Processor clock Memeory clock Multiplier Cache L1 Cache L (built in) Memeory space Transistors number Pentium III (Katmai) 1999 50600 100133 6 51KB (ext) 6GB 9,5 mln Pentium III (Coppermine) 1999 5001000 100133 7,5 56KB 6GB 8,1 mln Celeron II (Coppermine) 000 5331300 66100 813 18KB 6GB 8,1 mln Pentium III (Tualatin) 001 1133100 133 8,510,5 5651KB 6GB 8,1 mln Celeron II (Tualatin) 001 1G1,G 100 101 56KB 6GB Pentium M (Banias) (PIII) 003 1G1,7G 100 (00) 3K+ 3K 1MB GB 77 mln Celereon M (Banias) 003 1G,G 100 (00) 3K+ 3K 51KB GB Pentium M (Dothan) (PIII) 00 1G,G 100 (00) 3K+ 3K MB GB Pentium M (Yonah) (Dual) 006,13G 166 (667) 3K+ 3K MB GB Type Core Clock FSB Cache Additional inf. Willamette 1.3.0 GHz 100 (00) L1:8KB+1KB L:56KB PA Northwood 1.63.0 GHz 100 (00) L1:8KB+1KB L:51KB PB Northwood.03.06 GHz 133 (533) L1:8KB+1KB L:51KB Hyperthreading for 3.06+ GHz PC Northwood.3.+ GHz 00 (800) L1:8KB+1KB L:51KB Hyperthreading PE/5x0 series Prescott.83.8 GHz 00 (800) L1:16KB+1 KiB L:1 MB Hyperthreading, instrukcje SSE3 PA Prescott..93 GHz 133 (533) L1:16KB+1 KiB L:1MB bez Hyperthreading, instrukcje SSE3 Extreme Edition Gallatin 3.3. GHz 00 (800) L1: 8KB+1 L:51KB L3:MB Hyperthreading, addition of ondie L3 cache PF/5x1 series Prescott 3.3.8 GHz 00 (800) L1:16KB+1 KiB L:1MB EM6T (6bit extension) 6x0 series Prescott MB.83.8 GHz 00 (800) L1:16KB+1 KiB L:MB EM6T 6bit extension) Extreme Edition Prescott MB 3.73 GHz 66 (1066) L1:16KB+1 KiB L:MB Pentium D Smithfield.83. GHz 00 (800) L1:16KB+1KB x L:MiB Dual Core Processor, EM6T Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 10 Pentium Dual Core 006 cores, low budget Intel Core 8 th generation, 6bit x866 architecture 006 Model E00... E700 E6300... E6850 E700... E7600 E8190... E8600 Cores no. Clock Microprocessors 1600 MHz 600 MHz 1866 MHz 3000 MHz 530 MHz 3060 MHz 660 MHz 0 MHz FSB 00 00 66 66 66 Multiplier 8x 13x 7x 9x 9.5x 11,5x 8x 10x L Cache MB MB MB MB 3 MB 3 MB 6 MB 6 MB QPB 800 MHz 800 MHz 1 MHz 1 MHz 1 MHz Core Allendale Allendale Conroe Conroe Wolfdale Wolfdale Wolfdale Wolfdale Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 11 Intel Core Quad Microprocessors Model Cores no Clock FSB Multiplier L Cache QPB Core Q6600 39 MHz 66 9x 8 MB Kentsfield Q6700 660 MHz 66 10x 8 MB Kentsfield Q6850 96 MHz 66 11x 8 MB Kentsfield Q7600 700 MHz 00 13,5x MB 1 Mhz Q800 331 MHz 7x MB 1 Mhz Q8300 97 MHz 7,5x MB 1 Mhz Q800 66 MHz 8x MB 1 Mhz Q9300 97 MHz 7,5x 6 MB 1 Mhz Q900 66 MHz 8x 6 MB 1 Mhz Q950 66 MHz 8x 1 MB 1 Mhz Q9550 830 MHz 8,5x 1 MB 1 Mhz Q9650 997 MHz 9x 1 MB 1 Mhz Intel Core Extreme Model Cores no Clock FSB Multiplier L Cache QPB Core X6800 933 MHz 66 11x MB Conroe QX6700 667 MHz 66 10x 8 MB Kentsfield QX6800 96 MHz 66 11x 8 MB Kentsfield QX6850 3000 MHz 9x 8 MB 1 MHz Kentsfield QX9650 3000 MHz 9x 1 MB 1 MHz QX9770 300 MHz 00 8x 1 MB 1600 MHz QX9775 300 MHz 00 8x 1 MB 1600 MHz Harpertown Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 1
Intel Core i3 010 built in GPU (Graphics Processing Unit), physically separated silicon structure cores Direct Media Interface low end, Core continuation Microprocessors Codename Name Cache L3 Socket TDP Multipl. Clock I/O Bus Core i3560 MB 73 W 3.33 GHz Core i3550 MB 73 W 3.0 GHz Clarkdale Core i350 MB 73 W 3.06 GHz Core i3530 MB 73 W.93 GHz Arrendale Core i36xx Core i3350m Core i3370m Core i3 330UM Core i0m MB 3 MB 3 MB 3 MB 3 MB 73 W 35 W 35 W 18 W 35 W 17?? 16 3.33 GHz.6 GHz.0 GHz 1.0 GHz.13 GHz Direct Media Interface Integrated GPU Core i0e 3 MB 35 W?.13 GHz Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 13 Microprocessors Intel Core i5 posiadają 009 Niektóre wbudowany układ graficzny positioned between Core i3 and Core i7 Core i5 model 750 Seria 600 Cores no (threads) () () Core clock (GHz).66 3, 3,6 733 900 MHz Multiplier Min. Max. 9 0 9 5 Cache 3KB (instrukcje) + 3KB (dane) L1 / 3KB L1+3KB L1/rdzeń rdzeń 56KB / 56KB L/rdzeń rdzeń 8MB L3 dzielonej MB L3 dzielonej Memory controller x DDR3 800/1066/1 DMI.5GT/s (GigaTrans fers) TDP 95 W 73 87 W Socket LGA 1156 IO Bus DMI DMI, zintegro wane GPU Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 1 Microprocessors Intel Core i7 Cache L1: 3KB for instructions L1 and 3KB for data per each core L: 56KB instructions/data shared per each core L3: 8MB shared HyperThreading technology Bult in memory controllerddr3, IMC (Integrated Memory Controller) New system bus, QPI (QuickPath Interconnect) DMI (Direct Media Interface) New SSE instructions Socket LGA 1366 or Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 15 5
Microprocessor Trends Increase clock speed of processor and memory Increase width of data and address buses Evolution of instruction sets, main unit and Floating Point Unit (FPU) coprocessor Low cost versions of existing processors (SX, Celeron, Duron,...) Increase size of cache memory internal (L1) and external (L & L3) Advanced architectures: superscalar, pipelining, chaining, multithreading,... GPU, memory controller integration Specialized instruction sets: MMX, SSE, 3DNow,... Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 16 Microprocessor Complexity Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 17 Processor sockets Socket must conform processor terminals and packaging Efficient carrying of heat by radiator Passive cooling system: radiator + fan Radiator: base (copper, aluminum, ceramics) + ribbing Advanced, active cooling systems: water, electric (Peltier), cryogenic. Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 18 6
Processor Socket Evolution Socket 1 169terminals 86 processors (supply voltage 5V) and versions DX, DX, OverDrive Socket 38terminals Socket 1 modification for 86 processors Socket 3 37terminals Last socket for 86, supply voltage 5V and 3.3V Socket 73terminals Socket for first Pentium processors 60/66 MHz, 5V Socket 5 30terminals Socket for Pentium 75/133 MHz, 3.3V Socket 6 35terminals Socket 3 extension for 86, very rare Socket 7 31terminals Very popular socket for Pentium MMX and clones, dual voltage Socket 8 387terminals Socket for Pentium Pro only Slot 1 terminals For Pentium II, III and Celerons, L cache memory in processor cartridge Slot 330terminals For Pentium II, III and Xeon with bigger cache memory Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 19 Microprocessor Sockets Evolution Slot A terminals Mechanically identical to Slot1 but electrically different, for AMD Athlon processors Socket 370 370 terminals Slot 1 replacement for new Pentium II, III and Celeron Socket 3 3 terminals For Pentium, better heat dissipation and more efficient cooling systems Socket A 6 terminals For newer AMD Athlon, Athlon XP and Duron with bigger cache memory Socket 78 78 terminals Smaller version of 3 for newer Pentium processors Socket 603 603 terminals For Pentium Xeon with bigger cache memory, multiprocessor support Socket 75 75 terminals Socket for new AMD Athlon 6 processors Socket 90,939 939 terminals Improved socket for new Athlon 6 and Opteron processors Socket 775 (LGA775, T) 775 terminals Socket for newest Pentium, PEE, Celeron (Prescott i Smithfield core) Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 0 Processor sockets LGA 775 (Socket T) Wolfdale codename: Core Duo (E700, E7300, E700, E7500, E7600, E800, E800, E8500, E8600, E8700) Intel Pentium Dual Core (E500, E5300, E500, E5500, E5700, E6300, E6500, E6500K, E6600, E6700, E6800) Conroe codename : Core Duo (E500, E6300, E630, E600, E60, E6500, E6600, E6700, Extreme Edition) Pentium Dual Core (E10, E160, E180, E00) Kentsfield codename : Intel Core Quad (QX6600) Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 1 7
(Socket H) Lynnfield codename Ewolucja gniazd procesora Core i5 i57xx Core i7 i78xx, i7600 Xeon L3xx, X3xx Clarkdale codename Pentium G6xxx Core i3 i35xx, i36xx, i33xx Core i5 i56xx Arrendale codename Core i3 i3350m, i3370m, i0um, i0m i0e LGA 1366 (Socket B) Core i7 i79xx Xeon 5500 series Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> Input/Output Buses I/O buses are interfaces between computer system and devices located on expansion cards. Construction of motherboards, processors and memory chips changes fairly often, but I/O interfaces relatively rarely. This allows to use typical expansion cards in every PC computer. ISA (Industry Standard Architecture 198) the oldest, clock speed.77 i 8MHz, max. transfer speed 8MB/s (not enough for grpahic cards, hard drives, network), PCI (Peripheral Component Interconnect 1993) universal and efficient, clock speed 33,66MHz, max. data transfer speed 66MB/s, support for PnP, PCIExpress (PCIe, PCIE 003) universal, efficient serial bus, clock speed.5 GHz, max. transfer speed 50MB/s (per line) AGP (Accelerated Graphics Port ) efficient local bus optimized for graphic cards controllers, max. transfer speed up to GB/s, clock speed = 1x, x, x, 8x frontside bus, Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 3 AGP Bus AGB Bus controller is connected to System Bus, what offers high speed data transfer between: AGP graphic card and processor AGP graphic card and RAM memory Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 8
PCI Express Bus very high data transfer speed serial architecture pointtopoint connection possibility to plug/unplug cards during computer work (hot plug/swap) target to eliminate other I/O buses introduced in 003, first computers equipped with PCI Express: 00 PCIe x1 (00) x (00) x (00) x8 (00) x16 v. 1.0 (00) x16 v..0 (007) x16 v. 3.0 (0011) Speed 50 MB/s 500 MB/s 1000 MB/s 000 MB/s GB/s 8 GB/s 16 GB/s Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 5 Hard Disc Interfaces IDE (Integrated Drive Electronics) hardware solution for data transfer to/form hard drive Data exchange protocol (interface) for IDE devices: ATA (AT Attachment) IDE device controllers with ATA interface are connected to I/O buses: ISA, VLBus or PCI (presently) IDE architecture allows to connect only hard drives, maximum storage capacity 58MB per drive, data transfer speed 3MB/s limitation, bottleneck for mass storage systems Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 6 EIDE Standard Enhanced IDE IDE devices: two channels masterslave faster data transfer up to 16MB/s (ATA 199) max. disc capacity 8.GB and (1998) 137GB support for other devices (CDROM) extension ATA to ATAPI support for Direct Memory Access (DMA) Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 7 9
And faster... Ultra ATA ATA 3 (1996) SMART (SelfMonitoring Analysis and Reporting Technology) ATA (1997, Ultra ATA) data transfer speed 33MB/s (ATA 33), support for error correction CRC (Cyclical Redundancy Check), ATAPI integration ATA 5 (1999) data transfer speed 66MB/s (ATA 66), new 80wire connecting tapes (so far 0wire) ATA 6 (000) data transfer speed 100MB/s (ATA 100) (001) speed 133MB/s (ATA 133) Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 8 Serial ATA Parallel ATA Lower signal voltage (0.5V) Longer connecting tapes (up to 1m), less wires per tape Efficient error correction Hotplug Generations: Serial ATA esata external SATA, for external mass storage systems, cable length up to m xsata longer cables, up to 8m, shielded cables msata mini SATA (revision ) SATA revision 1.0 (SATA 1.5 Gbit/s) transfer 150 MB/s (00) SATA revision.0 (SATA 3 Gbit/s) transfer 300 MB/s SATA revision 3.0 (SATA 6 Gbit/s) transfer 600 MB/s (009) Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 9 SCSI Interface Communication interface for external devices, developed for efficient, highend computers (1986). 8 devices can be attached to single SCSI adapter. Ststem can have many SCSII adapters. Long connection cable (up to 1m) Application: servers, efficient computer systems Many versions: FastSCSI, FastWideSCSI UltraSCSI UltraWideSCSI, Ultra Ultra3 Ultra SCSI Ultra 60 SCSI transfer 60MB/s Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 30 10
Parallel and Serial Ports Legacy ports Standard for over 0 years with no any modifiactions!!! Serial Port: data transfer speed 115Kb/s (~1kB/s) sufficient only for very slow devices: modem, mouse simple data transmission protocol, long connection cables (few meters) necessity of using computer hardware resources (interruptions) Parallel Port: data transfer speed ~60KB/s not enough for most multimedia devices problems when connecting many devices do single port simple, dual direction data transmission protocol short connection cables (1.5 m) necessity of using computer hardware resources (interruptions) Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 31 USB Interface Universal Serial Bus Universal communication standard for external I/O devices, full support for PnP, support for hotplug Up to 17 devices can connected at a time: serially or via hub USB connector has 5V power supply lines, that can be used for supplying external low power consumption devices (0.5A) Maximum data transfer speed 1Mbit/s (~1MB/s USB 1.1) and 80Mbit/s (USB.0) Speed: USB 1.1 1Mbit/s (~1.5MB/s) USB.0 (HiSpeed) 80Mbit/s USB 3.0 (SuperSpeed).8Gbit/s Cable length 5m Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 3 IEEE139 Interface FireWire Apple Interface dedicated to high speed multimedia equipment, sound and video, philosophy similar to USB Cable length up to.5m, for bigger length repeater is needed 63 devices can connected at a time, serially High data transfer speed 00Mbit/s (~50MB/s) Flexible configuration HotPlug support Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 33 11
Memory Systems in PC Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 3 Memory Efficiency Progress Processor efficiency doubles: Memory efficiency doubles: every 18 month every 7 years Memory efficiency is understood as: speed capacity Memory speed, two parameters: Memory access time: transfer time of basic portion of data between memory and processor Memory cycle time: minimal time between read/write operations form/to same memory cell Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 35 Memory Computer System Bottleneck How to solve the problem of slow memory subsystem? using very fast StaticRAM memory modules very expensive solution, high power consumption. Only for highend, expensive computer systems; using slow DRAM memory modules improving methods of data transfer: wide buses, block transfers; using the combination of slow and cheap DRAM memory (main memory) and fast StaticRAM (support memory). Such memory subsystem should organized the way to optimize data transfer that mostly takes place between processor and fast, support memory Cache Memory. Modern, efficient memory system must have hierarchical organization! Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 36 1
Hierarchical Memory Organization CPU and internal registers L1 Cache Cache L... farther from processor slower memory Main Memory Memory size on every level Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 37 Main Memory Always Dynamic RAM, communication with processor via system bus or frontside bus All Pentium processors (after 1993) have data bus width = 6bits (8 bytes) DRAM.770MHz Fast Page Mode DRAM FPM DRAM (1666MHz) Extended Data Out DRAM EDO DRAM (3375MHz) Burst Extended Data Out DRAM BEDO DRAM (60100MHz) Synchronous DRAM SDRAM (100,133MHz) Double Data Rate DRAM DDR DRAM (00, 66, MHZ,...) DDR DDR3 Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 38 DDR13 SDRAM DDR3 DDR DDR1 Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 39 13
Memory Modules (the most popular) DIP (dual inline package) DRAM, oldest type of modules, computers with processors 8086, 8086 SIMM (single inline memory module) FPM, EDO for processors 386 (30 terminals modules, 16 bit), 86 (7 terminals modules, 3 bit), Pentium (7 terminals modules, 3 bit, used in pairs) DIMM (dual inline memory module) for computers with Pentium II and MMX (100 terminals modules, FPM, EDO) and newer (168 terminals modules, 6 bit, SDRAM, DDR RAM) SODIMM (Small Outline DIMM) for laptop computers, 7 or 1 terminals (3 or 6 bit) Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 0 Flash Memory Nonvolatile semiconductor memory (EEPROM technology) Compromise between ROM and RAM memory, perfect for for portable computers: Palmtop, DigiCam, etc... Significantly slower than typical computer memory systems, (write cycles), not suitable (for now) as main computer memory Limited number of write cycles (hundreds of thousand) Application: BIOS memory in PC, configuration memory for extension cards, external storage systems (PenDrive, SmartMedia, CompactFlash,...) Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 1 Moore s Law Gordon E. Moore, 1965. "Cramming more components onto integrated circuits," Electronics, v.38, no 8 (19 April), Exponential increase in the number of components on a chip Doubling of number of transistors on a chip every 18 months (1980s) Doubling of microprocessor power every 18 months (1990s) Computing power at fixed cost is doubling every 18 months (1990s) Throughput of integrated circuits, in MIPS, will be doubled every 18 months with cost of decrease by 50%, and this regularity will remain correct for several decades. (MIPS millions of instructions per second) Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 1
Memory and Processor Complexity Progress Transistors per Chip 10 1 56G 10 11 10 10 DRAMs 10 9 1G 56M McKinley Itanium (Merced) 10 8 6M Pentium IV 16M Pentium III 10 7 M Pentium II 1M PPC 60 10 6 Pentium Pro 56k i86 Pentium 10 5 6k 80386 16k 8086 10 k 8086 Intel 1k Motorola Processors 10 3 00 1970 1980 1990 000 010 G 16G 6G 1T 00 Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 3 Evolution of Computer Power/Cost MIPS / $1000 (1997 Dollars) 10 3 1 10 3 10 6 10 9 Burroughs Class 16 IBM Tabulator Monroe Calculator Gateway85DX/55 Power Tower 150e Macintosh18K Mac II Commodore AT&T Globalyst 600 Apple II 6 IBM PC IBM DG Eclipse Sun PS/90 CDC 7600 Sun3 DEC PDP10 IBM 1130 VAX 11/750 IBM 7090 DEC VAX 11/780 Whirlwind DECKL10 IBM 70 DG Nova UNIVAC I SDS 90 ENIAC IBM 350/75 IBM 700 Colossus Burroughs 5000 Zuse1 ASCC (Mark 1) IBM 160 IBM 650 Gateway G600 PowerMac 8100/80 1900 190 190 1960 1980 000 00 00 Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> Memory Cost 150 000 $ Prices of 1 Mbit RAM History Forecast 10 000 $ 800 $ 0 $ 60 $ 10 $ 1 $ 6 C 1 chewing gum 5 C 1 gummi bear 3 C 1 sheet of paper 1 C 1 sticker 0,5 C 1 paper clip 0,1 C 1973 1977 1981 198 1987 1991 1995 1999 00 005 009 013 017 Introduction to Computer Science Cezary Bolek <cbolek@ki.uni.lodz.pl> 5 15