4/3/2013 S THROUGH YOUR PCB FABRICATOR S EYES! Brett McCoy Eagle Electronics Schaumburg IL. New England Design and Manufacturing Tech Conference
Brett McCoy: Vice President / Director of Sales Circuit board fabrication for over 15 years. Operations and company financial responsibility Sales and marketing 4/3/2013 Oversight of Quality and Engineering Departments Key technical contact for all customer inquiries Over 5 years experience in CAM Engineering
4/3/2013 History Operations begin in 1979 with a focus on medium to high volume rigid PCB fabrication. Evolved into a quick turn to medium volume domestic facility focused on the North American market. ISO 9001:2008 certified since 1996 and ITAR registered. 50K sqft facility based in Schaumburg, IL with 80 employees. Currently produces product in as little as 24 hours ranging from simple single sided to large format 32 layer with blind/buried vias.
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Key Topics Material utilization and specification Surface finishes Understanding and specifying via protection Who is building your PCB design? Panelization What level of test do you need? What is tooling and who owns it? Ensuring Transferability Simple ways to control costs 4/3/2013
4/3/2013 Material utilization and specification PCB basic building blocks? Laminate Most laminates are produced with dielectrics ranging from 0.002 to 0.200 thick. Copper thickness ranges from 1/4oz to 12oz, however the most readily used is 1/2oz to 4oz. Pre-preg Typical glass styles and their associated thickness 106 = 0.0018 thick 1080 = 0.0025 thick 2113 = 0.0035 thick 2116 = 0.0045 thick 7628 = 0.007 thick
4/3/2013 Material utilization and specification Why choose one laminate system over another? Electrical performance Dk Dielectric Constant Ratio of capacitance of an electrically insulating material Df Dissipation Factor (loss tangent) Ratio of the power loss of a dielectric material Thermal performance Td Decomposition Temperature Temperature at which the dielectric material will breakdown Tg Glass transition Temperature Temperature at which the resin system will begin to flow CTE Thermal expansion (X-Y-Z)
4/3/2013 Material utilization and specification Why choose one laminate system over another? Impedance or RF Low loss material for high speed signals Leaded or Lead-Free Assembly Lead Free assembly requires a Td of 340C or higher Typical lead free material has a Tg value of 150C or above Material Availability (When specifying a manufacturer) Always keep in mind to utilize STANDARD materials readily available to your PCB fabricator.
4/3/2013 Material utilization and specification How to specify material? IPC-4101C Slash sheet /126 = Most compliant for lead free FR-4 material /21 = standard FR-4 (non lead free compatible) By Electrical/Thermal Performance Dk/Df if impedance/rf is required Tg/Td of material based on assembly and end application
4/3/2013 Material utilization and specification How to specify material? IPC-4101C (example) Laminate and pre-preg to be in accordance with IPC-4101C/126 By Electrical/Thermal Performance (example) Laminate and pre-preg to have a minimum Td value of 340C Controlled Impedance required with a Dk value of 3.8
Material utilization and specification When to specify a specific laminate/pre-preg? Impedance/RF Required 4/3/2013 Tight Impedance (+/- 5% or below) and especially RF designs can be very sensitive to changes in the laminate system. Even if the material change is an equivalent in terms of electrical attributes small differences in fillers used, resin content, and glass style will impact signal output. Prototype and production parts of this nature should specify the exact type (manufacturer) and grade of the laminate/pre-preg as well as a specific layer stack-up defined.
Material utilization and specification Reduce Cost and Lead Time? 4/3/2013 Allow the PCB manufacturer to choose the material whenever possible. By specifying by IPC-4101C or the electrical/thermal requirements will allow the fabricator to utilize their standard materials. Each fabricator has their own preferred materials based on region, price, support, and service. By leveraging these stocked items you will be assured of the lowest laminate cost, highest yield, and virtually no delays in raw material procurement.
4/3/2013 Surface Finishes What surface finish to use and costs associated? ENIG Electroless Nickel Immersion Gold IPC-6012 table 3-2 defines the nickel thickness to be 118u (min). Typical process range is 150 200 u IPC-6012 table 3-2 defines the gold thickness to be 1.97u (min). Typical process range is 2-4 u Flat solderable surface ideal for SMT components especially tight pitch devices such as BGA s. Easier to control plated hole diameters; good for press fit holes Long shelf life (1 year or longer when properly stored) Can survive multiple reflow cycles. Expensive Can be nearly 30% more than HASL
4/3/2013 Surface Finishes What surface finish to use and costs associated? Immersion Silver IPC-6012 table 3-2 defines the silver thickness to be solderable. Typical process range is 8 16 u. Flat solderable surface ideal for SMT components especially tight pitch devices such as BGA s. Easier to control plated hole diameters; good for press fit holes Special care must be taken in packaging and storage. Short shelf life ranging from 2-6 months. Can survive multiple reflow cycles. Less expensive than ENIG by as much as 20%.
4/3/2013 Surface Finishes What surface finish to use and costs associated? Lead Free HASL IPC-6012 table 3-2 defines the LFHASL thickness to be coverage/solderable. Typical process range is 50 400 u. Similar solderability as HASL ROHS Uneven surface finish not ideal for tight pitch devices. Long shelf life (1 year or longer when properly stored) Can survive multiple reflow cycles. Low Cost ROHS alternative (5% more than HASL)
4/3/2013 Surface Finishes What surface finish to use and costs associated? HASL IPC-6012 table 3-2 defines the HASL thickness to be coverage/solderable. Typical process range is 50 400 u. Extremely good solderability. Contains lead (non-rohs) Uneven surface finish not ideal for tight pitch devices. Long shelf life (1 year or longer when properly stored) Can survive multiple reflow cycles. Lowest cost surface finish
4/3/2013 Surface Finishes What surface finish to use and costs associated? Specialty or Selective surface finishes Hard gold fingers (bussed) Card edge connectors Selective hard gold internal to the part Typical use for keypads or switches Selective soft gold Gold wire bonding ENEPIG Electroless Nickel Electroless Palladium Immersion Gold Can be used for both SMT and gold wire bonding with one finish OSP Organic solder protection Immersion Tin
4/3/2013 Understanding and Specifying Via Protection What is via protection? Simply put, it is a means to protect the via for several reasons. To keep solder from flowing from one side to the other. To keep chemistry from being trapped in the via. For thermal heat transfer. To allow for assembly directly over a hole (via-in-pad). To improve surface planarity. To provide a surface ideal for ICT testing (vacuum). To provide additional reliability to a via.
4/3/2013 Understanding and Specifying Via Protection Types of via protection? IPC-4761 identifies seven via protection types Type I = Tented (dry film mask only) Type II = Tented and Covered (Type I with additional mask material applied over the dry film) Type III = Plugged (Partial fill in the barrel with mask material) Type IV = Plugged and Covered ( Type III with additional mask material applied over the plug) Type V = Filled (100% fill of the via barrel) Type VI = Filled and Covered (Type V with additional mask material applied over the plug) Type VII = Filled and Capped Plated (Type V with a metalization formed over the top and bottom of the via)
Understanding and Specifying Via Protection Types of via protection? Type I Tented 4/3/2013 Dry Film Mask
Understanding and Specifying Via Protection Types of via protection? Type II Tented and Covered 4/3/2013 LPI Mask Dry Film Mask
Understanding and Specifying Via Protection Types of via protection? Type III Plugged LPI Mask 4/3/2013
Understanding and Specifying Via Protection Types of via protection? Type IV Plugged and Covered 4/3/2013 Secondary LPI Mask LPI Mask
Understanding and Specifying Via Protection Types of via protection? Type V Filled 4/3/2013 100% fill with non-conductive or conductive ink
Understanding and Specifying Via Protection Types of via protection? Type VI Filled and Covered 4/3/2013 100% fill with Non-conductive or conductive ink Secondary LPI Mask
Understanding and Specifying Via Protection Types of via protection? Type VII Filled and Capped Plated 4/3/2013 100% fill with non-conductive or conductive ink Via-in-pad formation Copper Metallization
Understanding and Specifying Via Protection Types of via protection? Type VII Filled and Capped Plated 4/3/2013
4/3/2013 Understanding and Specifying Via Protection Tented? The term tenting has been used with many different end results. Tenting = Vias are to be covered with LPI solder mask on both sides. Tenting = Dry film mask covering vias. Tenting = Vias are to be plugged and covered with LPI solder mask. A very dangerous and outdated term which is still used in many specifications today. Per IPC-4761 Type I dry film mask is a capability few board fabricators posses today. Nearly 100% of all manufactures utilize LPI solder mask.
4/3/2013 Understanding and Specifying Via Protection When to use a plugged or filled via? A plugged via is typically used to prevent solder transfer from one side of the hole to the other. It can also be used to improve the vacuum effect during ICT testing. Plugging is a partial penetration of the mask material into the hole. There are different processes for performing this task. Consult your board fabricator for which method is used. Plug before final mask application, Plug performed after final finish is applied. A filled via is typically used for either thermal transfer (utilizing a conductive ink) or a via-in-pad requirement. Other uses may be for improved reliability of the hole as it is 100% encapsulated.
4/3/2013 Understanding and Specifying Via Protection Specification and why it s so important The best way to specify via protection is to utilize the IPC-4761 specification. Over half of all new prototype orders we take do not specify via protection correctly. This creates costly delays as well as the potential for the finished PCB to be manufactured based on an incorrect interpretation. Potential for adding additional costs where they are not needed or not providing the needed protection required by the design.
4/2/2013 Who is building your PCB Design? OEM designs often are turned over to a contract manufacturer to be procured. From there the design may be sourced domestically or offshore. It may utilize both. Depending on the relationships the CM has these boards may go through multiple middle men before the actual PCB manufacturer gets the design to build. There could be as many as 3 or more hands which touch the design in this process.
Who is building your PCB Design? 4/2/2013 Each one adds additional costs and could add critical delays if questions arise. Having a relationship directly with the board house is vital to quickly and cost effectively bring the product to market. Although CM s, board distributors, and other s can add value in the supply chain effort, losing connection with the backbone of your electronic platform can make or break a successful product launch.
4/2/2013 Panelization: who decides and why does it matter? Panelization is the process of taking a single-up design and step and repeating that design. Array Step and repeated one-up design Panel PCB fabricator takes the array and step and repeats it into the manufacturing panel. Consulting both the assembly house and PCB house is critical to getting the most cost effective usage of the manufacturing panel. Poor panelization can often double the cost of a PCB.
4/2/2013 Panelization: who decides and why does it matter? Single Up Design Step and Repeated Design - Array Step and Repeated Array - Panel
4/2/2013 Panelization: who decides and why does it matter? Utilizing software tools like Kwickfit (www.micromeg.com) array and panel utilization can be easily developed before the fabricator receives the design. Understanding the CM s most efficient assembly set-up, component placement, and fabricator s panel is critical to avoiding long delays at the fabricators front end CAM department. These delays increase labor content and extend lead times sometimes significantly. It is not uncommon to have to set-up an array 2 or more times at the PCB fabricator due to the array not being defined during the design cycle.
4/3/2013 What level of test do you want and need? 100% electrical test for opens and shorts should always be done on any PCB. AOI (automatic optical inspection) is typically performed on all inner layers and will identify open, shorts, nicks, neck downs, and other etching and material defects. The earlier these defects can be detected the quicker the board fabricator can react especially in a quick turn order. If impedance is part of your design then TDR testing is a most. Ionic contamination Solder floated cross section
4/3/2013 What level of test do you want and need? Electrical test of the final PCB
4/3/2013 What level of test do you want and need? AOI for inspection of inner and outer layers
What is tooling and who owns it? Tooling is the artwork and associated programs which must be generated to produce the PCB. All Copper layers All Solder mask layers All legend layers All drill data All routing data AOI data Electrical test data TDR test (if required) Specialty data Carbon pads Beveling Counter bore/sinks 4/3/2013
What is tooling and who owns it? 4/3/2013 The company who places the purchase order to the PCB fabricator is the one who owns the tooling. The PCB shop can not provide or release any information to anyone with out the permission of the company who placed the PO to them.
Ensuring Transferability? 4/2/2013 Engage with your board fabricator directly and early in the design phase. Specify so that any fabricator will understand your requirements. Use IPC spec call outs whenever possible. Get feedback from the prototype build. Stack-up used (construction) Material certs Cross section results Test data Own your tooling when ever possible.
Simple ways to control your costs? In Summary 4/2/2013 Panelize your design into an economical array which works for both the CM and PCB fabricator. Consider this just as important as the design itself. Specify material s based on the IPC-4101C whenever possible. Chose a final finish which meets the needs of your CM taking into account the lesson's learned today. Specify via protection utilizing IPC-4761 whenever possible. Understand who owns the tooling and how that may affect the product through the prototype to production cycle.