930 JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 32, NO. 5, MARCH 1, 2014
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1 930 JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 32, NO. 5, MARCH 1, 2014 A Hierarchical Optical Network-On-Chip Using Central-Controlled Subnet and Wavelength Assignment Zheng Chen, Huaxi Gu, Yintang Yang, and Dongrui Fan, Member, IEEE Abstract Optical network-on-chip (ONoC) is a promising alternative to be served as the fundamental architecture for future many-core system. However, several problems of ONoC, such as power consumption, arbitration overhead, and device cost, pose many limitations to the architecture design. In this paper, a novel hierarchical ONoC structure named CWNoC is proposed, which is a 256-core architecture composed of multiple central-controlled subnets. It reduces the network complexity by dividing the whole network into several subnets and lowers the arbitration overhead by adopting centralized arbitration logic in each subnet. An efficient wavelength assignment method, making full use of broadband mcroring resonators, is also employed in CWNoC, which facilitates simplifying the optical layer and reducing the possibility of contention. The simulation results show that CWNoC has a better latency and power consumption performance. For example, when low and medium load is applied, the latency reduction can be as much as 40 ns compared with WANoC, while the total power consumption is reduced by 70%. Index Terms Arbitration, central-controlled subnet, optical network-on-chip, wavelength assignment. I. INTRODUCTION NETWORK-ON-CHIP is becoming a key interconnection paradigm for the next-generation multi-core and manycore systems [1]. However, the traditional metal interconnection faces many challenging issues, such as limited bandwidth, high crosstalk and unacceptable power consumption. As more cores will be integrated on a single chip in the near future, this situation will become more serious, which forces researchers to find other alternatives to eliminate these bottlenecks. One of the Manuscript received September 24, 2013; revised November 20, 2013; accepted December 4, Date of publication December 11, 2013; date of current version January 17, This work was supported in part by the National Natural Science Foundation of China under Grants , , and , in part by the National Grand Fundamental Research 973 Program of China under Grant 2011CB302501, in part by the Fundamental Research Funds for the Central Universities under Grant K , in part by the 111 Project under Grant B08038, and in part by the State Key Laboratory of Computer Architecture Grant No.CARCH Z. Chen and H. Gu are with the State Key Laboratory of Integrated Service Networks, Xidian University, Xi an , China ( [email protected]; [email protected]). Y. Yang is with the Institute of Microelectronics, Xidian University, Xi an , China ( [email protected]). D. Fan is with the Institute of Computing Technology, Chinese Academy of Sciences, Beijing , China ( [email protected]). Color versions of one or more of the figures in this paper are available online at Digital Object Identifier /JLT solutions is adopting optical interconnect. It can provide higher bandwidth and lower latency with distance-independent power consumption [2], [3]. Optical network-on-chip (ONoC), which employs optical interconnects instead of metal interconnects, has attracted much attention due to its high-performance and energy-efficient communication. Many proposals resorting to optical interconnect have been proposed [4] [11], aiming at achieving better performance by using a variety of optimization methods and structural layouts. They can be sorted into different classes according to different criteria, such as topology, communication mechanism, and arbitration method, etc. Two main types of ONoC that are widely recognized are classified by the arbitration manner. One uses the circuit-switched network, while the other employs the wavelength for arbitration. Wavelength arbitrated networks are capable of providing ultra low-latency communications. Several passive networks employ wavelength-routing, such as λ-router [8], ORNoC [12], and GWOR [13], enjoying good latency and throughput performance. Their advantages are contention-freedom and no resource arbitration. However, it is difficult to implement largescale architecture because of the constraint on the number of wavelengths. By today s technology, the number of wavelengths that can be transmitted concurrently in the same waveguide is around 62 [25]. Some proposals resort to the optical bus to transmit data efficiently, such as Single-Write-Multiple-Read [4], [5] and Multiple-Write-Single-Read [6]. Snakelike waveguides are used in these architectures to avoid waveguide crossings. One potential challenge faced by these networks is that it may be difficult to implement, when taking physical-layer constraints into account. A large number of microring resonators (MRs) are required to be integrated along the same waveguide, which leads to high insertion loss and crosstalk due to the imperfect filtering. Circuit-switched ONoC uses a separate electrical control network to transmit the control packets while using the optical network to transmit data packets [8]. The electrical control network, composed of simple electrical routers, is used to issue the control packets from the source to the destination. It also dynamically changes the ON OFF states of MRs along the optical path. Each electrical router integrates the function of controlling the states of MRs and arbitrating the path resource for different pairs of source and destination. Due to the long latency of path setup, circuit-switched ONoC will enjoy better performance only if the packet length is much longer. The main bottlenecks of circuit-switched network are the limited IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See standards/publications/rights/index.html for more information.
2 CHEN et al.: HIERARCHICAL OPTICAL NETWORK-ON-CHIP USING CENTRAL-CONTROLLED SUBNET AND WAVELENGTH ASSIGNMENT 931 with a wavelength λ x,y, which is the unique wavelength allowed to turn at that position. If a packet needs to turn at node (x, y), it has to be modulated on λ x,y, as shown in Fig. 1. For example, if node (7, 3) wants to communicate with node (3, 1), the packet will turn at node (3, 3), as required by XY routing algorithm. Hence, λ 5 is used, which is assigned to the turn node (3, 3). The proposed wavelength assignment can simplify the switching architecture due to single-wavelength and fixed-direction selection. The switching module of WANoC is much simpler than that of the former optical routers [18], [20], [21]. In addition, the contention will only occur at the turn nodes, and there is no contention in Y direction. Actually, the wavelength matrix of WANoC is not unique, which is a Latin square in fact. Formally, an N N Latin square, L, is defined as follows, Fig. 1. Wavelength assignment and communication schematic of 8 8 WANoC. Each element represent a node in the network, and the wavelength in it is the wavelength can be switched there. bandwidth, confined link utilization, serious resource contention, and excessive insertion loss due to too many waveguide crossings. Many solutions have been presented to relieve these problems. Broadband MRs (or comb switches) are studied to increase the transmission bandwidth and switching capability of single MR [14]. Chan and Bergerman proposed a wavelength selective strategy to lower the contention with the help of cascaded broadband MRs [15]. As for the reliability, multilayer deposited MR using silicon nitride is used to lower the insertion loss [16] and a method for crosstalk analysis and optimization method is proposed [17]. In addition, a universal method to build N-port optical router is presented to improve the access capability of each router [18]. In this paper, we propose a new ONoC architecture named CWNoC aiming at ultra-low setup cost, simple resource arbitration logic, and compact optical layer. To lower the contention possibility and simplify the network architecture, CWNoC uses the wavelength assignment method proposed in WANoC [19], but rebuilds the hybrid architecture thoroughly by re-placing the MRs and waveguides in optical layer and centralizing the control logic in electrical layer. The electrical control network is divided into several central-controlled subnets, and each subnet employs a centralized control mechanism. Hence, the setup overhead will be ultra-low and independent on the network diameter. The simulation results show that CWANoC has better latency and power consumption performance. The latency of CWNoC is much smaller than that of WANoC when low and medium load is applied, and CWNoC is less sensitive to different traffics. Furthermore, the total power consumption is reduced by 70%. II. WANOC ARCHITECTURE WANoC is an ONoC architecture based on regular wavelength assignment, which aims at achieving efficient wavelength reuse and simplifying the switching architecture. The wavelength matrix in Fig. 1 depicts the wavelength assignment result in an 8 8 WANoC. Each node (x, y) is labeled L =[L ij ], L ij S =[1, 2, 3,...,N], i,j = {1, 2, 3,...,N} L ij L ik i, j, k j k L ji L ki i, j, k j k. In our wavelength matrix, each element λ ij satisfies (1) λ ij S =[λ 1, λ 2, λ 3,...,λ N ]. (2) The Latin square selected for WANoC has an obvious regularity, which can be obtained only by circularly shifting the orders of all wavelengths. This makes it easier for the source node to calculate which wavelength will be used for different communications, and helps the turn node to simplify its control logic. Despite WANoC has better latency and power consumption performance compared with circuit-switched ONoC, some potential issues still exist in WANoC. (1) The inherent shortcoming of circuit-switching mechanism, high latency introduced by path setup, still restricts its performance. When 256 cores or more cores are integrated on a single chip, the time spent on path setup will occupy a main portion of the total delay. (2) It is difficult to introduce the laser power into the global network. An additional power supply system, consisting of waveguides and MRs, is necessary to ensure that each node can couple partial power from the laser. This power supply system will introduce additional device cost and extra insertion loss. (3) The four aligned MRs at the switching module are redundant. Besides, the number of cascaded MRs used for injecting signals is two times more than it actually needs. (4) In addition, the super-linear increasing of MRs with increased cores will lead to great device cost and massive area overhead. III. THE CWNOC ARCHITECTURE To solve the problems existing in WANoC, the structures of optical layer and electrical layer are redesigned. Hence, another ONoC architecture, CWNoC (ONoC using central-controlled subnet and wavelength assignment), is proposed in this paper. The main goal of CWNoC is to partition the global electrical control network into small ones and centralize the control logic by using concentrated resource arbitration. The setup latency is lowered to an ultra-low level, which can be nearly independent
3 932 JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 32, NO. 5, MARCH 1, 2014 of the network diameter. Furthermore, the arbitration logic of resource allocation is significantly simplified, which contributes to reducing the power consumption as well as the router architecture. As for the optical layer, CWNoC employs a similar wavelength assignment method that is used by WANoC to guarantee better latency and throughput performance. The optical network is divided into several subnets logically, each one corresponding to an electrical subnet. The wavelength allocation method of WANoC is also used by each subnet, while a more demanding wavelength assignment method is proposed for the overall network. In addition, the power supply system is directly integrated into CWNoC seamlessly by reassembling multi-lasers, waveguides, and MRs. It also helps reduce the strong demand of numerous MRs. A. Partition Principle The reason why an electrical network is still chosen for resource allocation is that control packets, always short in length, are more proper to be transmitted in electrical domain [22]. Such a design is power-efficient and control-flexible. In CWNoC, the only resources that need arbitration are actually the modulators and the corresponding detectors, which are located at different waveguides. If other arbitration methods, such as token and bus, are implemented, it will be difficult to add an arbitration network into the optical layer seamlessly and exploit the traits of CWNoC efficiently at the same time. The global electrical network is evenly divided into several subnets as shown in Fig. 2(a). A more detailed electrical subnet is illustrated in Fig. 2(b). The centralization of each subnet is implemented by two-level connection. All cores in a cluster are connected to a local cluster router (CR). And all the CRs located in the same line are linked up to a unique line router (LR). The CR forwards all setup requests to the LR and copes with the intra-cluster communication. The LR takes charge of resource arbitration. When arbitration is finished, the LR will send an acknowledgement (ACK) packet back to CR to ensure the execution of the corresponding modulation. In addition, it will also send a notification packet in vertical direction to other LRs so that the destination node will turn on the corresponding MR filter to receive the packet. The usage of cluster takes the advantages of electrical interconnect for short distance, and optical network for long-range interconnect [22]. Furthermore, the cluster helps to decrease the topology diameter as well as the complexity of control logic, contributing to the centralization of CWNoC [23]. The wavelength utilization is prompted by sharing the limited wavelength resources with more cores. The carrier wavelength from laser is continuous. If no communication pairs use it, this power will be wasted. To determine how many subnets can be employed, the scale of each subnet and the number of ports for CR and LR are two main factors. The bigger the subnet is, the further centralized the network will be. Less CRs and LRs will be needed in this case because of the high radix of the routers. However, adding a port to the router will lead to an obvious increase of area cost and Fig. 2. (a) The partition of the electrical control network in CWNoC. Clusters in different colors belong to different subnet. Four IP cores are connected to one CR, forming a cluster. And four clusters comprise a tile. The coordinate CR(x,y) is shared by the four CRs in each tile, and implies the location of each CR. (b) The detailed connections of one electrical subnet. power consumption referring to ORION 2.0 [24]. The cost of area and power consumption will increase to an intolerable level by just adding ports of the router, even if the number of routers can be reduced. The high-radix router will also induce higher contention possibility. Although more cores are connected to the same CR, the bandwidth between CR and LR remains limited. That means more communication requests will compete for the limited link resources. What is more, a smaller subnet can avoid the emergence of long metal wires. To make a tradeoff, the global 256-core control network is divided into four subnets, and each four core form a cluster, as shown in Fig. 2(a). In this way, the radix of CR and LR is 5 and 6 respectively. To obtain a homogeneous partition, each subnet is a4 4 square, namely four clusters in row and four clusters in column. All of these four subnets intersect with each other. Four
4 CHEN et al.: HIERARCHICAL OPTICAL NETWORK-ON-CHIP USING CENTRAL-CONTROLLED SUBNET AND WAVELENGTH ASSIGNMENT 933 Fig. 3. Illustration of the power supply system and corresponding modulators and detectors. neighboring clusters from different subnets form a tile, which is the basic element in the optical layer. B. Optical Subnet of CWNoC Compared with WANoC, three main improvements, i.e. the power supply system, switching module, and waveguide layout, are implemented in the optical subnets of CWNoC. First, an example is given to show how the power supply system works. Fig. 3 illustrates the power supply system. To make it clear, only two wavelengths are shown. At the source cluster, the wavelength selector will first choose the required MR to modulate the optical packet. If λ 2 is chosen to modulate the current packet (the method how to choose the modulation wavelength obeys the rule of WANoC), and then MR2 is controlled to dynamically change its state between ON and OFF according to the required modulation. At the destination cluster, the corresponding MR4 stays ON state to detect the signal. If the wavelength λ 2 is coupled into MR2, no signal will be detected by MR4. It means a bit of 0 will be detected at the destination cluster. Otherwise, the wavelength λ 2 will bypass MR2, and it will be detected by MR4. Then a bit of 1 will be received at the destination. During this session, both MR1 and MR3 stay OFF state all the time, therefore no modulation and no detection process happens to λ 1. To apply this power supply system to CWNoC and make full use of the wavelength assignment method, the optical layer architecture is rebuilt as Fig. 4 depicted. To supply the laser power, a multi-wavelength laser is provided for each row, and four clusters will share the four carrier wavelengths provided by it. Using the four different wavelengths, each cluster can forward its packets to all the other nodes of the network. As for the switching module, the previous four active MRs for routing signals are replaced by a unique passive MR. This will help reduce the power consumption caused by dynamically changing the state of active MRs. As for waveguide layout, horizontal U- shaped waveguides and vertical ring waveguides are combined to ensure that the routing directions of all packets are clockwise. In this way, each MR at the ejection unit just absorbs optical signals from one direction, and therefore only one detector is needed to serve for each MR filter. Compared with WANoC, the architecture of optical subnet is simplified significantly. The subnet of CWNoC employs half MRs at the injection unit, one fourth MRs at the switching unit, and half detectors at the ejection unit. In addition, the Fig. 4. The optical subnet 1 of CWNoC. most important improvement is that the power supply system is added to the network seamlessly. However, another problem is emerging. Bent waveguides and ring waveguides bring more waveguide crossings which will aggravate the insertion loss and crosstalk. To avoid excess insertion loss, multilayer deposited MR [16] is also used in CWNoC. Different from WANoC, the four wavelengths selected for this subnet are discrete. But the wavelength assignment result is still obtained by circularly shifting. The reason will be explained in the next section in detail. C. Overall Optical Layer Architecture The overall architecture of the optical layer is illustrated in Fig. 5. It is comprised of four optical subnets, each of which is controlled by the corresponding electrical control subnet. To simplify the architecture of the optical network, broadband MRs are used to reduce the number of MRs. The broadband MRs are capable of transmitting several wavelengths simultaneously by aligning each wavelength channel to one mode of the ring. This can be accomplished by using a large radius (50 μm) ring with a correspondingly small FSR. In CWNoC, the broadband passive MR, replacing a series of cascaded narrow-band MRs, is used to route four different wavelengths simultaneously. Therefore, the four subnets need to select proper wavelengths to ensure that the broadband MRs can provide switching service for all of them at the same time. Table I shows the four wavelengths used by each subnet and the four wavelengths each broadband MR can route. The four kinds of broadband MRs, shown in Fig. 5, are denoted as α 1, α 2, α 3, α 4. The four resonance wavelengths of each broadband MR are employed by different subnet. Taking broadband MR α 1 for instance, it has four resonance wavelengths, i.e., λ 1, λ 2, λ 3, and λ 4. λ 1 is exclusive for optical subnets 1; λ 2 is exclusive for optical subnet 2
5 934 JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 32, NO. 5, MARCH 1, 2014 Fig. 5. The optical layer of CWNoC. Each tile has four links to IU and to EU. Each link is connected to a specific cluster. TABLE I MATCHUP OF DIFFERENT BROADBAND MRS AND SUBNET and so on. The total 16 wavelengths of 4 broadband MRs are divided into 4 groups, and each subnet uses a unique group of wavelengths. Subnet 1 employs wavelengths λ 1, λ 5, λ 9, and λ 13. Subnet 2 employs wavelengths λ 2, λ 6, λ 10, and λ 14. Similar assignment will be applied for subnet 3 and subnet 4. In this way, no contention exists among different subnets, and they can share the identical optical network. D. Line Router Architecture We propose a simplified architecture for LR by utilizing the characteristic of the communications in CWNoC. As discussed in Section III-A, the setup packets and ACK packets are only transmitted by one hop in horizontal direction without any packet forwarding or routing calculation process. For these two kinds of packets, the LR just needs a logic judgment for resource arbitration. Besides, the notification packets are only transmitted in vertical direction, so there is no need to guarantee packet coming from one port can be outputted to all the other ports. The LR is comprised of three parts, i.e., the wavelength allocator, filter control unit, and routing unit. The wavelength allocator not only handles the setup requests but generates an ACK packet. It arbitrates the wavelength resources with the help of state table shown in Fig. 6(b). When a setup packet arrives at the Fig. 6. (a) The detailed architecture of LR 2 in subnet 1. The input buffer of wavelength allocator are distinguished by the targeted wavelength, λ 1, λ 5, λ 9, λ 13. The output buffer is divided two parts, and each one is 4 bits long. One part indicates the changing states of four modulators, while the other part implies the changing states of four MR filters. (b) The state table of LR 2 in subnet 1 and its corresponding wavelength matrix. For this state table, the line 2 of this state table is defined as local line, which means where the current LR locates. LR, it will be stored in the input buffer in line with its targeted wavelength. The cycle-accurate wavelength allocator checks all the head-of-line packets in each cycle, and uses the state table to select all the packets that can be acknowledged. Then a 4-bit ACK packet, one bit corresponding to one dedicated wavelength at the injection unit, will be sent to the output buffer to ensure the modulation as the yellow dotted line shown (see Fig. 6(a)). The state table is a 16-bit table, where each bit represents the state of each node. The 4 bits in the local line (line i in the state table of LR i is defined as local line. All setup packets handled by LR i are generated in local line) indicate whether each wavelength is occupied at the current time. 1 means that the wavelength is occupied, while 0 means the wavelength is available. In other lines, 1 implies that the node there will receive a packet coming from the local line, while 0 means no packet from the local line will arrive. For example, in Fig. 6(b), there are two ongoing sessions, i.e. CR(2,2) to CR(1,1) and CR(4,2) to CR(4,4), where λ 5 and λ 1 are the two wavelengths used by these two sessions respectively at this time. Consequently, any packet request λ 5 and λ 1 cannot be acknowledged until the resource is released, while packets require λ 9 and λ 13 can be ensured now as long as no contention happens.
6 CHEN et al.: HIERARCHICAL OPTICAL NETWORK-ON-CHIP USING CENTRAL-CONTROLLED SUBNET AND WAVELENGTH ASSIGNMENT 935 TABLE II SLOT ALLOCATION IN ROUTING UNIT The 16-bit state table will be encapsulated into a 16-bit notification packet at each cycle, as long as at least one bit of it is changed, and then it will be issued to the filter control unit. The filter control unit is responsible for controlling the right MRs in ejection unit to filter the packets according to notification packets from local LR and other LRs. If any MRs in the local line should be turned on, a 4-bit packet will be sent to the corresponding output buffer that targets at the destination CR as the blue dotted line shown. Each bit corresponds to one dedicated MR filter at the ejection unit. The notification packet will be forwarded to the routing unit and then be sent to other LRs. To make an efficient use of the link and reduce the hop counts, a bidirectional ring link is employed. A notification packet will be sent no more than two hops in clockwise direction and one hop in anticlockwise direction. When a notification packet arrives, the routing unit first judges that if the packet gets to its final destination. If so, the packet will be sent to the filter control unit directly. Otherwise, a copy of this packet will be sent to the filter control unit, and this packet itself will be issued to the next hop. E. Slot Allocation To simplify the pipeline stage and shorten the packet length as far as possible, the packets targeted at different destinations are sent at a given cycle. As illustrated in Table II, at cycle 1, all LRs will send its local notification packet to the next hop in both clockwise and anticlockwise direction. At cycle 2, all LRs will forward packets received from upstream LRs to the next LRs in clockwise direction. In this way, the notification packet can arrive at any LRs in no more than two cycles, and the routing unit can judge where the packet comes just according to the accurate cycle it arrives and the input port it enters. As a manner of saving power consumption, a judgment will be executed by the filter control unit to determine if it is necessary for the notification packet to send the notification packet both in clockwise and anticlockwise direction, and if it is necessary to be sent as far as two hops. This judgment depends on whether there exist communications between the local line and other lines. If no communication exists, the notification packet will not be sent to that line. The centralized control logic helps lower the power consumption by integrating all routing information of different communication pairs into one packet. The fewer the packets that transmitted in the network are, the lower the power consumption will be. And the shorter hops the packets traverse, the lower the power consumption will be. F. Communication Mechanism When a core produces a communication request, it first determines where the destination locates. If the destination locates at the same cluster as the source core does, the local fully connected electrical link will be used. Otherwise, a following judgment, that if the source and destination are in the same subnet, will be carried out. Communication can be completed inside the subnet if the source and destination belong to an identical subnet. Conversely, the source core will first send the packet to an intermediate node which locates at the same tile with the destination, and then the packet will be forwarded to the destination. The complete inter-cluster communication process includes four steps. 1) Setup requesting. When a setup request from the core is sent to the CR, the CR will first calculate which wavelength this request intends to use. If there is no ongoing session occupying this wavelength and no other request waiting for this wavelength, the request will be delivered to the LR for resource arbitration. Otherwise, this request will be stored in the queue of the CR until the former request is confirmed and the data transmission finishes. 2) Wavelength arbitrating. All requests of different setup packets are handled by the LR. Each request will be acknowledged if there is no ongoing session using the required wavelength, or it will wait in the queue of LR until that wavelength is available. Once the setup packet is allocated the targeted wavelength by LR, it will be destroyed. At the same time, the state table of the LR will be updated accordingly. 3) Modulation and detection confirming. The LR will send an ACK packet to the source CR to guarantee the modulation, and send a notification packet to other LRs at the destination line so that the corresponding MR filter will get preparation for filtering the signal. 4) Data transmitting. When all of the above processes are completed, the data transmission begins. IV. RESULT AND ANALYSIS The performance of CWNoC is evaluated in term of device cost, footprint, insertion loss, latency and power consumption. When analyzing the device cost, a synthetic comparison, i.e. the number of MRs (active and passive), modulators, detectors and lasers, is made among three different architectures, all of which are integrated with 256 cores. The three architectures are CWNoC, WANoC, and CWNoC-subnet respectively. The CWNoC-subnet employs a topology, which is scaled from the original 4 4 optical subnet presented in Section III. The contrasting results are listed in Table III. CWNoC-subnet cuts down the modulators and detectors by half compared with WANoC, which helps to lower the device cost by half as well. Through network partitioning and cluster centralizing, CWNoC significantly reduces the number of MRs, lasers, detectors and modulators. CWNoC only requires 3.8% active MRs, 3.1%
7 936 JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 32, NO. 5, MARCH 1, 2014 TABLE III COMPARISONS OF OPTICAL DEVICE COST TABLE V PARAMETERS OF CWNOC TABLE IV COMPARISONS OF AREA AND INSERTION LOSS modulators, and 3.1% detectors of that in WANoC. The reduction is mainly brought by introducing cluster, which makes more cores share the identical resources. The partition of subnet and the usage of broadband MRs also contribute to the device reduction. Other comparisons, such as footprint, total waveguide length, and insertion loss, are listed in Table IV. Due to the compact architecture, the area and waveguide length of CWNoC are just 11.7% and 6% of that in WANoC. When calculating the insertion loss, it is assumed that all these architectures adopt multilayer deposited MRs. It eliminates the influence of waveguide crossings, a main contributor to the insertion loss. Then the remaining contributors to the insertion loss are the waveguide propagation (IL travel ), waveguide bendings (IL bend ), and power dissipation due to getting into or passing passive and active MRs (IL through and IL drop ). CWNoC has relatively small insertion loss, which is 74% less than that of WANoC and 40% less than that of CWNoC-subnet. The insertion loss indicates how much the power is dissipated along the optical path. A bigger insertion loss means a higher requirement of laser power. If the number of lasers is also taken into account, the power consumed by CWNoC can be significantly reduced compared with WANoC. To obtain the latency and power consumption performance, we build a network simulator for CWNoC based on OPNET and vary the packet length and traffic model to evaluate its performances under different situations. A simulator for 256- core WANoC is built to act as the counterpart. All the parameters of optical network and electrical control network for running the simulator are listed in Table V. The power consumption parameters of electrical network are derived from ORION 2.0. Fig. 7 illustrates the ETE delay of CWNoC and WANoC under uniform and matrix transpose traffic using two different packet lengths, i.e and 2048 bits. Before the offered load reaches Fig. 7. ETE delay. The numerical value means the packet length of the packet. C represents CWNoC, while W represents WANoC. U and M represent uniform and matrix transpose traffic, respectively. 6.4 packets/ns/node (10 3 ), CWNoC using 1024-bit packets has a much lower latency, about 25 ns lower than WANoC under uniform traffic and 40 ns under matrix transpose traffic. Similar situations are witnessed for 2048-bit packet. Compared with WANoC, the ETE delay of CWNoC is much smaller when the offered load is lower than 2.8 packets/ns/node (10 3 ). This is due to the fact that CWNoC has smaller setup latency, about 9 ns under low and medium loads. On the contrary, the setup packets in WANoC will experience more hops, thus resulting longer setup latency. A similar conclusion can be drawn when matrix transpose traffic is used. WANoC has a much worse performance when matrix transpose traffic is used, because under this traffic packets will go through more hops than under uniform traffic. However this situation has less impact on CWNoC. It can be concluded that CWNoC is less sensitive to different traffics due to the feature of diameter independence. The only problem is that CWNoC has a lower saturation load. In the future, we will find out other methods to increase the bandwidth like WSSR [15] does. Energy consumption is a critical metric for NoC design. Low energy consumption can reduce the cost of packaging, cooling solution, and system integration. We calculate the total power spent on the electrical control network and optical network. The
8 CHEN et al.: HIERARCHICAL OPTICAL NETWORK-ON-CHIP USING CENTRAL-CONTROLLED SUBNET AND WAVELENGTH ASSIGNMENT 937 Fig. 8. Energy consumption of CWNoC. power consumption mainly consists four parts, i.e. electrical link, electrical router, dynamic and static power of optical network. The number of routers in CWNoC is about one third of that in WANoC. Hence, as Fig. 8 shows, the power for electronic router of CWNoC is also about one third of that in WANoC. As for link power, the total length of link in CWNoC is much shorter, which contributes to lower power consumption (about 50% of that in WANoC). The most obvious reduction is the optical static power. This is due to the fact that the number of MRs in CWNoC is only 3.8% of that in WANoC, so the static power consumed by MRs has a dramatic reduction. As for the overall performance, the total power consumption is reduced by about 70%. V. CONCLUSION To eliminate the inherent shortcoming of hop-dependent latency, a novel hierarchical ONoC named CWNoC, which uses central-controlled subnets and low-contention wavelength assignment, is proposed in this paper. It decreases the setup cost by partitioning the global network into small ones and centralizing the resource allocation. In addition, it reconstructs the structure of optical layer to introduce the laser power seamlessly and simplify the architecture of the optical layer. The simulation results show that CWNoC is a low-latency and energy-efficient architecture. REFERENCES [1] L. Carloni, P. Pande, and Y. Xie, Networks-on-chip in emerging interconnect paradigms: Advantages and challenges, Proc. IEEE Int. Symp. on Networks-on-Chips, pp , [2] D. Miller, Rationale and challenges for optical interconnects to electronic chips, Proc. IEEE, vol. 88, no. 6, pp , Jun [3] W. Bogaerts, P. Dumon, and D. V. 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9 938 JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 32, NO. 5, MARCH 1, 2014 Zheng Chen received the B.E. degrees in Telecommunication Engineering from North China Electric Power University, in Since 2011, he has been working toward the M.E. degree in telecommunication and information systems in the State key lab of ISN, Xidian University. His main research interests include network-on-chip and optical interconnected networks. Yintang Yang received the Ph.D. degree from the School of Technical Physics, Xidian University, majoring in the specialty of semiconductor. He is currently a Professor in Microelectronics Institute, Xidian University. He won the title of National Model Teacher and the Chinese Youth Science and Technology Award. He was selected into the Trans-century Outstanding Talents Program of the Ministry of Education, the National Key Talents Program & New Century Key Talents Program. Huaxi Gu received the B.E., M.E. and Ph.D. degrees in telecommunication engineering and telecommunication and information systems from Xidian University, Xi an, China, in 2000, 2003 and 2005, respectively. He is currently a Professor in the State key lab of ISN, Xidian University, Xi an. His current research interests include interconnection networks, network-on-chip and optical interconnect, data center networks. He has more than 80 publications in the refereed journals and conferences. Dongrui Fan received the Ph.D. degree in computer science in 2005 from the Institute of Computing Technology (ICT), Chinese Academy of Sciences, where he is currently an Associate Professor in the State Key Laboratory of Computer Architecture of China at the ICT, Chinese Academy of Sciences, and the Chief Architect of the Godson-T many-core processor. His research interests include computer micro architecture design, low power technologies, and VLSI design.
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