AEHR TEST SYSTEMS. Worldwide Leader in Burn-in and Test Equipment

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1 AEHR TEST SYSTEMS Worldwide Leader in Burn-in and Test Equipment MB Electronique

2 What is Burn-in? Burn-in is the process of stressing and exercising electrical devices to ensure optimum performance. This process forces defective semiconductor devices to fail before they are incorporated into assemblies where they can cause reliability problems in the end product. Test & Reliability Screening Process Burn-in can be done in different product development stages: engineering (design, reliability, or quality), and production. It can be performed on a small sample of devices, or all devices. You can burn-in unpackaged devices, packaged devices or devices mounted on PC boards. The most common method is to burn-in devices in production after packaging and before final test. Static or Dynamic? When you burn-in IC devices, you electrically stress or "exercise" the device and apply hot or cold temperatures in a thermal chamber for an extended period of time. If the DUT (Device Under Test) is biased, but is not being exercised electrically, the burn-in is referred to as Static Burn-in. If the DUT is exercised, the burn-in is referred to as Dynamic Burn-in. The exercise can be dynamic activity (clock signals of various frequencies) or functional exercise (signals that simulate actual use). Functional signals exercise more of the internal nodes of the device

3 and are considered to be a superior method for detecting defective devices. Dynamic burn-in is the most common method used today. What is Test During Burn-in (TDBI)? TDBI applies functional input patterns and monitors the outputs of the DUTs for correct functional response. This method identifies the precise time and conditions of any failures. Generally, TDBI systems are more costly and demand more programming time. TDBI signal timing must be precise and monitoring strobes must be carefully placed to capture the response.

4 What is Parallel Functional Test? Traditional Process Flow Price competition is a major concern for most semiconductor memory manufacturers. In the last few years, memory prices have declined dramatically, forcing manufacturers to work aggressively to reduce production costs. As memories grow in size and complexity, test time increases geometrically. As a result, testing accounts for an increasing share of the cost of memory production. Dataquest has estimated that final test costs represent 8.5 percent of the total manufacturing cost of DRAMs. Much of this cost is directly attributable to the way memories are tested. Memory manufacturers normally rely on a multi-phase testing process in which each device is burned-in and tested to ensure that it meets the performance and reliability specifications required. During burn-in, memories are electrically and thermally stressed, typically for several hours, to accelerate failures so they can be detected during final test. This process allows manufacturers to screen out defective ICs, including those with latent defects, prior to shipment and incorporation into end products. Final testing is traditionally performed using very expensive, high performance multi-site testing equipment. This equipment, which can cost more than $2.5 million per system, is only capable of testing up to 64 ICs at a time. Unfortunately, since only a fraction of the tests performed by these systems actually require the costly high performance features, the tester's capabilities are severely underutilized. Massively Parallel Test Systems perform the time consuming functional tests of the traditional tester, off-loading up to 80 percent of the test time from the final tester. Massively Parallel Test Systems, such as the MTX Parallel Functional Test System, are a cost-effective solution that can test thousands of ICs simultaneously and can provide traditional burn-in as well. This allows semiconductor manufacturers to use their higher cost testers for the high speed and high accuracy tests for which they are best suited, rather than inefficiently using them for time-consuming functional tests. Using the massively parallel memory testing solution rather than traditional testing methods, high volume memory manufacturers can reduce their equipment expenditures by tens of millions of dollars. Because it combines burn-in and functional tests, there are no additional handling steps required to realize the benefits of a massively parallel test system. Moreover, testing during burn-in detects intermittent failures that only occur during burn-in and that would otherwise pass during a traditional final test. Test results from highaccuracy massively parallel test systems correlate extremely well with those obtained using traditional memory testers.

5 Aehr Test Systems Parallel Test Process Flow

6 What is Die-Level Burn-in and Test? IC manufacturers are creating more expensive package designs and multi-chip module (MCM) packages to deliver increased packaging density. MCMs contain several individual die in each package. Presently, burn-in and test are performed after the die are assembled into the module. Manufacturers realize that repairing or discarding a defective MCM is far too costly. As a result, die level burn-in and test of the individual die (before packaging) ensures that they only package known-good die (KGD) and, in turn, produce a quality product at a reduced cost.