Precision RRI0 Dual Operational Amplifier OP284-EP

Transcription

1 Precision RRI Dual Operational Amplifier FEATURES Single-supply operation Wide bandwidth:. MHz Low offset voltage: μv Unity-gain stable High slew rate:. V/μs Low noise: 3.9 nv/ Hz ENHANCED PRODUCT FEATURES Supports defense and aerospace applications (AQEC standard) Military temperature range ( C to + C) Controlled manufacturing baseline assembly/test site fabrication site Enhanced product change notification Qualification data available on request APPLICATIONS Battery-powered instrumentation Power supply control and protection Telecommunications DAC output amplifier ADC input buffer PIN CONNECTION DIAGRAM OUT A IN A +IN A 3 V TOP VIEW (Not to Scale) Figure. 8 V+ 7 OUT B 6 IN B +IN B 6- GENERAL DESCRIPTION The is a dual, single-supply,. MHz bandwidth amplifier featuring rail-to-rail inputs and outputs (RRIO). The is guaranteed to operate from V to 36 V (or ±. V to ±8 V). This amplifier is superb for single-supply applications requiring both ac and precision dc performance. The combination of wide bandwidth, low noise, and precision makes the useful in a wide variety of applications, including filters and instrumentation. Other applications for this amplifier include portable telecommunications equipment, power supply control and protection, and use as an amplifier or buffer for transducers with wide output ranges. Sensors requiring a rail-to-rail input amplifier include Hall effect, piezoelectric, and resistive transducers. The ability to swing rail to rail at both the input and output enables designers to build multistage filters in single-supply systems and to maintain high signal-to-noise ratios. The is specified over the extended industrial temperature range of C to + C. The is available in a SOIC surface-mount package. Rev. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 96, Norwood, MA 6-96, U.S.A. Tel: Analog Devices, Inc. All rights reserved. Technical Support

2 TABLE OF CONTENTS Features... Enhanced Product Features... Applications... Pin Configuration... General Description... Revision History... Specifications... 3 Electrical Characteristics... 3 Enhanced Product Absolute Maximum Ratings... Thermal Resistance... ESD Caution... Typical Performance Characteristics...6 Outline Dimensions... 3 Ordering Guide... 3 REVISION HISTORY / Revision : Initial Version Rev. Page of 3

3 SPECIFICATIONS ELECTRICAL CHARACTERISTICS V S =. V, V CM =. V,, unless otherwise noted. Table. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V OS μv C T A + C μv Input Bias Current I B 6 na C T A + C 6 na Input Offset Current I OS C T A + C na Input Voltage Range V Common-Mode Rejection Ratio CMRR V CM =. V to. V, C T A + C 86 db Large Signal Voltage Gain A VO R L = kω, V V OUT V V/mV R L = kω, C T A + C V/mV Offset Voltage Drift ΔV OS /ΔT.. µv/ C Bias Current Drift ΔI B /ΔT pa/ C OUTPUT CHARACTERISTICS Output Voltage High V OH I L =. ma.8 V Output Voltage Low V OL I L =. ma mv Output Current I OUT ±6. ma POWER SUPPLY Supply Current/Amplifier I SY V OUT =. V, C T A + C. ma DYNAMIC PERFORMANCE Slew Rate SR R L = kω.6. V/µs Settling Time t S To.%,. V step. µs Gain Bandwidth Product GBP 3. MHz Phase Margin Φ M Degrees NOISE PERFORMANCE Voltage Noise e n p-p. Hz to Hz.3 μv p-p Voltage Noise Density e n f = khz 3.9 nv/ Hz Current Noise Density i n. pa/ Hz Rev. Page 3 of 3

4 Enhanced Product V S = ±. V, V CM = V,, unless otherwise noted. Table. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V OS μv C T A + C μv Input Bias Current I B 8 na C T A + C 6 na Input Offset Current I OS C T A + C na Input Voltage Range + V Common-Mode Rejection Ratio CMRR V CM =. V to +. V, C T A + C 86 9 db Large Signal Voltage Gain A VO R L = kω, V V OUT V V/mV R L = kω, C TA + C 7 V/mV Offset Voltage Drift ΔV OS /ΔT.. µv/ C Bias Current Drift ΔV B /ΔT pa/ C OUTPUT CHARACTERISTICS Output Voltage High V OH I L =. ma.8 V Output Voltage Low V OL I L =. ma.87 V Output Current I OUT ± ma POWER SUPPLY Power Supply Rejection Ratio PSRR V S = ±. V to ±8 V, C T A + C 9 db Supply Current/Amplifier I SY V OUT = V, C T A + C. ma V S = ±8 V, C T A + C. ma DYNAMIC PERFORMANCE Slew Rate SR R L = kω.. V/µs Full Power Bandwidth BW p % distortion, R L = kω, V OUT = 9 V p-p 3 khz Settling Time t S To.%, V step µs Gain Bandwidth Product GBP. MHz Phase Margin Φ M Degrees NOISE PERFORMANCE Voltage Noise e n p-p. Hz to Hz.3 µv p-p Voltage Noise Density e n f = khz 3.9 nv/ Hz Current Noise Density i n. pa/ Hz Rev. Page of 3

5 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating Supply Voltage ±8 V Input Voltage ±8 V Differential Input Voltage ±.6 V Output Short-Circuit Duration to GND Indefinite Storage Temperature Range 6 C to + C Operating Temperature Range C to + C Junction Temperature Range 6 C to + C Lead Temperature (Soldering 6 sec) 3 C For input voltages greater than.6 V, the input current must be limited to less than ma to prevent degradation or destruction of the input devices. THERMAL RESISTANCE θ JA is specified for the worst-case conditions; that is, θ JA is specified for a device soldered in the circuit board for the SOIC package. Table. Thermal Resistance Package Type θ JA θ JC Unit 8-Lead SOIC 8 3 C/W ESD CAUTION Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. Page of 3

6 Enhanced Product PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUT A IN A +IN A V 3 TOP VIEW (Not to Scale) V+ OUT B IN B +IN B 6- Figure. Pin Configuration Table. Pin Function Descriptions Pin No. Mnemonic Description OUT A Output Channel A. IN A Inverting Input Channel A. 3 +INA Noninverting Input Channel A. V Negative Supply Voltage. +IN B Noninverting Input Channel B. 6 IN B Inverting Input Channel B. 7 OUT B Output Channel B. 8 V+ Positive Supply Voltage. Rev. Page 6 of 3

7 TYPICAL PERFORMANCE CHARACTERISTICS 8 6 V CM =.V C T A + C INPUT OFFSET VOLTAGE (µv) Figure 3. Input Offset Voltage Distribution, V S = V TCV OS (µv/ C) Figure 6. Input Offset Voltage Drift Distribution, V S = ± V INPUT BIAS CURRENT (na) V CM = V S / INPUT OFFSET VOLTAGE (µv) Figure. Input Offset Voltage Distribution, V S = ± V TEMPERATURE ( C) Figure 7. Bias Current vs. Temperature 6- C T A + C 3 INPUT BIAS CURRENT (na) TCV OS (µv/ C) Figure. Input Offset Voltage Drift Distribution, V S = V 6-8 COMMON-MODE VOLTAGE (V) Figure 8. Input Bias Current vs. Common-Mode Voltage 6- Rev. Page 7 of 3

8 Enhanced Product 7 6 NO LOAD OUTPUT VOLTAGE (mv) SOURCE SINK OPEN-LOOP GAIN (db) PHASE SHIFT (Degrees) 7.. LOAD CURRENT (ma) Figure 9. Output Voltage to Supply Rail vs. Load Current 6-3 k k M M Figure. Open-Loop Gain and Phase vs. Frequency (No Load), V S = V 6-6 SUPPLY CURRENT PER AMPLIFIER (ma) OPEN-LOOP GAIN (db) V S = 3V NO LOAD PHASE SHIFT (Degrees) TEMPERATURE ( C) Figure. Supply Current vs. Temperature k k M M Figure 3. Open-Loop Gain and Phase vs. Frequency (No Load), V S = 3 V 6-7 SHORT-CIRCUIT CURRENT (ma) 3 I SC +I SC, V CM =.V +I SC I SC OPEN-LOOP GAIN (db) NO LOAD PHASE SHIFT (Degrees) TEMPERATURE ( C) Figure. Short-Circuit Current vs. Temperature 6-3 k k M M Figure. Open-Loop Gain and Phase vs. Frequency (No Load), V S = ± V 6-8 Rev. Page 8 of 3

9 3 3 7 V S = V OPEN-LOOP GAIN (V/mV) 3 V < V OUT < V V < V OUT < +V OUTPUT IMPEDANCE (Ω) A V = + A V = + 3 A V = TEMPERATURE ( C) 6-9 k k k M M 6- Figure. Open-Loop Gain vs. Temperature Figure 8. Output Impedance vs. Frequency CLOSED-LOOP GAIN (db) k k k M M 6- MAXIMUM OUTPUT SWING (V p-p) 3 V IN =.V TO.V k k k M M 6-6 Figure 6. Closed-Loop Gain vs. Frequency ( kω Load) Figure 9. Maximum Output Swing vs. Frequency OUTPUT IMPEDANCE (Ω) A V = + A V = + V OUT (V) 3 V IN = ±V 6 3 A V = + k k k M M 6-3 k k k M M 6-7 Figure 7. Output Impedance vs. Frequency Figure. Maximum Output Swing vs. Frequency Rev. Page 9 of 3

10 Enhanced Product CMRR (db) V S = +V SLEW RATE (V/µV) 6 3 +SLEW RATE SLEW RATE +SLEW RATE SLEW RATE k k k M M TEMPERATURE ( C) 6-3 Figure. CMRR vs. Frequency Figure. Slew Rate vs. Temperature PSRR (db) V S = +V VOLTAGE NOISE DENSITY (nv/ Hz) 3 ±.V V S ±V k k k M M Figure. PSRR vs. Frequency 6-9 Figure. Voltage Noise Density vs. Frequency 6-3 OVERSHOOT (%) V S = ±.V, A VCL = V IN = ±mv OS +OS CURRENT NOISE DENSITY (pa/ Hz) 8 6 ±.V V S ±V CAPACITIVE LOAD (pf) Figure 3. Small Signal Overshoot vs. Capacitive Load 6-3 Figure 6. Current Noise Density vs. Frequency 6-33 Rev. Page of 3

11 3.3. A V = M STEP SIZE (V).%.% NOISE (µv) SETTLING TIME (µs) Figure 7. Step Size vs. Settling Time, VS = V TIME Figure 3.. Hz to Hz Noise, VS = ± V STEP SIZE (V) 6 6.%.% CHANNEL SEPARATION (db) SETTLING TIME (µs) Figure 8. Step Size vs. Settling Time, VS = ± V 6-3 k k k M M Figure 3. Channel Separation vs. Frequency V S = ±.V A V = M mv A V = + R L = OPEN C L = 3pF NOISE (µv). V. mv µs TIME Figure 9.. Hz to Hz Noise, VS = ±. V 6-36 Figure 3. Small Signal Transient Response Rev. Page of 3

12 Enhanced Product mv A V = + C L = 3pF THD + N (%).. V OUT = ±.7V A V = + V S = ±.V V V OUT = ±.V mv µs 6-. V OUT = ±.V. k k k 6-3 Figure 33. Small Signal Transient Response Figure 3. Total Harmonic Distortion + Noise vs. Frequency Rev. Page of 3

13 OUTLINE DIMENSIONS. (.968).8 (.89). (.7) 3.8 (.97) 8 6. (.).8 (.8). (.98). (.) COPLANARITY. SEATING PLANE.7 (.) BSC.7 (.688).3 (.3). (.).3 (.) 8. (.98).7 (.67). (.96). (.99).7 (.). (.7) COMPLIANT TO JEDEC STANDARDS MS--AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 3. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 7-A ORDERING GUIDE Model Temperature Range Package Description Package Option OP8TRZ-EP-R7 C to + C 8-Lead Standard Small Outline Package [SOIC_N] R-8 Z = RoHS Compliant Part. Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D6--/() Rev. Page 3 of 3