PCB Layer Stackup Six-Layer Boards

Transcription

1 PCB Layer Stackup Six-Layer Boards Most six-layer boards consist of four signal routing layers and two planes. From an EMC perspective, a six-layer board is preferred over a four-layer board because it is easy to shield high-frequency signals by placing them on buried layers between planes, or to provide for orthogonally routed signal layers that are referenced to the same plane. 39

2 PCB Layer Stackup Six-Layer Boards The only time this arrangement works even moderately well is if all the high-frequency signals are routed on layers 2 and 5 and only lowfrequency signals, or better yet no signals at all (just mounting pads and test points), are located on layers 1 and 6. JHLin, AppEMC; PCB Layout & Stackup 40

3 PCB Layer Stackup Six-Layer Boards Its main drawback, and not a serious one, is the separation of the power and ground planes. In many cases Fig can provide better EMC performance than the stackup of Fig JHLin, AppEMC; PCB Layout & Stackup 41

4 PCB Layer Stackup Six-Layer Boards This configuration has the advantage that orthogonal routed signals always reference the same plane. The disadvantage is that the signals on layers one and six are not shielded. Typical layer spacing for this board might be in/0.005 in/0.040 in/0.005 in/0.005 in. Figure would often be preferred if the product was in an unshielded enclosure (because the high-frequency signal traces are shielded by the outer planes), whereas the configuration of Fig might be preferred if the product were in a shielded enclosure. JHLin, AppEMC; PCB Layout & Stackup 42

5 PCB Layer Stackup Eight-Layer Boards An eight-layer board can be used to add two more routing layers or to improve EMC performance by adding two more planes. Most eight-layer boards (and all the ones that we will concentrate on here) consist of four signal-routing layers and four planes. An eight-layer board can be thought of as a six-layer board with optimized EMC performance. 43

6 PCB Layer Stackup Eight-Layer Boards For best EMC performance and signal integrity, when critical highfrequency signals change layers (e.g., from layer 4 to 5 in the case of Fig ) a ground-to-ground via should be added between the two ground planes near the signal via. The stackup in Fig can be further improved by using some form of embedded PCB capacitance technology. If a design requires two dc voltages (e.g., 5 V and 3.3 V), the stackup of Fig should be considered. 44

7 PCB Layer Stackup Eight-Layer Boards Typical layer spacing for this configuration might be in/0.005 in/0.005 in/0.020 in/0.005 in/0.005 in/0.010 in. An even better layer spacing for the stackup of Fig would be in/0.005 in/0.005 in/0.010 in/0.005 in/0.005 in/0.015 in. JHLin, AppEMC; PCB Layout & Stackup 45

8 PCB Layer Stackup Eight-Layer Boards This is an excellent performing configuration with good signal integrity and is often preferred over the stackup of Fig because of the tightly coupled power/ground planes. The stackup in Fig can be improved even more by using some form of embedded PCB capacitance technology for layers 4 5 to improve the high-frequency decoupling. For high-frequency signals (with harmonics above 500 MHz) on a board in a shielded enclosure, the stackup of Fig would usually be preferred. For lower frequency and/or a product in an unshielded enclosure, the stackup of Fig might be preferred because it provides shielding for the signal layers. JHLin, AppEMC; PCB Layout & Stackup 46

9 PCB Layer Stackup Eight-Layer Boards There is very little EMC advantage to using a board with more than eight layers. More than eight layers are usually only used when additional signal routing layers are required. JHLin, AppEMC; PCB Layout & Stackup 47

10 PCB Layer Stackup Ten-Layer Boards Ten-layer boards usually have six signal layers and four planes. Having more than six signal layers on a 10-layer board is not recommended. High layer count boards (10 plus) require thin dielectrics (typically in or less on a in thick board) and therefore they automatically have tight coupling between all adjacent layers. 48

11 PCB Layer Stackup Ten-Layer Boards The signals on layers 3 and 4 are isolated (shielded) from the signals on layers 7 and 8 by the center power/ground plane pair. For example, high-speed clocks might be routed on one of these pairs, and high-speed address and data buses routed on the other pair. Another possibility for routing orthogonal signals on the 10- layer board shown in Fig is to pair layers 1 and 3, layers 4 and 7, and layers 8 and 10. JHLin, AppEMC; PCB Layout & Stackup 49

12 PCB Layer Stackup Ten-Layer Boards The stackup of Fig is very desirable if you have few low-speed signals to put on the outer signal layers (as in Fig ) and most of your signals are high speed. One consideration with this stackup relates to how badly the outside ground planes will be cut up by the component mounting pads and vias on a highdensity PCB. JHLin, AppEMC; PCB Layout & Stackup 50

13 PCB Layer Stackup Ten-Layer Boards The stackup in Fig can be improved even more by replacing layers 2 and 9 each with a pair of embedded PCB capacitance layers (thereby satisfying objective #3). This, however, effectively converts it to a 12-layer board. The stackup in Fig can be improved with the use of some form of embedded PCB capacitance technology for layers 5 and 6. JHLin, AppEMC; PCB Layout & Stackup 51

14 PCB Layer Stackup Twelve and More Layer Boards JHLin, AppEMC; PCB Layout & Stackup 52

15 PCB Layer Stackup Twelve and More Layer Boards JHLin, AppEMC; PCB Layout & Stackup 53

16 PCB Layer Stackup Basic Multilayer PCB Structures Although contrary to popular practice, I believe that significant evidence exists to show that for high-frequency circuitry, good EMC performance, and signal integrity, routing critical signals on layers that are adjacent to the same plane should take precedence over shielding critical signal layers by burying them between planes. The basic stackup should consist of multiples of the two basic structures that consist two signal layers adjacent to a plane (signal-plane-signal) as shown in Fig A as well as adjacent power and ground plane pairs as shown in Fig B. These two structures can then be combined in multiple ways to form PCBs with six or more layers. JHLin, AppEMC; PCB Layout & Stackup 54

17 PCB Layer Stackup Basic Multilayer PCB Structures Adding the basic building block from Fig B to the center of the board shown in Fig produces a 14-layer board that meets all the design objectives. 55

18 General PCB Design Procedure The following factors are also important in determining the EMC performance of the board: The layer spacing The assigning of signal layer pairs for orthogonal routing of signals The assignment of signals (clock, bus, high speed, low frequency, etc.) to which signal-routing-layer pairs JHLin, AppEMC; PCB Layout & Stackup 56

19 General PCB Design Procedure This discussion on board stackup has assumed a standard in-thick board, with symmetrical cross section, an even number of layers, and conventional via technology. If blind, buried, micro-vias, nonsymmetrical boards, or odd number layer count boards are considered, other factors come into play and additional board stackups not only become possible but also desirable in many cases. The following represents the general steps required in creating a PCB stackup: Determine the number of signal routing layers required Determine how to handle multiple dc voltages Determine the number of power planes required for the various system voltages Determine whether multiple voltages will be on the same power plane layer, thereby requiring a split-plane, and routing restrictions on the adjacent layers JHLin, AppEMC; PCB Layout & Stackup 57

20 General PCB Design Procedure Assign each signal layer pair to a solid reference plane as shown in Fig A Pair power and ground planes as shown in Fig B Determine the ordering of the layers Determine the spacing between layers Define any necessary routing restrictions All the stackups discussed, with the exception of Fig , will provide good-to-excellent EMC performance. The avoiding of current return path discontinuities is probably the most important, and often overlooked, principle involved in good PCB design. JHLin, AppEMC; PCB Layout & Stackup 58