High Power Factor and High Efficiency You Can Have Both

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2 Topic elements of the power-distribution system (the build up of triplen harmonics the neutral wire beg one significant concern). On the other hand, Energy Star requires power supplies with greater than or equal to -W put power must have a true power factor of.9 or greater at % of rated load when tested at 5 V at 6 Hz. Universal-put power supplies will have to comply to both standards. It is terestg to exame the relationship between these two standards: Is one standard stricter than the other one? Does a power supply passg one standard automatically qualify for the other one? First we will calculate the power factor associated with an put current that has a harmonic content equal to the maximum permitted by EN6-3-, class D (most power supplies of terest fall to this category). Accordg the power-factor defition, the power factor is determed by both the displacement (cos(φ)) and distortions (ratio of the fundamental to RMS of the put current). Generally, displacement of the put current is caused by the net reactive current of the EMI filter. At full-load condition, the effect of the filter s net reactive current is negligible, so the power factor reduces to: I F = = 3 V In V + In n= 3, 3 n= 35, =. 76 (3) This value is significantly lower than the Energy Star.9 power-factor requirement, so a circuit that just meets EN6-3- will fail Energy Star. Conversely, a power supply may be designed to absorb a square wave of current from the le to meet the Energy Star requirement by emulatg an ductive-put filter with a large ductance value (see Fig. ). The square-wave current shown yields a power factor >.9 and meets the Energy Star requirement. However, the spectral analysis shows that all harmonics above the th exceeds the EN6-3- limits. From the above it may appear that a potential problem is loomg, but, fortuitously, all the commonly used active-fc circuits draw put-current waveforms that can easily comply to both standards. AC a. Rectifier with.9 power factor. b. Input current waveform Fig.. Current waveform with F =.9. IV. Benefits of Active FC The followg benefits can result from FC: Reduces RMS put current. For stance, a power circuit with a 5-V/.5-A ratg is limited to about 79 W of available power with a F of.5. Increasg the F to.9 will double the deliverable power to 94 W, allowg higher-power devices to be operated. Facilitates power-supply holdup. The active FC circuit matas a fixed termediate DC bus voltage that is dependent of the put voltage, so the energy stored the system does not decrease as the put voltage decreases. This allows use of smaller, less expensive bulk capacitors. Enables universal put voltage capability by providg a constant 4-V bus voltage for the entire 85- to 65-VAC voltage range. Improves efficiency of downstream converters. FC reduces the dynamic voltage range applied to the downstream DC/DC converters. As a result, voltage ratgs of rectifiers can be reduced, resultg lower forward drops; and operatg duty-cycle/transformer turns ratios can be creased, resultg lower current switches and wdgs. -

3 Increases the efficiency of the power-distribution system. Lower RMS current reduces distribution wirg losses. See Appendix for details. Reduces the VA ratg of standby power generators. Reduces stresses on neutral conductors. Reducg harmonics elimates the risk of triplen harmonics (the third and multiples thereof) that can add up to dangerous levels the neutral conductor of Y-connected 3-phase systems. V. Effect of Active FC on ower-supply Efficiency It follows from the above benefits that havg active FC at power levels above 75 W are selfevident. At the same time, we should remember that the FC stage is an additional powerprocessg stage that evitably adds losses to the system. It is structive to quantify these losses order to develop ways to mimize them. Because the typical FC stage is a boost converter, the converter has to boost the stantaneous le-put voltage to a value equal to the output voltage order to transfer power from the le-put voltage to the output. Note that if the put voltage is equal to the output voltage, the converter does not have to process any power sce power can pass directly from the put to the output. Under this condition, the losses are only caused by the DC drops on the output rectifier. These losses will add to less than % of the output power. Consequently, the power processed by the boost converter at any given moment is a function of the difference between the put and output voltages; the higher the difference, the more power the converter has to process and when more power is processed, more power is dissipated. This means that the difference between the put and output voltages of the FC stage affects both the efficiency of the stage and the ratgs of its components. The followg analysis quantifies this effect. To facilitate the analysis, we could visualize a converter model (referred to as the V converter ) that is fed from the rectified le voltage and has a floatg output connected series with the rectified le voltage. By controllg the output voltage of the V converter so it is equal to the difference between the momentary le voltage and the required output voltage of the FC, we obta a system that is equivalent to the boost converter. The V converter processes only the power transferred directly to the output, so the model allows separation between the power transmitted directly to the output (with nearly % efficiency) and the power processed by the FC converter. By assumg a practically achievable efficiency for the V converter, we can estimate the efficiency of an equivalent boost FC stage under various operatg conditions. The proposed model is not just a theoretical abstraction. As shown Fig., connectg the output of a flyback converter series with its put yields a system equivalent to a boost converter. The DC transfer function of the V flyback converter can be calculated as follows: D V= V (4) D V = V + V out (5) D V out = V + V D V = out V D (6) (7) Equation 7 is exactly the DC transfer function of a boost converter. For the purpose of the analysis, we will defe a boost factor (BF) as the ratio of the boostconverter output voltage to the peak value of the + Flyback In V Converter Flyback Out Fig.. Simplified block diagram of a flyback V converter. FC Out Topic -3

4 Topic put voltage. The BF is a measure of the amount of boostg that the FC stage has to perform as a function of the le-put voltage. Vout BF = (8) V ( pk) Now we will exame how the variation of the BF affects the efficiency of the FC stage. Normalizg the average put power and RMS put voltage to unity, and the output voltage of the FC to the square root of (equal to the peak of the put voltage), we have and ( ave) = (9) V = out. () The stantaneous value of the put power is given by ( ωt) = s ( ωt), () where w is the angular velocity, pf, of the le voltage, and t is the time. The stantaneous value of the put voltage is given by V = V out s( ω t). () BF For the terval < wt < p, the output voltage of the V converter will be V = V out V. (3) Substitutg Equations () and () to Equation (3) yields V = s( t). BF ω (4) Sce the converter efficiency is high, the output power is nearly equal to the put power: ( ) = ( ave) (5) out ave The output current of the V converter stage is also equal to the output current of the entire FC stage and is given by I out = V out (6) and s ( ω t) I out =. (7) The output power of the V converter is the product of Equations (4) and (7): BF s( t) s ( t) V = ω ω (8) Let s compare the peak and average power ratgs of the V converter for two practical cases: one with a sgle put-voltage range of 87 to 65 VAC, and one with a universal put-voltage range of 85 to 65 VAC. Both cases assume the FC output voltage is peak value of 65 VAC. In the first case, BF = In the second case, =. 47. BF = 65 = The peak power (normalized) of the V converter occurs at ωt = π/ for BFs of 3.8 and.47, and at π/4 for a BF of (see Fig. 3): (9) π V ωt =, BF = = V V () π ωt =, BF = = π ωt =, BF =.93 4 = () The average power (normalized) that the V converter can deliver is a function of the BF and is obtaed by averagg Equation (8) over a half cycle of the le-put voltage: ave = π V( ) π V dωt Vout ave = π Vout s( t) BF π ω V( ) s ( ωt) d( ωt) () (3) -4

5 .36 Normalized ower, V BF =.48 (V = 87 V) BF = (V = 65 V) BF =3.8 (V =85V) Topic t Fig. 3. ots where peak power occurs..73 Normalized Average ower, V(ave) Boost Factor (BF) Fig. 4. lot of average put power for a V converter. Figs. 3 and 4 illustrate the impact of the BF on the peak and average power ratgs of the V converter (the case of unity BF is also added for completeness). At a BF of unity, the V converter has to handle an average of only 5% and a peak of 9% of the output power, creasg to 4% and 59% for a BF of.47, or 73% and 36% for a BF of 3.8. These figures provide an sight to the effect that a high BF has on the size and cost of the FC converter. A converter designed for universal put voltage (BF = 3.8) will be rated to a peak power that is.3 times higher than the power of a converter designed for an put range of only 87- to 65-VAC put (BF =.47). In the proposed model, all the losses are generated by the V converter. For a V converter s efficiency of η = 9% (a reasonable value for a flyback converter), the average losses will be loss V(ave) = η V(ave). (4) -5

6 Topic Sce a good portion of the power goes directly to the output, the FCstage efficiency will be η = loss. (5) Fig. 5 illustrates the effect of the BF on FC efficiency. An efficiency of 98.3% for a BF of unity decreases to 9.9% for a BF of 3.8 (with a universal put-voltage range). In addition, we assumed a constant 9% efficiency for the V converter, when reality the efficiency is even lower at higher BFs. The primary contrib u- tors to a decrease efficiency are: the resistance of the wdgs, the R DS(on) of the MOSFETs. These factors all represent power losses that can crease with higher temperatures caused by the higher power dissipation. Efficiency, (%) This analysis suggests that a converter s ability to handle a wide put-voltage range (a high BF) has significant penalties, while a low BF improves not only the efficiency but also the cost and/or power density of the system (the components of the boost converter have to be rated for only a relatively small percentage of the output power). For these reasons, a boost fol lower concept has been proposed the literature. A boost follower is Boost Factor (BF) Fig. 5. FC efficiency versus BF for a V converter. a boost converter that produces a variable output voltage that is only slightly higher than the peak value of the put voltage. Consequently, the BF is near unity over the full range of the put voltage, and the efficiency of the FC stage is maximized. A boost follower can be easily implemented usg any standard FC control IC. An application circuit usg the Texas Instruments (TI) UCC387 FC controller [] is shown Fig. 6. The output voltage of the boost follower at different le Rectified Le Voltage R 998 k Vout (Boost Output Voltage) R3 998 k UCC387 FC Controller Voltage Amplifier C 6.6 µf R 4.3 k Q N R5 39. k R4 39. k + Internal Reference Fig. 6. Application circuit to implement boost follower. -6

7 4 Output Voltage (Conventional) 3.5 Voltage (V) 3 Output Voltage (Boost Follower) Input Voltage Time (ms) a. Output voltage at different le voltages. Fig. 7. Boost follower operation over a range of le voltages. Boost Factor (BF) Conventional Boost FC Boost-Follower FC 5 5 Input Voltage, V (V) b. BF at different le voltages. Topic voltages is shown Fig. 7a. With this data, BFs at different le voltages can be calculated and are shown Fig. 7b. Because the output voltage is much closer to the put voltage, the BF of the boost follower is only. at an 85-V put. The reduced BF leads to efficiency improvement for all the le voltages. Unfortunately, the boost follower solution is beneficial only if the dynamic range of the AC put voltage is relatively low and there is little or no requirement for holdup. If the AC le voltage varies widely (universal put voltage), the voltage applied to the downstream converter will vary from approximately to 375 VDC. This large variation will force compromises the design of the converter that will result signifi cant degradation of the system efficiency. The larger put-voltage range will impose a lower transformer turns ratio and reflect a higher current to the primary circuit, creasg the RMS current the primary wdgs and switchg transis tors as well as generatg higher differentialmode EMI. The low transformer turns ratio causes an crease the voltage-blockg require ments of the secondary rectifiers; and the higher voltage ratg will result higher conduction drop (or higher R DS(on) the case of synchronous rectifiers) and poorer reverse-recovery performance. In addition, the creased secondary voltage will require a larger filter ductance, resultg higher losses the output ductor. Sce the energy stored the FC capacitor at low put voltages will be low, very large capaci tance will be required to support the output voltage for the customary - to -ms holdup time required many applications. All all, the power dissipation crease the downstream converter may equal or exceed the power savgs provided by the creased efficiency of the boost follower. A. Universal Input: Is it a Must? Considerg the significant impact that a wide put-voltage range has on the cost and efficiency of the FC converter s front end, it is important to look at the benefits and penalties associated with universal put-voltage designs. While portable products must operate with universal put voltages, other products will always be operated at a local-power voltage of V, 5 V, or 3 VAC. For stance, TV receivers are designed for regional use and are operated throughout their entire service life from a sgle le voltage of V for Japan and the U.S., and of 3 V for the European Union and other countries. When these products are designed for universal put voltage, the efficiency will be several percentage pots lower when operated at the -V put range. Consequently, addition to the loss of power, costs will be curred for more expensive components and/or extra thermal management that are not necessary if the equipment is operated at the -V put range. As previously shown, separate designs for V and 3 V will -7

8 Topic yield nearly equal efficiencies when operated with nearly the same BFs. (The -V design will have an termediate -VDC bus, and the 3-V design will have a 4-VDC bus.) Although separate designs for local voltage will yield higher efficiency, better power density, and lower cost, they have one major disadvantage different bills of material not only for the FC stage but also for the downstream converters, which will have to be designed for different voltages. This disadvantage may overshadow the benefits and is probably the major reason why virtually all applications are designed for universal put voltage. With efficiency becomg an ever more critical parameter, a different approach may be considered: a FC converter whose ternal connections between the components are configured on the assembly le so that the BF is roughly the same for both high and low put-voltage ranges. B. Ideal Configurable FC Converter An ideal configurable FC converters is shown Fig. 8. If the devices are configured parallel as shown Fig. 8a, a low le-put voltage will generate a -V output. If these devices are reconfigured series as shown Fig. 8b, a high le-put voltage will generate a 4-V output. Fig. 9 compares the BF of these converters with that of a conventional boost FC converter. The BF is reduced to half at low le-put voltages, which significantly improves efficiency. In the ideal configurable FC circuit, all the components are active, operatg at both high and low le-put voltages, which maximizes their utilization and lowers design cost. However, because there are different output voltages at different put les, the downstream DC/ DC converter has to be configurable as well. Other wise, the configurable FC converter only moves the design stress from the FC stage to the downstream DC/DC stage stead of really solvg the problem. One simple example of configurg a downstream DC/DC Boost Factor (BF) a. Configuration for low le-put voltage. b. Configuration for high le-put voltage. Fig. 8. Ideal configurable FC converter. converter is to use a full bridge at the -V FC output and a half bridge at the 4-V FC output. Because of the herent doublg effect that occurs when the topology changes from full-bridge to half-bridge, the transformer and secondary-side designs can stay the same. Nevertheless, usg a configurable converter both the FC and the DC/DC stage is complicated compared with the origal design and may not be attractive enough for commercial applications. Conventional Boost FC Converter Ideal Configurable FC Converter 5 5 Input Voltage, V (V) Fig. 9. BF for boost FC and ideal configurable FC converters. -8

9 S S Topic Fig.. Configurable three-level boost converter. C. Configurable Three-Level FC Converter A more practical solution, a configurable threelevel FC converter (also know as a three-level converter), uses the same FC-stage components as the ideal configurable FC converter, but it uses jumpers to implement different topologies for high and low le-put voltages. Because of the reconfigurable structure, the output-bus voltage does not change, and the DC/DC stage is not affected. A configurable three-level boost converter is shown Fig., with two boost converters series to generate the output voltage. Because of the three-level structure, the voltage stresses on the MOSFETs and diodes are only half of the output voltage, so low-voltage devices can be used to achieve better performance []. At high le-put voltages, the range switch, S, is open (see Fig. ). The whole converter operates as a sgle boost converter with an output voltage of 4 V. It has two MOSFETs series and two diodes series, all of which creases the conduction loss. However, at high le-put voltages, the boost FC converter is highly efficient because of the low current stress and the lower BF. The creased conduction loss still results very high efficiency. At low le-put voltages, the range switch, S, is closed to construct a voltage doubler. On each half cycle of the le-put voltage, only one boost converter is operatg, as shown Fig., generatg V on one of the two seriesconnected output capacitors. The other boost converter operates durg the subsequent le half cycle, generatg V on the other output capacitor. The output voltage of the FC stage is the sum of the voltages on the two capacitors, i.e. 4 V. The reduced voltage delivered by each a. Chargg ductor. S b. Dischargg ductor. Fig.. Equivalent circuit with high le-put voltage. S a. ositive half cycle. S b. Negative half cycle. Fig.. Equivalent circuit with low le-put voltage. -9

10 Topic converter greatly reduces the duty cycle and also reduces conduction loss, switchg loss, and diode reverserecovery loss. Sce each MOSFET and diode see only half of the output voltage, low-voltage devices can be used to easily achieve better conduction loss and switchg loss and further crease the overall system efficiency. Sce the configurable three-level FC con verter has a -V output voltage for each converter at low le-put voltages and 4 V at high le-put voltages, it has the same BF as the ideal configurable FC circuit. The reduced BF helps to improve the FC-stage efficiency at low le-put voltages. Another major source of efficiency loss is the put diode bridge. The voltage drop on the diode bridge stays relatively constant regardless of the level of current flowg through it. For a conventional boost FC converter, there are two diodes the diode bridge conductg current at any time. The total voltage drop on those two diodes is about V. At a high le-put voltage of V, this -V drop causes a less than % drop efficiency. However, at a low le-put voltage of V, the same -V drop causes a.% drop efficiency. Efficiency can drop even further when the put voltage is lower. In a configurable three-level FC converter at low le-put voltages, the voltage-doubler structure has only one diode of the diode bridge the conduction path. This removes a diode voltage drop of V, which can be easily translated to a % crease efficiency with a -V put. An efficiency plot combg all the benefits of the configurable three-level FC converter is shown Fig. 3. At a high le-put voltage, the efficiency is about the same as with a conventional boost FC converter; but at a low le-put voltage, the efficiency improves dramatically. Although this configurable three-level FC converter improves overall system efficiency, it also presents many challenges. The three-level structure requires a high-side driver. if a drive transformer is to be used, the maximum duty cycle may have to be limited to perhaps 8%. An tegrated half-bridge driver IC Efficiency, (%) Input Voltage, V Fig. 3. Efficiency of configurable three-level FC converter. could simplify the driver design but would crease the overall system cost as compared to the simple driver of a conventional FC circuit. Besides, to simplify the drivg scheme, the control ground would have to be set at the source of the bottom switch. Because of the boost diode, the output voltage is not directly connected to the control ground, and isolation would be required for the voltage-feedback loop. Voltage balancg on the output capacitors is another concern. For series capacitors, voltage balancg is determed by the capacitance tolerances and the leakage difference. However, a configurable three-level FC converter at a high le-put voltage, both MOSFETs turn on and off at the same time. A slight difference the switchg speed will cause current to flow through the middle pot, where two capacitors are series together. Voltage balancg can be realized by placg an equalizg resistor parallel to each capacitor, which causes extra loss, or by addg a dedicated control loop to slightly adjust the ON time of each MOSFET. The designer usg a configurable three-level FC converter also faces the difficulty of implementg current sensg. Although usg four current transformers can reconstruct the ductor current, the system implementation becomes much more complicated. Furthermore, at low le-put voltages, only one of the boost converters is operatg durg (V) -

11 each le half cycle, which means that component utilization is not optimal at this operation mode. As the demand for higher efficiency creases, a pot may be reached where the potential efficiency improvement may justify the effort and expense associated with the solution of these problems. D. The Buck FC It is terestg to note that a buck converter can also be used to shape the put current and provide power-factor correction. Sce the output voltage of a buck converter can only be equal to or lower than its put voltage, the buck FC, as shown Fig. 4, will draw current from the put durg only a fraction of le-voltage cycle, leadg to the buck s capa bility to yield very low harmonic distortions or correct the F to close to unity. Nevertheless, as it will be shown below, the buck FC can be a valuable circuit some applications. A quantitative analysis of the buck-fc efficiency is outside the scope of this topic, but it is tuitively clear that the efficiency will be higher at lower put voltages where the switchg and ductor losses will be lower. Similarly to the boost-fc case, a buck factor can be defed as: Buck Factor = V V out (6) Decreasg the buck factor (i.e. creasg the output voltage of the buck FC for a given voltage) improves the efficiency, but, at the same time, decreases the put-current conduction angle that causes a deterioration of both the F and the harmonic distortion. Increasg the buck Factor improves FC and harmonic distortions, but reduces efficiency. Also, reducg the output voltage reduces the energy storage capability of the FC output capacitors. At the correct balance between these para meters, the buck FC becomes an effective solution for meetg the Energy Star efficiency goals when converters are tended for universal voltage. For stance, if the FC output voltage is set to 8 V, the buck factor at 5 VAC will be and the conduction angle will be approximately (see Fig. 5). The result is a F of.97 (well above the Energy Star mimum) and a THD of 4.7%. I + Control (Modified eak CMC) Fig. 4. Buck FC. I (A) load I (A) load Time (ms) a. Buck factor =. Time (ms) b. Buck factor = 4. Fig. 5. Buck FC normalized put current. Vboost Out As the put voltage creases to 6 V, the buck factor will crease to 4 and both the F and THD will improve, reachg.997 and 7.3% respectively. The spectral analysis of the current waveform shows that all harmonics are just a fraction of the maximum allowed by EN6-3-. Although a buck-fc output voltage has an adverse effect on energy-storage and holdup capability, there are applications, such as laptop AC adapters, where the holdup requirements are mimal and an 8-V bus voltage allows use of Topic -

12 Topic -V MOSFETs the second-stage converter. These MOSFETs are expensive with extremely low dra-to-source capacitance and low R DS(on), which results a highly-efficient, cost-effective power tra. The creased low-le efficiency of the buck converter balances the crease of losses the EMI filter and put rectifier. Fig. 6 shows the full-load efficiency of the 8-V buck FC stage used a high-performance, 9-W laptop adapter. In this design, the efficiency exceeds 96% over the full 9- to 7-V put-voltage range. VI. Conclusion Active FC can improve the efficiency of AC-to-DC conversion. The improvement may be curtailed and the FC-stage size and cost will be adversely affected if the system is designed to accommodate a wide range of put voltages. These problems may be mitigated by the use of different FC circuits that reduce the BF and mimize the power processed by the FC stage. VII. References [] Michael O Loughl. Simple circuitry gets that old FC controller workg a boostfollower FC application. [Onle]. Available: [] M.T. Zhang, Yim Jiang, F.C. Lee, M.M. Jovanovic, "Sgle-phase three-level boost power factor correction converter," Applied ower Electronics Conference and Exposition, AEC '95, pp , Vol., March 995. [3] High power factor boost rectifier apparatus, by Dragan Maksimovic and Robert W. Erickson. (995, Jan. 7). U.S. atent [Onle]. Available: =esmbaaaaebaj&dq=maksimovic Efficiency (%) AC Input (V) Fig. 6. Efficiency of a 8-V, 9-W buck FC stage as a function of the AC put voltage. [4] Office of Gas and Electricity Markets. (3, Jan.). Electricity distribution losses: A consultation document. [Onle]. Available: ElecDist/olicy/DistChrgs/Documents/ 36-3distlosses.pdf [5] Brian Fortenbery and Jonathan G. Koomey. (6, Mar. 3). Assessment of the impacts of power factor correction computer power supplies on commercial buildg le losses. California Energy Commission. CA. [Onle]. Available: powersupplies.org/pages/latest_rotocol/ ower_factor_report_cec_5-4-3.pdf -

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