Course Outline. ELE 404: Electronic Circuits I

Transcription

1 Faculty of Engineering and Architectural Science Department of Electrical and Computer Engineering Course Outline ELE 404: Electronic Circuits I Prerequisites ELE 302 and MTH 312 Required Text Reference Texts Microelectronic Circuits, by A.S. Sedra and K.C. Smith, 6 th Edition, 20, Oxford University Press: ISBN Fundamentals of Microelectronics, by B. Razavi, 2 nd Edition, 2014, Wiley: ISBN Calendar Description Learning Objectives Introduction to electronics, diodes, linear and non linear circuit applications. Bipolar junction and field effect transistors: physical structures and modes of operation. DC analysis of transistor circuits. The CMOS inverter. The transistor as an amplifier and as a switch. Transistor amplifiers: small signal models, biasing of discrete circuits, and singlestage amplifier circuits. Biasing of BJT integrated circuits. Multi stage and differential amplifiers. Current sources and current mirrors. Important concepts are illustrated with structured lab experiments and through the use of Electronic workbench circuit simulations. At the end of this course, the successful student will be able to: 1. Use specialized core knowledge of electric circuits to predict and understand behavior of electronic circuits and amplifiers (1d) a. Assessment Method: Directly assessed through quizzes, midterm test, and final exam. b. Assessment Measure: marks obtained. 2. Apply engineering techniques and conduct computations to analyze and solve electronic circuit problems (2c) a. Assessment Method: Directly assessed through quizzes, midterm test, and final exam.. a. Assessment Measure: marks obtained. 3. Transform functional objectives and requirements into candidate designs (4d), propose, evaluate, and rank the candidate designs (4f), select the most suitable design from the candidates (4g), and understand and practice iterations in the design process (4h). a. Assessment Method: Directly assessed through a design project. b. Assessment Measure: marks obtained on a design project. 4. Recognize how experimental results relate to theory (5b) a. Assessment Method: Directly assessed through labs. b. Assessment Measure: marks obtained on lab reports. Course 3 hours of lecture per week 1

2 Organization Course Evaluation Examinations 2 hours of laboratory or tutorial per week Labs 30% Midterm exam 30% Final exam 40% Total 0% Midterm exam will be held in the regular class time (rooms TBA), on Date TBA; it is 0 minutes in duration and closed-book; the coverage will be announced before the exam. Final exam will be written during the exam period at the place and time identified by the university; it will be 3 hours in duration, closed-book, and comprehensive in coverage. To achieve a passing grade, the student must pass both the theory and laboratory components of the course. Content and Schedule of (tentative and subject to modifications without notice) Topic Lecture # and Date Hours Text Sections Diodes and Basic Circuit Applications The ideal diode and its characteristics PN junction diodes, their characteristics, and their ratings Diode models and analysis techniques for diode circuits The Zener diode and Light Emitting Diodes (LEDs) Diode logic circuits Rectifiers and peak detectors Clipping (limiting) and clamping circuits Voltage multipliers #1 (Week #1, Jan. 6) #2 (Week #1, Jan. 9) #3 (Week #2, Jan. 13) #4 (Week #2, Jan. 16) #5 (Week #3, Jan. 20) #6 (Week #3, Jan. 23) #7 (Week #4, Jan. 27) #8 (Week #4, Jan. 30) , 4.2, 4.3, 4.4, 4.5, 4.6 Bipolar Junction Transistor (BJT) Structure and modes of operation BJT as a switch DC biasing The concept of amplification and small signal models of the BJT Basic BJT amplifiers Multistage BJT amplifiers Signals, box representation of amplifiers, amplifier types voltage, current, and power gains #9 (Week #5, Feb. 3) # (Week #5, Feb. 6) #11 (Week #6, Feb. ) #12 (Mid. Test, Feb. 13) #13 (Week #7, Feb. 24) #14 (Week #7, Feb. 27) 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7,6.8, 1.1, 1.2, 1.3, 1.4, 1.5 MOS Field Effect Transistors (MOSFETs) Structure and modes of operation of the e type MOSFET DC Biasing Small signal models of the MOSFET Basic MOSFET amplifiers Multistage MOSFET amplifiers #15 (Week #8, 3) #16 (Week #8, 6) #17 (Week #9, ) #18 (Week #9, 13) #19 (Week #, 17) #20 (Week #, 20) #21 (Week #11, 24) , 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8 2

3 Differential Amplifiers The BJT differential pair and amplifier The MOSFET differential pair and amplifier #22 (Week #11, 27) #23 (Week #12, 31) 4 8.1, 8.2 (except and 8.2.4), 8.3 Current Sources and Current Mirrors Basic MOSFET and BJT current sources Current mirrors and current steering circuits #24 (Week #12, Apr. 3) #25 (Week #13, Apr. 7) 4 7.2, 7.4 Multi Stage Operational Amplifiers #26 (Week #13, Apr. ) Schedule of Labs WEEK WEEK of DATE RANGE Activity 1 Jan. 6 Jan. 6 No Lab NA 2 Jan. 13 Jan INTRODUCTORY LAB NA Lab Due Date 3 Jan. 20 Jan INTRODUCTORY LAB (cont d) Week of Jan Jan. 27 Jan. 27 Jan. 31 LAB #1: Diodes NA 5 Feb. 3 Feb. 3 7 LAB #1: Diodes (cont d) Week of 6 Feb. Feb. 14 No Lab: Midterm Test on Feb. 13 NA Study Week Feb. 17 Feb No Lab NA 7 Feb. 24 Feb. 24 Feb. 28 No Lab NA No Lab NA Apr. 7 Apr LAB #2: BJT NA LAB #2: BJT (cont d) Week of LAB #3: MOSFETs NA 31 Apr. 4 LAB #3: MOSFETs (cont d) Week of Apr. 7 Design Project Report (Lab #5) Due TAs will hold office hours Notes about Labs A complete set of administrative lab rules as well as specific technical instructions has been posted on Course Information and Lab Rules section of Blackboard. In particular, please read the Lab Rules document carefully; the rules will be strictly enforced. An excerpt of the most important items is listed below: 1. Each lab consists of a pre lab assignment, the lab work (i.e., the experiment and its measurements), and a final lab report. Each student s complete pre lab assignment will be marked at the beginning NA 3

4 of the corresponding lab session. A student who has not attempted the pre lab assignment will not be allowed to perform the lab experiment, will be asked to leave the laboratory, and will receive ZERO on that lab. The lab work and results of each group will be assessed by the end of the corresponding lab session. A TA Copy of the results shall be submitted by each group prior to their departure from the laboratory. Refer to the corresponding Lab Instructions documents posted on Blackboard. 2. A pre lab assignment may require that each student simulate the lab circuits using a circuitsimulation software (e.g., Multisim or pspice). The required circuit simulation software comes with the textbook, but it is also available for students use in the lab rooms ENG406, ENG408, ENG409, ENG411, ENG412, ENG306, ENG307, and ENG Subsequent to a lab, each group shall submit a formal (i.e., typed up and properly formatted) lab report directly to the TA in charge, at the start of the next new lab session. Lab reports that are handed in late will receive a penalty of 25% per day (including the weekends). Any report that has been slid under any professor's or TA's office door, or given to the front office, or delivered through any method other than direct submission to the TA will be given ZERO. 4. To be permitted to participate in the lab, each student must have his/her own lab kit. Students without the lab kit will be asked to leave the laboratory and receive ZERO on that particular lab. 5. The information about lab kit sale by the Department will be announced through Blackboard. However, if you wish to purchase the lab kit from a supplier of your choice, a complete list of components has been given in the Lab Rules document posted under the Course Information and Lab Rules section of Blackboard. 6. It is the students responsibility to access and print the corresponding lab instructions from Blackboard on a timely basis. The instructions are posted under the Course Information and Lab Rules section of Blackboard. Important Notes 1. All of the required course-specific written reports will be assessed not only on their technical/academic merit, but also on the communication skills exhibited through these reports. 2. All assignment and lab/tutorial reports must have the standard cover page which can be completed and printed from the Department website at The cover page must be signed by the student(s) prior to submission of the work. Submissions without the cover pages will not be accepted. 3. Should a student miss a mid-term test or equivalent (e.g. studio or presentation), with appropriate documentation, a make-up will be scheduled as soon as possible in the same semester. Make-ups should cover the same material as the original assessment but need not be of an identical format. Only if it is not possible to schedule such a make-up may the weight of the missed work be placed on the final exam, or another single assessment. This may not cause that exam or assessment to be worth more than 70% of the student s final grade. If a student misses a scheduled make-up test or exam, the grade may be distributed over other course assessments even if that makes the grade on the final exam worth more than 70% of the final grade in the course. 4. Students who miss a final exam for a verifiable reason and who cannot be given a make-up exam prior to the submission of final course grades, must be given a grade of INC (as outlined in the Grading Promotion and Academic Standing Policy) and a make-up exam (normally within 2 weeks of the beginning of the next semester) that carries the same weight and measures the same knowledge, must be scheduled. 5. Medical or Compassionate documents for the missing of an exam must be submitted within 3 working days of the exam. Students are responsible for notifying the instructor that they will be missing an exam as soon as possible. 6. Requests for accommodation of specific religious or spiritual observance must be presented to the instructor no later than two weeks prior to the conflict in question (in the case of final examinations within two weeks 4

5 of the release of the examination schedule). In extenuating circumstances this deadline may be extended. If the dates are not known well in advance because they are linked to other conditions, requests should be submitted as soon as possible in advance of the required observance. Given that timely requests will prevent difficulties with arranging constructive accommodations, students are strongly encouraged to notify the instructor of an observance accommodation issue within the first two weeks of classes. 7. The results of the first test or mid-term exam will be returned to students before the deadline to drop an undergraduate course in good Academic Standing. 8. Students are required to adhere to all relevant University policies including: Undergraduate Grading, Promotion and Academic Standing, Student Code of Academic Conduct, Student Code of Non-Academic Conduct, Undergraduate Academic Consideration and Appeals, Examination Policy, Accom. of Student Relig., Abor. and Spir. Observance, Est. of Stud. Accts for Official Univ. Commun., 9. Students are required to obtain and maintain a Ryerson Matrix account for timely communications between the instructor and the students.. Any changes in the course outline, test dates, marking or evaluation will be discussed in class prior to being implemented. 11. In-class use of cellular telephones is not permitted. Please turn off your cell phone prior to class. Quiet use of laptops, text-messengers and similar non-audible devices are permitted only in the rear rows of the class. This restriction allows use of such devices by their users while limiting audible and visual distractions to other students. This policy may change without notice. 12. Labs, projects handed in past the due date and time will not be accepted for marking and will receive a mark of ZERO. In some genuine cases late submission will be allowed with a penalty of 5% per day. 13. Students found to have plagiarized any portion of their labs and final project will receive a grade of zero on the complete project. This automatically will lead to a failing grade Instructor Approved by Program Director /Chair Date Date 5