CURRICULUM VITÆ RICARDO CHAVES. December

Transcription

1 CURRICULUM VITÆ RICARDO CHAVES December PERSONAL DETAILS Full Name: Ricardo Jorge Fernandes Chaves Date of Birth: December 25 th, 1977 Nationality: Portuguese RESEARCH AND TEACHIN G INTERESTS - Teaching. - Cryptography - Reconfigurable systems - Embedded systems EDUCATION Instituto Superior Técnico, TULisbon & Delft University of Technology Ph. Doctor Student in Computer Engineering : - Secure Computing on Reconfigurable Devices Instituto Superior Técnico, TULisbon Master in Science degree in Electronics and Computer Science Engineering (with specialization in Electronics and Computer Systems) Instituto Superior Técnico, TULisbon 5 years degree in Electronics and Computer Science (with specialization in Electronics and Computer Systems) ADDITIONAL EDUCATION 2007 Course in Smart Card Security at Brightsight 2007 Course in Common Criteria at Brightsight TELEPHONE: E- MAIL: Ricardo.chaves@ inesc- id.pt 1 / 5

2 PROFESSIONAL EXPERIENCE Teaching activities at Instituto Superior Técnico, TULisbon - Assistant professor in the Architecture and Distributed Systems of the Computer Science Department (DEI), since Tutor in the Architecture and Distributed Systems of the Computer Science Department (DEI), being a member of the teaching body of the courses Operating Systems and Computer Architectures, from 2003 to Tutor of the Electronics Section of the Electrical and Computer Science Department (DEEC), being a member of the teaching body of the course Microprocessors, having supervised the laboratory classes, from 2001 to Researcher at INESC-ID - Hired researcher at INESC-ID (in SiPS group), since Systems administrator at the SiPS group, from 2001 to Research Fellow in the international research project CORTIVIS (Cortical Visual Neuroprosthesis for the Blind), from 2003 to Research fellow in the European project research SAFIRA (Supporting Affective Interactions for Real-time Applications), from 2002 to Researcher at Delft University of Technology - Research assistant in the Computer Engineering laboratory. - Tutor in the Computer Architectures Special Topics and Design Course OP courses, in Technical tutor for graduation projects in Computer Engineering, in PUBLICATIONS International Journals: [1] Ricardo Chaves, G.K. Kuzmanov, L. Sousa, S. Vassiliadis, Cost-Efficient SHA Hardware Accelerators, VLSI Systems, IEEE Transactions on, accepted to be published, [2] Ricardo Chaves, Leonel Sousa, Improving RNS multiplication with more balanced moduli sets and enhanced modular arithmetic structures,iet Computers & Digital Techniques, vol. 1, n. 5, pages , September [3] Leonel Sousa, Ricardo Chaves, Universal Architecture for Designing Efficient Modulo 2n + 1 Multipliers, Circuits and Systems I: Regular Papers, IEEE Transactions, June, [4] Ana Paiva, Moisés Piedade, R. Chaves, et al.: SenToy: an affective sympathetic interface, International Journal of Human/Computer Studies, TELEPHONE: E- MAIL: Ricardo.chaves@ inesc- id.pt 2 / 5

3 International Conferences: [1] Samuel Freitas Antão, Ricardo Chaves, Leonel Sousa, FPGA Elliptic Curve Cryptographic Processor over GF(2^m), In International Conference on Field- Programmable Technology (ICFPT 08), IEEE, December, [2] Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, On-The-Fly Attestation of Reconfigurable Hardware, In International Conference on Field Programmable Logic and Applications (FPL 08), IEEE, May [3] Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, On-the-fly Attestation of Reconfigurable Hardware, International Conference on Field-Programmable Logic and Applications September (FPL 08), [4] Miquel Pericàs, Ricardo Chaves, Georgi N. Gaydadjiev, Stamatis Vassiliadis, and Mateo Valero, Vectorized AES Core for High-throughput Secure Environments, International Meeting High Performance Computing for Computational Science (VECPAR'08), June [5] Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis, Merged Computation for Whirlpool Hashing, In Design, Automation and Test in Europe (DATE 08), March, [6] Ricardo Chaves, Blagomir Donchev, G.K. Kuzmanov, L. Sousa, S. Vassiliadis, BRAM-LUT tradeoff on a Polymorphic DES Design, High Performance Embedded Architectures & Compilers, January, [7] R. Chaves, G.K. Kuzmanov, L. Sousa, S. Vassiliadis, Improving SHA-2 Hardware implementations, Workshop on Cryptographic Hardware and Embedded Systems (CHES), October, [8] R. Chaves, G.K. Kuzmanov, L. Sousa, S. Vassiliadis, Rescheduling for Optimized SHA-1 Calculation, Embedded Computer Systems: Architectures, MOdeling, and Simulation (SAMOS VI), July, [9] R. Chaves, G.K. Kuzmanov, S. Vassiliadis, L. Sousa, Reconfigurable Memory Based AES Co-Processor, Proceedings of the 13th Reconfigurable Architectures Workshop (RAW), April, [10] R. Chaves, L. Sousa, Faster Modulo 2 n +1 Multipliers without Booth Recoding, XX Conference on Design of Circuits and Integrated Systems (DCIS), November, [11] R. Chaves, L. Sousa, { 2 n +1; 2 n+k ; 2 n -1}: A New RNS Moduli Set Extension, Euromicro Symposium on Digital Systems Design (DSD), September, [12] Paiva A., Prada R., Chaves R., Vala M., Bullock A., Andersson G., Höök K. Towards Tangibility in Gameplay: Building a Tangible Affective Interface for a Computer Game, International Conference on Multimodal Interfaces (ICMI), November, [13] Paiva A., Prada R., Chaves R., Vala M., Bullock A., Andersson G., Höök K., Demo: playing FantasyA with sentoy, International Conference on Multimodal Interfaces (ICMI), November, [14] R. Chaves, L. Sousa, RDSP: A RISC DSP based on Residue Number System, Symposium on Digital System Design (DSD), September, [15] Ana Paiva, Adrian Bullock, Ricardo Chaves, et al., SenToy: a Tangible Interface to Control the Emotions of a Synthetic Character, Autonomous Agents and Multiagent Systems (AAMAS), July, TELEPHONE: E- MAIL: Ricardo.chaves@ inesc- id.pt 3 / 5

4 [16] K. Höök, A. Paiva, R. Chaves, et. al., FantasyA and SenToy, Computer-Human Interaction (CHI), April, Theses: Ricardo Chaves, Secure Computing on Reconfigurable Devices, PhD s Thesis, Delft University of Tecnology\ Instituto Superior Técnico, Universidade Técnica de Lisboa, ISBN: v, December, Ricardo Chaves, RDSP: A Digital Signal Processor with suport for Residue arithmetic, Master s Thesis, Instituto Superior Técnico, Universidade Técnica de Lisboa, October, Ricardo Chaves, Processament o de Sinal e Criptografia baseados em Sistemas de Numeração por Resíduos, final graduation report, Instituto Superior Técnico, Universidade Técnica de Lisboa, Septemb er, Local Conferences: [1] K. van der Bok, R. Chaves, G.K. Kuzmanov, L. A. Sousa, A.J. van Genderen, Dynamic FPGA Reconfigurations with Run-Time Region Delimitation, proceeding of Program for Research on Integrated Systems and Circuits (ProRisc), November, [2] R. Chaves, G.K. Kuzmanov, L. Sousa, S. Vassiliadis, Reconfigurable Cryptographic Processor, proceeding of Program for Research on Integrated Systems and Circuits (ProRisc), November, [3] Y. D. Yankova, K.L.M. Bertels, S. Vassiliadis, G.K. Kuzmanov, R. Chaves, HLLto-HDL Generation: Results and Challenges, proceeding of Program for Research on Integrated Systems and Circuits (ProRisc), November, [4] R. Chaves, G.K. Kuzmanov, L. Sousa, S. Vassiliadis, Polymorphic AES Encryption Implementation, proceeding of Program for Research on Integrated Systems and Circuits (ProRisc), November, REVIEWING ACTIVITY Journals: IEEE Transactions on Circuits and Systems I IEEE Transactions on Circuits and Systems II IEEE Transactions on Computers Journal of VLSI Signal Processing Systems The VLSI Journal Integration IEE Proceedings Computers & Digital Techniques Journal of Systems and Software Journal of Systems Architecture TELEPHONE: E- MAIL: Ricardo.chaves@ inesc- id.pt 4 / 5

5 Conferences: 20th Symposium on Integrated Circuits and Systems Design, SBCCI, th Euromicro Conference On Digital System Design, DSD, 2008 International Symposium on Systems, Architectures, MOdeling and Simulation, SAMOS VIII, 2008 The 2008 High Performance Computing & Simulation Conference, HPCS, 2008 IEEE International Symposium on Circuits and Systems, ISCAS, 2008 Design, Automation and Test in Europe, DATE, 2008 International Conference on Field Programmable Logic and Applications, FPL, 2007 The 25th International Conference on Computer Design, ICCD, 2007 IEEE 17th International Conference on Application-specific Systems, Architectures and Processors, ASAP, 2007 International Conference on Supercomputing, ICS, 2007 IEEE Computer Society Annual Symposium on VLSI, ISVLSI, 2007 Embedded Computer Systems: Architectures, MOdeling, and Simula tion, SAMOS VII, 2007 Architecture of Computing Systems, ARCS'07, th European conference on Wireless Sensor Networks, EWSN, 2007 IFIP International Conference on Network and Parallel Computing, NPC, 2006 Design, Automation and Test in Europe, DATE, 2007 European conference on Wireless Sensor Networks, EWSN, 2007 IEEE 17th International Conference on Application-specific Systems, Architectures and Processors, ASAP, th International Conference on Field Programmable Logic and Applications, FPL, 2006 Embedded Computer Systems: Architectures, MOdeling, and Simulation, SAMOS VI, 2006 Conference on Languages, Compilers, and Tools for Embedded Systems, LCTES, 2006 The 33rd Annual International Symposium on Computer Architecture, ISCA, 2006 Internationa l Conference on Computing Frontiers, CF, 2006 International Workshop On Applied Reconfigurable Computing, ARC, th Reconfigurable Architectures Workshop, RAW, 2006 IEEE Computer Society Annual Symposium on VLSI, ISVLSI, 2006 Design, Automation and Test in Europe, DATE, 2006 International Symposium on Microarchitecture, MICRO-38, 2005 International Symposium on System-on-Chip, SoC, 2005 International Conference for Compilers, Architecture and Synthesis of Embedded Systems, CASES, 2005 XX Conference on Design of Circuits and Integrated Systems, DCIS, 2005 International Conference on Parallel Processing, EUROPAR, 2005 LANGUAGE KNOWLEDGE - Portuguese - English - Spanish (conversational) - French (basic) - Dutch (basic) - Japanese (rudimentary) TELEPHONE: E- MAIL: Ricardo.chaves@ inesc- id.pt 5 / 5