AU9254 R2 USB Hub Controller Technical Reference Manual

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1 AU9254 R2 USB Hub Controller Technical Reference Manual Revision Alcor Micro Corp. All Rights Reserved

2 Copyright Notice Copyright Alcor Micro Corp. All Rights Reserved. Trademark Acknowledgements The company and product names mentioned in this document may be the trademarks or registered trademarks of their manufacturers. Disclaimer Alcor Micro Corp. reserves the right to change this product without notice. Alcor Micro Corp. makes no warranty for the use of its products and bears no responsibility for any errors that appear in this document. Specifications are subject to change without notice. Contact Information: Web site: Taiwan Alcor Micro Corp. 4F-, No 200, Kang Chien Rd., Nei Hu, Taipei, Taiwan, R.O.C. Phone: Fax: San Clara Office Los Angeles Office 290 Tasman Drive, Suite Seventh St., Bldg. A2 Santa Clara, CA Rancho Cucamonga, CA 9730 Phone: (408) Phone: (909) Fax: (408) Fax: (909)

3 Table of Contents.0 Introduction..... Description Features Application Block Diagram Pin Assignment System Architecture and Reference Design AU9254 Block Diagram Sample Schematics Electrical Characteristics Absolute Maximum Ratings Recommended Operating Conditions General DC Characteristics DC Electrical Characteristics for 5 volts operation DC Electrical Characteristics for 3.3 volts operation Crystal Oscillator Circuit Setup for Characterization USB Transceiver Characteristics ESD Test Results Latch-Up Test Results Mechanical Information TABLE OF CONTENTS i

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5 .0 Introduction.. Description The AU9254 is an integrated single chip USB hub controller designed for the emerging industry-standard Universal Serial Bus (USB). The AU9254 supports four USB downstream ports. Each downstream port has power switch control, and over-current sensing. Single chip integration makes the AU9254 the most cost effective stand-alone USB hub solution available in the market. Downstream ports can be used to connect various USB peripheral devices, such as USB printers, modems, scanners, cameras, mice, or joysticks to the system without adding external glue logic..2. Features Fully compliant with the Universal Serial Bus Specification, version.. USB hub design is compliant with Universal Serial Bus Hub Specification, revision.. Single chip integrated USB hub controller with embedded proprietary processor. Supports four bus-powered/self-powered downstream ports. Built-in 3.3v voltage regulator allows single +5V operating voltage, resulting in reduced overall system cost. Runs at 2Mhz frequency. Available in 28-pin SSOP. INTRODUCTION

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7 2.0 Application Block Diagram The AU9254 is a single chip 4-port USB hub controller. The upstream port is connected to the USB system. The downstream ports can be used for a mouse, joystick, scanner, printer or other device. USB HOST SYSTEM SCANNER PRINTER ALCOR MICRO AU9254 USB DOWNSTREAM PORTS USB DOWNSTREAM PORTS MOUSE Keyboard APPLICATION BLOCK DIAGRAM 3

8 This Page Intentionally Left Blank APPLICATION BLOCK DIAGRAM 4

9 3.0 Pin Assignment The AU9254 is packaged as a 28-pin shrink small outline plastic package (SSOP). The figure on the following page shows the signal names for each of the pins on the chip. Accompanying the figure is the table that describes each of the pin signals. USB2_DM 28 USB_DP USB2_DP 2 27 USB_DM USB3_DM 3 26 USB_DP USB3_DP 4 25 USB_DM USB4_DM 5 24 DP3_OVRCUR USB4_DP DP4_PWRUP DP2_PWRUP BUS_PWRED ALCOR MICRO AU9254 USB HUB CONTROLLER 28 - PIN SSOP DP4_OVRCUR DP3_PWRUP XTAL2 XTAL VCC5O/VCC5IK 0 9 AGND/GNDO GND5O/GND5IK 8 NC VCC3V 2 7 DP2_OVRCUR DP_PWRUP 3 6 SUSPEND GANGPOWER 4 5 DP_OVRCUR PIN ASSIGNMENT 5

10 Table 3-. Pin Descriptions for the 28-pin SSOP Pin # Pin Name I/O Description USB_DM I/O USB D- for downstream port 2; add 5KΩ pull-down to ground. 2 USB2_DP I/O USB D+ for downstream port 2; add 5KΩ pull-down to ground. 3 USB3_DM I/O USB D- for downstream port 3; add 5KΩ pull-down to ground. 4 USB3_DP I/O USB D+ for downstream port 3; add 5KΩ pull-down to ground. 5 USB4_DM I/O USB D- for downstream port 4; add 5KΩ pull-down to ground. 6 USB4_DP I/O USB D+ for downstream port 4; add 5KΩ pull-down to ground. 7 DP4_PWRUP O Downstream port 4 power switch control. Active low. 8 DP2_PWRUP O Downstream port 2 power switch control. Active low. 9 BUS_PWRED I Bus power. Low indicates bus-powered. 0 VCC5O/VCC5I K GND5O/GND5I K PWR PWR +5 V power supply. Ground. 2 VCC3V PWR 3.3V output for upstream D+ pull-up. 3 DP_PWRUP O Downstream port power switch control. Active low. 4 GANGPOWER I Ganged or individual port power selection. Add a 0k pull down for ganged power. a 0k pull up for individual power. PIN ASSIGNMENT 6

11 Table 3- (continued). Pin Description for the 28-pin SSOP Pin # Pin Name I/O Description 5 DP_OVRCUR I Downstream port over-current indicator. Active low. 6 SUSPEND O Device is in suspended state: Active high. 7 DP2_OVRCUR I Downstream port 2 over-current indicator. Active low. 8 NC 9 AGND/GNDO PWR +5 V power supply. 20 XTAL_ I Crystal in. 2 XTAL_2 O Crystal out. 22 DP3_PWRUP O Downstream port 3 power switch control. Active low. 23 DP4_OVRCUR I Downstream port 4 over-current indicator. Active low. 24 DP3_OVRCUR I Downstream port 3 over-current indicator. Active low. 25 USB_DM I/O USB D- for upstream. 26 USB_DP I/O USB D+ for upstream port. Need external.5kω pullup to 3.3V. 27 USB_DM I/O USB D- for downstream port ; add 5KΩ pull-down to ground. 28 USB_DP I/O USB D+ for downstream port ; add 5KΩ pull-down to ground. PIN ASSIGNMENT 7

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13 4.0 System Architecture and Reference Design 4.. AU9254 Block Diagram ROOT PORT XCVR USB SIE COMMAND PROCESSOR SUSPEND, RESUME AND FRAME TIMER DESC. ROM HUB REPEATER 3.3V 3.3V VOLTAGE REGULATOR 4X PLL PORT CONTROL XCVR... PORT CONTROL XCVR 2 MHz PORT... PORT 4 SYSTEM ARCHITECTURE AND REFERENCE DESIGN 9

14 4.2 Sample Schematics VCC C3 0UF DM2 DP2 DM3 DP3 DM4 DP4 C4 0.UF R2 39 R4 39 R6 39 R8 39 R0 39 R 39 VCC3 R2 K U 2 USB2_DM 3 USB2_DP 4 USB3_DM 5 USB3_DP 6 USB4_DM 7 USB4_DP 8 DP4_PWRUP 9 DP2_PWRUP 0 BUS_PWRED VCC50/VCC5IK 2 GND5O/GND5I 3 VCC3V 4 DP_PWRUP GANGPOWER R3 0k AU9254A2 USB_DP 28 USB_DM 27 USB_DP 26 USB_DM 25 DP3_OVRCUR 24 DP4_OVRCUR 23 DP3_PWRUP 22 2 XTAL2 20 XTAL 9 AGND/GND0 8 Empty Pin DP2_OVRCUR 7 SUSPEND 6 DP_OVRCUR 5 R3 39 R5 39 XTAL2 XTAL R.5K DP R7 39 DM R9 39 SUSPEND VCC3 C C2 0.UF UF VCC CON 2 PW 3 DATA- 4 DATA+ 5 GND 6 FGND FGND2 USB-B VCC VCC VCC VCC VCC F MINSMDC0 F2 MINSMDC0 F3 MINSMDC0 F4 MINSMDC0 USB_VCC USB_VCC2 USB_VCC3 USB_VCC4 C6 C7 C8 C9 50UF 50UF 50UF 50UF C0 R4 39 XTAL 39PF C 39PF R5 M Y 2MHZ R6 39 XTAL2 Disclaimer: This schematic is for reference only. Alcor Micro Corp. bears no responsibility for any error that appear in this document. Specifications are subject to change without notice. Title ALCOR MICRO AU9254A2 USB 4 PORT HUB Reference Design Size Document Number Rev A ALCOR MICRO AU9254 DEMO BOARD A Date: Wednesday, December 20, 2000 Sheet of 2 SYSTEM ARCHITECTURE AND REFERENCE DESIGN 0

15 CON2 USB_VCC D2 LED USB_VCC2 D LED DM DP DM2 DP2 DM DP DM2 DP2 USB_GND2 USB_GND DP2 DP DM2 DM USB_VCC2 USB_VCC SUSPEND R20 Q2 0K N902 R USB_VCC3 D3 LED SUSPEND R9 Q 0K N902 R USB_VCC4 D4 LED DM3 DP3 DM4 DP4 R25 R26 R27 R28 5K 5K 5K 5K DM3 DP3 DM4 DP4 USB_GND4 USB_GND3 DP4 DP3 DM4 DM3 USB_VCC4 USB_VCC3 Up Up CON3 Down PWR-2USB Down SUSPEND R23 0K N902 R2 680 R Q3 3 2 SUSPEND R24 Q4 0K N R29 R30 R3 R32 5K 5K 5K 5K PWR-2USB Disclaimer: This schematic is for reference only. Alcor Micro Corp. bears no responsibility for any error that appear in this document. Specifications are subject to change without notice. Title ALCOR MICRO AU9254A2 USB 4 PORT HUB Reference Design Size Document Number Rev A ALCOR MICRO AU9254 DEMO BOARD A Date: Wednesday, December 20, 2000 Sheet 2 of 2 SYSTEM ARCHITECTURE AND REFERENCE DESIGN

16 3 C7 0UF C8 0.UF VCC C4 0.UF VCC_UP D N400 K D2 RELAY SPDT R 39 DM2 R3 39 DP2 R5 39 DM3 R8 39 DP3 R0 39 DM4 R 39 DP4 DP4_PWR DP2_PWR R2 C5 0.UF D P_PW R K VCC U 28 2 USB2_DM USB_DP 27 3 USB2_DP USB_DM 26 4 USB3_DM USB_DP 25 5 USB3_DP USB_DM 24 6 USB4_DM DP3_OVRCUR 23 7 USB4_DP DP4_OVRCUR 22 8 DP4_PWRUP DP3_PWRUP 2 9 DP2_PWRUP XTAL BUS_PWRED XTAL 9 VCC50/VCC5IK AGND/GND0 8 2 GND5O/GND5I EMPTY PIN 7 3 VCC3V DP2_OVRCUR 6 4 DP_PWRUP SUSPEND 5 GANGPOWER DP_OVRCUR R3 0k AU9254A2 R2 39 DP R4 39 R6 39 DM R9 39 DP3_OVRCUR DP4_OVRCUR DP3_PWR XTAL2 XTAL DP2_OVRCUR SUSPEND DP_OVRCUR R7 VCC3.5K C3 UF VCC_UP F FB C C2 47P 47P CON 2 PW 3 DATA- 4 DATA+ 5 GND 6 FGND FGND2 USB-B J Power Jack 3 2 N448 U2 4 EN OUT 2 IN C3 0UF 5 ADJ G VCC3 R8 56K R2 8K C R7 K C2 00UF 0.UF VCC_UP D5 LED C9 39PF R5 C0 M 39PF USB_VCC3 R4 33 XTAL2 Y 2MHZ R6 33 XTAL USB_VCC4 SUSPEND R23 0K N902 USB_VCC R Q2 3 2 D4 LED SUSPEND R22 Q 0K N902 USB_VCC2 R D3 LED D6 LED D7 LED D8 LED R R R SUSPEND R27 Q3 0K N SUSPEND R28 Q4 0K N SUSPEND R29 Q5 0K N Disclaimer: This schematic is for reference only. Alcor Micro Corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document. Specifications are subject to change without notice. Title Alcor Micro Au9254A2 USB 4 Port Hub Ref erence Design Size Document Number Rev A4 Au9254A2 USB Hub Buspower and Self power Changed A Date: Thursday, September 3, 200 Sheet of 2 SYSTEM ARCHITECTURE AND REFERENCE DESIGN 2

17 VCC C6 0.UF R30 K R3 K U3 6 DP_PWR 2 FLGA# FLGB# 5 USB_VCC 3 ENA# ENB# 4 4 OUTA OUTB 3 5 GND IN_AB 2 USB_VCC3 6 IN_CD GND DP3_PWR 7 OUTC OUTD 0 8 ENC# END# 9 FLGC# FLGD# C8 0.UF C2 0.UF 2527 or compatible DP2_PWR USB_VCC2 USB_VCC4 DP4_PWR R32 K 0.UF C9 C20 0.UF R33 K VCC C7 0.UF DM DP DM2 DP2 DM DP DM2 DP2 R34 R35 R36 R37 5K 5K 5K 5K DM DP C4 47P DM2 DP2 C22 47P USB_VCC C5 47P USB_VCC2 C23 47P CON2 2 VCC 3 DATA- 4 DATA+ 5 GND 6 FGND FGND2 USB-A CON3 2 VCC 3 DATA- 4 DATA+ 5 GND 6 FGND FGND2 USB-A D P _ O V R C U R D P 3 _ O V R C U R D P 4 _ O V R C U R 2 DM3 DP3 DM4 DP4 DM3 DP3 DM4 DP4 DM3 DP3 C24 47P C25 47P USB_VCC3 CON4 2 VCC 3 DATA- 4 DATA+ 5 GND 6 FGND FGND2 USB-A Disclaimer: This schematic is for reference only. Alcor Micro Corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document. Specifications are subject to change without notice. R38 R39 R40 R4 5K 5K 5K 5K DM4 DP4 C26 47P C27 47P USB_VCC4 CON5 2 VCC 3 DATA- 4 DATA+ 5 GND 6 FGND FGND2 USB-A USB_VCC USB_VCC2 USB_VCC3 USB_VCC4 C28 C29 C30 C3 20UF 20UF 20UF 20UF Title Alcor Micro Au9254A2 USB 4 Port Hub Ref erence Design Size Document Number Rev A4 Au9254A2 USB Hub Buspower Self power Changed A Date: Thursday, September 3, 200 Sheet 2 of 2 SYSTEM ARCHITECTURE AND REFERENCE DESIGN 3

18 This Page Intentionally Left Blank SYSTEM ARCHITECTURE AND REFERENCE DESIGN 4

19 5.0 Electrical Characteristics 5.. Absolute Maximum Ratings SYMBOL PARAMETER RATING UNITS V CC Power Supply -0.3 to 6.0 V V IN Input Voltage -0.3 to VCC+0.3 V V OUT Output Voltage -0.3 to VCC+0.3 V T STG Storage Temperature -40 to 25 C 5.2. Recommended Operating Conditions SYMBOL PARAMETER MIN TYP MAX UNITS V CC Power Supply V V IN Input Voltage 0 V CC V T OPR Operating Temperature O C 5.3. General DC Characteristics SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS I IL Input low current no pull-up or pull-down - µa I IH Input high current no pull-up or pull-down - µa I OZ Tri-state leakage current -0 0 µa C IN Input capacitance 4 ρf C OUT Output capacitance 4 ρf C BID Bi-directional buffer capacitance 4 ρf ELECTRICAL CHARACTERISTICS 5

20 5.4. DC Electrical Characteristics for 5 volts operation ( Under Recommended Operating Conditions and VCC=4.5v ~ 5.5v, Tj= -40 O C to + 85 O C ) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V IL Input Low Voltage TTL 0.8 V V IL Input Low Voltage CMOS 0.3*V CC V V IL Schmitt input Low Voltage TTL.0 V V IL Schmitt input Low V oltage CMOS.84 V V IH Input High Voltage TTL 2.2 V V IH Input Hight Voltage CMOS 0.7*V CC V V IH Schmitt input High Voltage TTL.87 V V IH Schmitt input High Voltage CMOS 3.22 V V OL Output low voltage I OL =2, 4, 8, 2, 6, 24 ma 0.4 V V OH Output high voltage I OH =2, 4, 8, 2, 6, 24 ma 3.5 V R I Input Pull-up/down resistance Vil=0 V or Vih=V CC 50 KΩ 5.5. DC Electrical Characteristics for 3.3 volts operation ( Under Recommended Operating Conditions and V CC =3.0v ~ 3.6v, Tj = -40 O C to +85 O C ) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V IL Input Low Voltage CMOS 0.3*V CC V V IL Schmitt input Low Voltage CMOS.22 V V IH Input Hight Voltage CMOS 0.7*V CC V V IH Schmitt input High Voltage CMOS 2.08 V V OL Output low voltage I OL =2, 4, 8, 2, 6, 24 ma 0.4 V V OH Output high voltage I OH =2, 4, 8, 2, 6, 24 ma 2.3 V R I Input Pull-up/down resistance Vil=0 V or Vih=V CC 75 KΩ ELECTRICAL CHARACTERISTICS 6

21 5.6. Crystal Oscillator Circuit Setup for Characterization The following setup was used to measure the open loop voltage gain for crystal oscillator circuits. The feedback resistor serves to bias the circuit at its quiescent operating point and the AC coupling capacitor, Cs, is much larger than C and C USB Transceiver Characteristics RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER CONDITIONS LIMITS UNIT MIN MAX V CC DC supply voltage V V I DC input voltage range V V I/O DC input range for I/Os 0 V CC V V O DC output voltage range 0 V CC V T AMB Operating ambient temperature range in free air See DC and AC characteristics for individual device 0 70 C ELECTRICAL CHARACTERISTICS 7

22 ABSOLUTE MAXIMUM RATINGS (Notes and 2) In accordance with the Absolute Maximum Rating System, Voltages are referenced to GND (Ground=0v) SYMBOL PARAMETER CONDITIONS LIMITS UNIT MIN MAX V CC DC supply voltage V I IK DC input diode current Vi<0-50 ma V I DC input voltage Note V V I/O DC input voltage range for I/Os -0.5 Vcc V +0.5 I OK DC output diode current Vo> Vcc or Vo<0 +/-50 ma V O DC output voltage Note Vcc V +0.5 I O DC output source sink current Vo=0 to Vcc +/-5 ma for VP/VM and RCV pins I O DC output source or sink Vo= 0 to Vcc +/-50 ma current for D+/D- pins I CC, I GND DC Vcc or GND current +/-00 ma T STO Storage temperature range C P TOT Power dissipation per package mw NOTES:. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "Recommended Operating Conditions" is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. 2. The performance capability of a high performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 50 C. 3. The input and output voltage ratings may be exceeded if the input and output clamp current ratings are observed. ELECTRICAL CHARACTERISTICS 8

23 DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions. Voltages are referenced to GND (Ground=0V). LIMITS SYMBOL PARAMETER TEST CONDITIONS -40 C to +85 C UNIT MIN TYP MAX VHYS Hysteresis on inputs Vcc=3.0V to 3.6V (Note 3) V VIH HIGH level input Vcc=3.0V to 3.6V (Note 3) V VIL LOW level input Vcc=3.0V to 3.6V (Note 3) 0.8. V RoH Output impedance (HIGH Note ohm state) RoL Output impedance (LOW Note ohm VOH VOL state) HIGH level output (Note 3) LOW level output (Note 3) Vcc=3.0V Io=6mA Vcc=3.0V Io=4mA Vcc=3.0V Io=00µA Vcc=3.0V Io=6mA Vcc=3.0V Io=4mA Vcc=3.0V Io=00µA V V µa IQ Quiescent supply current Vcc=3.6V VI=Vcc or GND Io=0 Isup Supply current in suspend Vcc=3.6V VI=Vcc or GND 70 µa Io=0 IFS Active supply current (Full Vcc=3.3V 9 4 ma Speed) ILS Active supply current (Low Vcc=3.3V 2 ma Speed) ILeak Imput leakage current Vcc=3.6V VI=5.5V or +/- +/- µa GND, not for I/O Pins IOFF 3-state output OFF-state Vi=Vih or ViL; Vo=Vcc or +/-0 µa current GND NOTES:. All typical values are at Vcc=3.3V and Tamb=25 C. 2. This value includes an external resistor of 24 ohm +/-%. See "Load D+ and D-" diagram for testing details. 3. All signals except D+ and D-. SYSTEM ARCHITECTURE AND REFERENCE DESIGN 9

24 AC ELECTRICAL CHARACTERISTICS GND=0V, t R = t F =3.0 ns; C L =50 pf; RL=500 Ohms SYMBOL PARAMETER WAVEFORM LIMITS (T AMB ) 0 C to +25 C 0 C to +70 C UNIT MIN TYP MAX MIN MAX tplh VMO/VPO to D+/D ns tphl Full Speed trise Rise and Fall Times ns tfall Full Speed trfm Rise and Fall Time % Matching Full Speed tplh VMO/VPO to D+/D ns tphl Low Speed trise Rise and Fall Times ns tfall Low Speed trfm Rise and Fall Time % Matching Low Speed tplh D+/D- to RCV ns tphl tplh D+/D- to VP/VM ns tphl tphz 2 2 ns tpzh tplz tpzl OE# to D+/D- RL = 500ohm tsu Setup for SPEED 5 0 ns Vcr Crossover point V NOTES:. The crossover point is in the range of.3v to 2.5V for the low speed mode with a 50 pf capacitance. SYSTEM ARCHITECTURE AND REFERENCE DESIGN 20

25 SYSTEM ARCHITECTURE AND REFERENCE DESIGN 2

26 5.8. ESD Test Results Test Description: ESD Testing was performed on a Zapmaster system using the Human- Body-Model (HBM) and Machine-Model (MM), according to MIL-STD 883 and EIAJ IC- 2 respectively. Human-Body-Model stresses devices by sudden application of a high voltage supplied by a 00pF capacitor through.5k-ohm resistance. Machine-Model stresses devices by sudden application of a high voltage supplied by a 200pF capacitor through very low (0 ohm) resistance. Test Circuit & Condition - Zap Interval: second - Number of Zaps: 3 positive and 3 negative at room temperature - Criteria: I-V Curve Tracing ESD Data Model Mode S/S Target Results HBM Vdd, Vss, I/C V PASS MM Vdd, Vss, I/C 5 200V PASS ELECTRICAL CHARACTERISTICS 22

27 5.9. Latch-Up Test Results Test Description: Latch-Up testing was performed at room ambient using an IMCS-4600 system which applies a stepped voltage to one pin per device with all other pins open except Vdd and Vss which were biased to 5Volts and ground respectively. Testing was started at 5.0V (Positive) or 0V (Negative), and the DUT was biased for 0.5 seconds. If neither the PUT current supply nor the device current supply reached the predefined limit (DUT=00mA, Icc=00mA), then the voltage was increased by 0.Volts and the pin was tested again. This procedure was recommended by the JEDEC JC-40.2 CMOS Logic standardization committee. Notes:. DUT: The device under test. 2. PUT: The pin under test. Test Circuit: Positive Input/Output Overvoltage/Overcurrent ELECTRICAL CHARACTERISTICS 23

28 Test Circuit: Negative Input/Output Overvoltage/Overcurrent Supply Overvoltage Test Latch-Up Data Mode Voltage (V)/CUITENT(ma) S/S Results Voltage Pass Pass Current Pass Pass Vdd - Vxx Pass ELECTRICAL CHARACTERISTICS 24

29 6.0 Mechanical Information Following diagrams show the dimensions of the AU pin SSOP. Measurements are in inches. Dimensions do not include mold flash and dambar protrusion; allowable mold flash is 0.00 inch. MECHANICAL INFORMATION 25

30 REV. DESCRIPTION BY DATE ORIG.. REGENERATED FROM PO-P402 VERSION"A" JIMMY ADD GAUGE PLANE ADD CROSS SECTIONA-A" DRAWING STEVEN MODIFY TO IRIS ADD E-PIN IRIS CHANGE PIN "I" DOT DIMENSION SYMBOL COMMON DIMENSION MILLIMETERS COMMON DIMENSION INCH MIN. NOM. MAX. MIN. NOM. MAX. A A A b b c c E E e 0.65 BSC BSC L L 0.25 REF REF. R θ N ± JEDEC NO. MO-50 MO-50 MO-50 MO-50 MO-50 MO-50 AB AC AD AE AG AH MECHANICAL INFORMATION 26

31 UNLESS DECMAL ANGULAR UNIT MM SCALE : 0: X OTHERWISE ORENT SEMCONOUCTOR ELECTRONICS XX SHEET: OF SPECIFIED XXX.05 DRAWN IRIS TITLE FILE: PD-P503C A3 CHECKED SSOP 4/6/20/2/28L ( 209 MIL ) DWG. NO. : APPROVED PACKAGE OUTLINE PD-P503C MECHANICAL INFORMATION 27

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