TABLE OF CONTENTS. xiii List of Tables. xviii List of Design-for-Test Rules. xix Preface to the First Edition. xxi Preface to the Second Edition

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1 TABLE OF CONTENTS List of Figures xiii List of Tables xviii List of Design-for-Test Rules xix Preface to the First Edition xxi Preface to the Second Edition xxiii Acknowledgement xxv 1 Boundary-Scan Basics and Vocabulary Digital Test Before Boundary-Scan Edge-Connector Functional Testing In-Circuit Testing The Philosophy of Basic Architecture The TAP Controller The Instruction Register Data Registers The Boundary Register Optimizing a Boundary Register Cell Design Architecture Summary Field-Programmable IC Devices Boundary-Scan Chains Non-Invasive Operational Modes BYPASS IDCODE USERCODE SAMPLE PRELOAD Pin-Permission Operational Modes EXTEST INTEST RUNBIST HIGHZ CLAMP Exceptions Due to Clocking Extensibility Subordination of IEEE Costs and Benefits Costs Benefits Trends Other Testability Standards 46

2 2 Boundary-Scan Description Language (BSDL) The Scope of BSDL Testing Compliance Assurance Synthesis Structure of BSDL Entity Descriptions 61 Generic Parameter 62 Logical Port Description 62 Standard USE Statement 63 Use Statements 64 Component Conformance Statement Device Package Pin Mappings Grouped Port Identification TAP Port Identification Compliance Enable Description Instruction Register Description Optional Register Description Register Access Description Boundary-Scan Register Description RUNBIST Execution Description INTEST Execution Description User Extensions to BSDL Design Warnings 2.4 Some advanced BSDL Topics Merged Cells Asymmetrical Drivers BSDL Description of 74BCT8374 Packages and Package Bodies STD_1149_1_ Cell Description Constants Basic Cell Definitions BC_0 to BC_7 User-Defined Boundary Cells Definition of BSDL Extensions Writing BSDL Summary Boundary-Scan Testing Basic Boundary-Scan Testing The Scanning Sequence Basic Test Algorithm The Personal Tester Versus ATE In-Circuit Boundary-Scan IC Test IC BIST 118 viii

3 3.2 Testing with Boundary-Scan Chains Chain Integrity Interconnect Test Connection Tests Interaction Tests BIST and Custom Tests Porting Boundary-Scan Tests Summary 4 Advanced Boundary-Scan Topics DC Parametric IC Tests Sample Mode Tests Concurrent Monitoring Non-Scan IC Testing Non-Digital Device Testing Mixed Digital/Analog Testing Multi-Chip Module Testing Firmware Development Support In-System Configuration Hardware Fault Insertion Design for Boundary-Scan Test Integrated Circuit Level DFT TAP Pin Placement Power and Ground Distribution Instruction Capture Pattern Damage Resistant Drivers Output Pins Bidirectional Pins Post-Lobotomy Behavior IDCODEs User-Defined Instructions Creation and Verification of BSDL Board-Level DFT Chain Configurations TCK/TMS Distribution Mixed Logic Families Board Level Conflicts Control of Critical Nodes Power Distribution Boundary-Scan Masters Post-Lobotomy Board Behavior System-Level DFT The MultiDrop Problem Coordination with Other Standards Summary ix

4 6 Analog Measurement Basics Analog In-Circuit Testing Analog Failures Measuring an Impedance Errors and Corrections Measurement Hardware Limited Access Testing Node Voltage Analysis Testing With Node Voltages Limited Access Node Voltage Testing The Mixed-Signal Test Environment Summary IEEE Analog Boundary-Scan Vocabulary and Basics The Target Fault Spectrum Extended Interconnect Digital Pins Analog Pins General Architecture of an IC Silicon Switches The Analog Test Access Port (ATAP) The Test Bus Interface Circuit (TBIC) The Analog Boundary Module (ABM) The Digital Boundary Module (DBM) The Instruction Set The EXTEST Instruction The CLAMP Instruction The HIGHZ Instruction The PROBE Instruction The RUNBIST Instruction The INTEST Instruction Other Provisions of Differential ATAP Port Differential I/O Partitioned Internal Test Buses Specifications and Limits Design for Testability Integrated Circuit Level Board Level System Level Summary 261 Epilog: What Next for /1149.4? 262 x

5 APPENDIX A: BSDL Syntax Specifications 263 A.1 Conventions 263 A.2 A.3 A.4 A.5 Lexical elements of BSDL Notes on syntax definition BSDL Syntax User Package Syntax Bibliography Index xi