High-Frequency Analog Signal Processing IC for GSM/EGSM Digital Cellular Standard Hitachi Review Vol. 47 (1998), No. 4 135 Reductions in System Size and Cost Achieved Through Use of Offset PLL Mode in Transmitter Takefumi Endo Kiyoshi Irie Yoshimi Shimizu Abstract: Global system for mobile communications (GSM), a digital cellular system developed and constructed in Europe, has also been introduced in various other parts of the world including Asia, Oceania, and parts of America. With 50-million subscribers to date, GSM represents the world s largest digital cellular market. The quest for smaller and lighter GSM portable phones, together with longer call and standby times, means a demand for electronic components that offer higher levels of integration and lower power consumption. In response to these needs, Hitachi collaborated with TTP Communications Ltd., a British GSM system consultancy, in developing a commercial Extended GSM (EGSM) highfrequency transmission/reception block signal processing IC. The IC achieves a major reduction in noise outside the transmission band through the use of the offset phase-locked loop (PLL) mode for transmission frequency conversion. This eliminates the need for a duplexer, enabling system size and costs to be reduced. Extension of the technology to include the digital cellular system, 1,800-MHz band standard (DCS-1800), a high-frequency version of GSM, was also taken into consideration in designing this product, and a DCS-1800 IC that uses the same package and pin arrangement has been developed. In addition, a dual-band IC covering both the GSM and DCS-1800 systems is currently being developed, using the same package. Further developments based on this technology are planned for the future to support systems such as code division multiple access (CDMA), and personal digital cellular telecommunication system (PDC). INTRODUCTION PORTABLE phones have been such a hit in the market because their small, lightweight design enables them to be taken along wherever the user goes. The inconvenience of recharging also means that long call and standby times are highly valued. To provide a solution to these market needs, Hitachi engineers focused on the high-frequency signal processing block, which uses more external peripheral components than the baseband block and requires a comparatively large mounting area. With the goal of reducing the size, cost, and power consumption of this high-frequency signal processing block, Hitachi collaborated with British GSM system consultants TTP Communications Ltd. to develop a commercial GSM high-frequency analog signal processing IC, the HD155101F, that integrates the transmission and reception blocks on a single chip. This article explains the design concepts of the HD155101F, describes its configuration and features, and presents the evaluation results obtained with the chip mounted on a system evaluation board. DEVELOPMENT GOALS The high-frequency signal processing block of a portable phone uses a large number of components, and is comparatively large in size. To reduce size and cost, therefore, Hitachi focused on two areas: (1) Integration of the high-frequency block, and (2)Reducing the number and cost of external components. Hitachi chose a two-chip configuration using this IC and a PLL synthesizer. This was decided upon because there is virtually no difference in total
High-Frequency Analog Signal Processing IC for GSM/EGSM Digital Cellular Standard 136 Fig. 1 Photo of GSM/EGSM High- Frequency Analog Signal Processing IC Chip. A 0.6-µm Bi-CMOS process is used to integrate the high-frequency analog block of a portable phone on a single chip. mounting area compared with a single-chip IC incorporating a PLL synthesizer. Also, with a singlechip IC, there would be a problem with noise in the PLL synthesizer digital system leaking into the analog system, resulting in greater noise in the vicinity of the carrier. In the area of external components, we next looked at eliminating the need for a duplexer, a major item in terms of both mounting area and cost. As this required a reduction in transmission output noise, we used the offset PLL mode in the transmission system, enabling noise to be suppressed. HD155101F CONFIGURATION AND FEATURES The HD155101F is fabricated in a 0.6 µm bipolar complementary metal-oxide semiconductor (Bi- CMOS) process (Fig. 1). It incorporates most of the high-frequency analog block functions required for portable phone transmission and reception (Fig. 2). A 48-pin low-profile quad flat package (LQFP) measuring 9.0 mm 9.0 mm is used. The internal configuration comprises a reception block consisting of a low-noise amplifier (LNA) bias circuit, first mixer, second mixer, AGC amplifier, and IQ demodulator; and a transmission block consisting of an IQ modulator, offset PLL circuits, and local signal frequency dividers. A power control circuit is also included to allow independent operation of the transmission and reception blocks, and reduce power consumption. Current drain is 34 ma + 5.6 ma LNA bias current during reception, and 31 ma during transmission. As a result, all the functions of the high-frequency analog block can be implemented simply by adding a PLL synthesizer, power amplifier, and a few other components to this IC. Reception System The features of the reception system are as follows: (1) Double intermediate frequency (IF) system (2) Built-in negative-feedback bias circuit for LNA (3) Linear gain control type AGC (4) Interference-suppressing LPF built into IQ demodulator Double-IF system The reception system includes mixer circuits for frequency conversion. However, there are undesired frequency components that are reflected and superimposed on the IF signal (wanted signal) due to the
Hitachi Review Vol. 47 (1998), No. 4 137 925~960 MHz RF LPF LNA Bias circuit TCXO HD155017T RF SAW 1,150 1,185 MHz Dual synth. PLL1 225 MHz IF SAW RF VCO PLL2 540 MHz IF VCO 2 45 MHz LC HD155101F 6 AGC 45 MHz I&Q demo 90 deg shift 2 90 deg shift 2 I Q Baseband block PA module Buffer VCO 880 915 MHz Loop Phase comparator I&Q mod I Q SAW: surface acoustic wave TCXO: temperature compensated crystal oscillator Fig. 2 HD155101F Block Diagram. This chip integrates most of the portable phone high-frequency analog block. Use of the offset PLL mode in the transmission system eliminates the need for a duplexer. VCO: voltage controlled oscillator PA: power amplifier LNA: low-noise amplifier RF: radio frequency LPF: low-pass distortion characteristics of the mixer circuits. The characteristic with respect to these frequencies is called the spurious response. To reduce the spurious response, a double-if system is employed in the HD155101F, using IF of 225 MHz and 45 MHz. One example of a spurious response frequency is a Lo-IF/2 frequency component called half IF. This component is reflected in the IF signal in accordance with the following expression. 2 Lo - 2 (Lo-IF/2) This component is caused by the distortion characteristic of the first mixer. Generally speaking, it is difficult to reduce the distortion characteristic without sacrificing other characteristics of the mixer circuit. In this IC, choosing an IF of 225 MHz made it possible to eliminate the Lo-IF/2 component easily with a prior to the first mixer (Fig. 3). Also, the current consumption has been kept low by converting the first IF to 45 MHz in the second mixer, and operating the AGC amplifier and IQ demodulator at 45 MHz. As the second mixer local signal is generated and supplied from a frequency divider in the IC, the system offers the same ease of use as a single-if system from the standpoint of the user. In case of small IF In case of large IF 800 900 1,000 1,100 1,200 (MHz) Tx Tx Rx Rx Lo Lo-IF/2 Filtter characteristic in front of first mixer 225 MHz Lo-IF/2 Tx: transmitter Rx: receiver Lo: local signal Fig. 3 IF Selection Method. Selecting 225 MHz as the IF enables the Lo-IF/2 component to be easily eliminated by the in front of first mixer. LNA negative-feedback bias circuit GSM portable phones have a very stringent sensitivity specification for the reception system, and achieving a low noise level in the reception system is a major concern. System noise is determined by the first-stage insertion loss and LNA noise figure (NF), and it is important for this NF to be stable under all conditions in the system over a temperature of -20 to 80 C, and an operating voltage of 2.7 to 3.6 V. Lo
High-Frequency Analog Signal Processing IC for GSM/EGSM Digital Cellular Standard 138 RF out RF in LNA + Power supply Fig. 4 Active Bias Circuit. Control is performed by comparison with the reference voltage to provide a steady bias current, which stabilizes the NF characteristic of the LNA. This IC includes a negative feedback bias (active bias) circuit that monitors the external LNA transistor bias current, and performs control through comparison with a reference voltage to provide a steady bias current (Fig. 4). The NF characteristic is stabilized by biasing the LNA transistor in this circuit. This enables stable reception sensitivity to be obtained. Linear gain control type AGC This IC incorporates a linear-control AGC circuit in which gain can be varied in a linear manner with respect to the control voltage operating at 45 MHz. Other manufacturers GSM ICs use a digital data control programmable gain amplifier that controls gain in a discrete number of decibel steps* 1). With digital data control, the relationship between the control voltage and gain is normally stored in baseband block memory, and obtaining the desired gain involves referencing the stored data and outputting the control data. With linear control, on the other hand, it is possible to obtain the control voltage for any gain by computation, using data on the slope with respect to the initial value, as long as it is linear, to output the gain setting data (voltage), greatly reducing the memory load. Interference-suppressing LPF in IQ demodulator A built-in LPF is provided to suppress interference to the maximum permissible level for the baseband block, a function generally handled externally. This means that the IQ demodulator output can be connected directly to the baseband IC, enabling the component mounting area to be reduced. Transmission System The features of the transmission system are as follows: (1)The offset PLL mode is used for frequency conversion, greatly reducing noise outside the transmission band. (2) Board size and cost reductions have been achieved by eliminating the need for a duplexer. (3) Power consumption has been cut by eliminating the transmission power loss due to a duplexer. Local signal Duplexer Receiver SAW PA Transmission band Local signal IQ modulator Mixer Reception band Receiver PA VCO Transmission band Loop Phase comparator Reception band Offset mixer IQ modulator 880 915 925 960 (MHz) (a) Upconversion mixer component intermodulated and reflected by PA 880 915 925 960 (MHz) (b) Offset PLL mode Fig. 5 Out-of-Band Noise Comparison. In upconversion using a mixer, noise within the transmission band that cannot be eliminated by the SAW is intermodulated due to the PA distortion characteristic and is reflected in the reception band. Therefore, a steep (i.e. a duplexer) is needed between the PA and antenna in order to remove this noise [see (a)]. With the offset PLL mode, though, the VCO output is band-limited to twice the loop bandwidth of approximately 1 MHz, and therefore noise does not leak into the reception band. Consequently, a duplexer is not needed, and an antenna switch alone is sufficient [see (b)].
Hitachi Review Vol. 47 (1998), No. 4 139 Problems with frequency conversion by a mixer Indirect modulation using a mixer is normally used for transmission system frequency conversion, but in this case out-of-band noise is a major concern. Even if noise is eliminated with a SAW, noise components distributed within the transmission band undergo intermodulation due to the distortion characteristic of the power amplifier, and are returned in an adjacent frequency band outside the transmission band (Fig. 5). As this band overlaps the reception band, a with a steep gradient is required to allow passage of the transmission band only between the power amplifier and the antenna. Therefore, ing is normally performed using a duplexer. The duplexer includes steep transmission and reception s and in some cases an antenna switch. As the duplexer is usually expensive and requires a large mounting area, it has been a major obstacle to achieving size and cost reductions in the high-frequency analog block of portable phones. One aim in developing the HD155101F was thus to provide a solution that would eliminate the duplexer. Offset PLL mode The offset PLL mode is used for transmission frequency conversion to eliminate the need for a duplexer. With this mode, frequency conversion is implemented by placing a mixer (offset mixer) in the feedback path from the VCO output to the phase comparator. The difference from a frequency synthesizer PLL is that the offset PLL reference signal frequency modulation is regenerated in the output without scaling. The transmission signal output directly from the VCO is band-limited to twice the loop bandwidth, approximately 1 MHz, so that not only transmission of out-of-band noise but also the in-band noise component is suppressed. As a result, there is no noise leakage into the reception band due to intermodulation distortion in the power amplifier, as described in the previous section. The need for a is eliminated by the steep characteristic between the power amplifier and the antenna, thus making a duplexer unnecessary. The result is a reduction in both system size and cost. Moreover, an extended GSM (EGSM) system with only 10 MHz between the transmission band and reception band can easily be supported simply by extending the frequency band. An added advantage of eliminating the need for a duplexer is lower power consumption during transmission. Eliminating the duplexer makes it possible to avoid a power loss of approximately 1 db. In other Fig. 6 System Evaluation Board. GSM terminal functions are implemented by using this evaluation board in combination with a baseband platform. words, transmission power consumption is reduced by an amount equivalent to 1 db, enabling call and standby times to be increased. SYSTEM EVALUATION In evaluation of the HD155101F, it was necessary to check that not only the individual block specifications, but also the GSM system specifications, GSM 11.11, were met. For this purpose, we developed a system evaluation board in collaboration with TTP Communications Ltd. (Fig. 6). A 6-layer printed circuit board is used for the evaluation board, and the configuration allows evaluation of not only the overall system but also the individual blocks. This board is equipped with all the functions required by the GSM high frequency block, including the HD155101F, a high-efficiency transmission amplifier (PF0145), dual PLL IC (HD155017T), VCO variable-capacitance diode (HVU355), as well as a TCXO, VCO, and SAW. GSM terminal functions can be implemented simply by connecting a baseband block to this evaluation board. Using a combination of the evaluation board and a baseband platform that had been tried and tested by TTP Communications Ltd., we conducted overall system evaluation of the sensitivity specification for the reception system, the modulation spectrum and other characteristics in line with the GSM specifications, and confirmed that the specifications were met (Figs. 7 and 8).
High-Frequency Analog Signal Processing IC for GSM/EGSM Digital Cellular Standard 140 6 5 4 Reference 31.5 dbm Log 10 db/ Attenuation 30 db GSM specification RBER (%) 3 2 1 GSM specification Average 20 0 110 108 106 104 102 100 98 30 25 20 15 10 Reception signal level at tip of antenna RBER: residual bit error rate Fig. 7 Reception Signal Level vs. RBER Characteristic. The sensitivity specification for the reception system of 102 dbm was exceeded, and RBER did not degrade even at high input levels. Center 902.400 MHz #RES BW 30 khz VBW 30 khz Span 1.000 MHz #SWP 2.00 s Fig. 8 Spectrum Due to Modulation Characteristic. Shows the spectrum due to modulation for 2 9-1 bits pseudo random sequence (PN 9) input in the IQ signal. The GSM specification is met. CONCLUSIONS This article describes the functions and features of the HD155101F GSM high-frequency signal processing IC, and presents the relevant system evaluation results. The high-frequency block of a GSM portable phone is implemented by means of a twochip configuration comprising the HD155101F and a dual PLL synthesizer chip. Offset PLL technology is used to suppress unwanted noise and eliminate the need for a duplexer, at the same time preventing power loss and achieving a reduction in power consumption. The HD155101F thus offers a solution that cuts system size, cost, and power consumption. Extension of the technology to include the digital cellular system, 1,800-MHz band (DCS-1800) standard, a high-frequency version of GSM, was also taken into consideration in designing this product, and a DCS-1800 IC that uses the same package and pin arrangement has been developed. In addition, a dualband IC covering both the GSM and DCS-1800 systems is currently being developed, using the same package. Further developments based on this technology are planned for the future to support systems such as code division multiple access (CDMA), and personal digital cellular telecommunication system (PDC). REFERENCE (1) T. D. Stetzler, et al. : A 2.7V to 4.5V Single-Chip GSM Transceiver RF Integrated Circuits, IEEE Journal of Solid- State Circuits 30, No. 12 (1995-12), pp. 1421-1429. ABOUT THE AUTHORS Takefumi Endo Joined Hitachi, Ltd. in 1986. Belongs to the 2nd System LSI Development & Business Center, System LSI Business Operation, Semiconductor & Integrated Circuits Div. Currently engaged in the development of GSM/DCS-1800 portable phone high-frequency ICs. E-mail: endouta@cm.musashi.hitachi.co.jp Kiyoshi Irie Joined Hitachi, Ltd. in 1991. Belongs to the Multimedia LSI Development Center, System LSI Business Operation, Semiconductor & Integrated Circuits Div. Currently engaged in the development of GSM/DCS-1800 portable phone high-frequency ICs. E-mail: iriek@msrd.hitachi.co.jp Yoshimi Shimizu Joined Hitachi USLI Systems Co., Ltd. in 1991. Belongs to the Application System Development Dept. Currently engaged in the development of application systems in the mobile communications field. E-mail: shimiys@hitachi-mc.co.jp