Title (en) Image sensor using CMOS technology with high video rate Title (de) Bilderfassungsgerät mit CMOS-Technologie mit einer starken Videofrequenz Title (fr) Capteur d'image en technologie CMOS à forte cadence vidéo Publication EP 2408194 A2 20120118 (FR) Application EP 11354022 A 20110512 Priority FR 1002066 A 20100517 FR 1002360 A 20100603 FR 1002909 A 20100709 Abstract (en) The image sensor has matrix of photosensitive pixels (10) which are organized in rows and columns. The analog-to-digital converters are provided for each column and receiving outputs of pixels of column through column bus. A control circuit is configured to organize read of pixels on column busses and write of outputs of converters respectively in memory cell matrices so as to store accumulated brightness levels of rows of pixel matrix portions in row of memory cell matrixes. An adder is connected to sum levels accumulated in row of memory cell matrixes. An independent claim is included for method for managing time-delay-integration image sensor. Abstract (fr) Un capteur d'image à retard temporel et intégration comprend une matrice de pixels photosensibles (Px) organisés en rangées et colonnes ; et une première matrice (16a) de cellules mémoire associée à des moyens de commande et d'addition (18) pour stocker dans une rangée de cellules mémoire des niveaux de luminosité accumulés de plusieurs rangées de pixels. La première matrice (16a) de cellules mémoire est prévue, avec les moyens de commande et d'addition, pour stocker dans ses rangées des niveaux de luminosité accumulés des rangées d'une première moitié de la matrice de pixels. Le capteur comprend une deuxième matrice (16b) de cellules mémoire associée aux moyens de commande et d'addition pour stocker dans une rangée de la deuxième matrice de cellules mémoire des niveaux de luminosité accumulés des rangées de la deuxième moitié de la matrice de pixels. On prévoit des moyens (20) pour additionner les niveaux accumulés dans une rangée de la première matrice de cellules mémoire aux niveaux accumulés dans une rangée correspondante de la deuxième matrice de cellules mémoire. Inventor CAZAUX YVON (FR) GIFFARD BENOIT (FR) Applicant COMMISSARIAT ENERGIE ATOMIQUE (FR) IPC 8 full level (invention and additional information) H04N 5/374 (2011.01) CPC (invention and additional information) H04N 5/3743 (2013.01) Citation (applicant) MICHAEL G. FARRIER ET AL.: 'A Large Area TDI Image Sensor for Low Light Level Imaging' IEEE JOURNAL OF SOLID-STATE CIRCUITS vol. SC-15, no. 4, Août 1980, GÉRALD LEPAGE, JAN BOGAERTS, GUY MEYNANTS: 'Time-Delay-Integration Architectures in CMOS Image Sensors' IEEE TRANSACTIONS ON ELECTRON DEVICES vol. 56, no. 11, Novembre 2009, Citation (search report) [I] US 2010046853 A1 [A] US 2009295971 A1 [A] FR 2906080 A1 [A] US 2007012865 A1 Designated contracting state (EPC) AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL Designated extension state (EPC) BA ME EPO simple patent family EP 2408194 A2 20120118; EP 2408194 A3 20120125; EP 2408194 B1 20141224; JP 2011244452 A 20111201 INPADOC legal status 2016-08-31 [PGFP FR] POSTGRANT: ANNUAL FEES PAID TO NATIONAL OFFICE - Payment date : 20160527 2016-07-29 [PGFP DE] POSTGRANT: ANNUAL FEES PAID TO NATIONAL OFFICE - Payment date : 20160516
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