Rev. 5 21 April 2016 Product data sheet 1. General description The is an 8-bit synchronous down counter. It has control inputs for enabling or disabling the clock (CP), for clearing the counter to its maximum count and for presetting the counter either synchronously or asynchronously. In normal operation, the counter is decremented by one count on each positive-going transition of the clock (CP). Counting is inhibited when the terminal enable input (TE) is HIGH. The terminal count output (TC) goes LOW when the count reaches zero if TE is LOW, and remains LOW for one full clock period. When the synchronous preset enable input (PE) is LOW, data at the jam input (P0 to P7) is clocked into the counter on the next positive-going clock transition regardless of the state of TE. When the asynchronous preset enable input (PL) is LOW, data at the jam input (P0 to P7) is asynchronously forced into the counter regardless of the state of PE, TE, or CP. The jam inputs (P0 to P7) represent a single 8-bit binary word. When the master reset input (MR) is LOW, the counter is asynchronously cleared to its maximum count (decimal 255) regardless of the state of any other input. If all control inputs except TE are HIGH at the time of zero count, the counters will jump to the maximum count, giving a counting sequence of 256 clock pulses long. Device may be cascaded using the TE input and the TC output, in either a synchronous or ripple mode. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V CC. 2. Features and benefits 3. Applications Cascadable Synchronous or asynchronous preset Low-power dissipation Complies with JEDEC standard no. 7A CMOS input levels ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to+80c and from 40 C to+125c Divide-by-n counters Programmable timers Interrupt timers Cycle/program counters.
4. Ordering information Table 1. Type number Ordering information Package 5. Functional diagram Temperature range Name Description Version D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT109-1 SOT403-1 Fig 1. Functional diagram Fig 2. Logic symbol All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 2 of 23
Fig 3. IEC logic symbol Fig 4. Timing diagram All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 3 of 23
Product data sheet Rev. 5 21 April 2016 4 of 23 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Fig 5. xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx Logic diagram NXP Semiconductors
6. Pinning information 6.1 Pinning Fig 6. Pin configuration 6.2 Pin description Table 2. Pin description Symbol Pin Description CP 1 clock input (LOW-to-HIGH, edge-triggered) MR 2 asynchronous master reset input (active LOW) TE 3 terminal enable input (active LOW) P0 4 jam input 0 P1 5 jam input 1 P2 6 jam input 2 P3 7 jam input 3 GND 8 ground (0 V) PL 9 asynchronous preset enable input (active LOW) P4 10 jam input 4 P5 11 jam input 5 P5 12 jam input 6 P7 13 jam input 7 TC 14 terminal count output (active LOW) PE 15 synchronous preset enable input (active LOW) V CC 16 positive supply voltage All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 5 of 23
7. Functional description 7.1 Function table Table 3. Function table [1] Control inputs Preset mode Action [2] MR PL PE TE L X X X asynchronous clear to maximum count H L X X asynchronous preset asynchronously H L X synchronous preset on next LOW-to HIGH clock transition H L synchronous count down H synchronous inhibit counter [1] H = HIGH voltage level; L = LOW voltage level; X = don t care. [2] Clock connected to CP. Synchronous operation: changes occur on the LOW-to-HIGH CP transition. Jam inputs: MSD = P7, LSD = P0. 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit V CC supply voltage 0.5 +7 V I IK input clamping current V I < 0.5 V or V I >V CC +0.5 V [1] - 20 ma I OK output clamping current V O < 0.5 V or V O >V CC +0.5V [1] - 20 ma I O output current V O = 0.5 V to V CC +0.5V - 25 ma I CC supply current - +50 ma I GND ground current 50 - ma T stg storage temperature 65 +150 C P tot total power dissipation SO16 package [2] - 500 mw TSSOP16 packages [3] - 500 mw [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SO16 package: above 70 C, P tot derates linearly with 8 mw/k. [3] For TSSOP16 package: above 60 C, P tot derates linearly with 5.5 mw/k. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 6 of 23
9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit V CC supply voltage 2.0 5.0 6.0 V V I input voltage 0 - V CC V V O output voltage 0 - V CC V t/v input transition rise and fall rates 10. Static characteristics V CC = 2.0 V - - 625 ns V CC = 4.5 V - 1.67 139 ns V CC = 6.0 V - - 83 ns T amb ambient temperature 40 - +125 C Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit T amb =25C V IH HIGH-level input voltage V CC =2.0V 1.5 1.2 - V V CC = 4.5 V 3.15 2.4 - V V CC =6.0V 4.2 3.2 - V V IL LOW-level input voltage V CC =2.0V - 0.8 0.5 V V CC = 4.5 V - 2.1 1.35 V V CC =6.0V - 2.8 1.8 V V OH HIGH-level output voltage V I =V IH or V IL I O = 20 A; V CC = 2.0 V 1.9 2.0 - V I O = 20 A; V CC = 4.5 V 4.4 4.5 - V I O = 20 A; V CC = 6.0 V 5.9 6.0 - V I O = 4 ma; V CC = 4.5 V 3.98 4.32 - V I O = 5.2 ma; V CC = 6.0 V 5.48 5.81 - V V OL LOW-level output voltage V I =V IH or V IL I O =20A; V CC = 2.0 V - 0 0.1 V I O =20A; V CC = 4.5 V - 0 0.1 V I O =20A; V CC = 6.0 V - 0 0.1 V I O =4mA; V CC = 4.5 V - 0.15 0.26 V I O =5.2mA; V CC = 6.0 V - 0.16 0.26 V I I input leakage current V I =V CC or GND; V CC =6.0V - - 0.1 A I CC supply current V I =V CC or GND; I O =0A; V CC = 6.0 V - - 8.0 A C I input capacitance - 3.5 - pf All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 7 of 23
Table 6. Static characteristics continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit T amb = 40 C to +85 C V IH HIGH-level input voltage V CC =2.0V 1.5 - - V V CC =4.5V 3.15 - - V V CC =6.0V 4.2 - - V V IL LOW-level input voltage V CC =2.0V - - 0.5 V V CC = 4.5 V - - 1.35 V V CC =6.0V - - 1.8 V V OH HIGH-level output voltage V I =V IH or V IL I O = 20 A; V CC = 2.0 V 1.9 - - V I O = 20 A; V CC = 4.5 V 4.4 - - V I O = 20 A; V CC = 6.0 V 5.9 - - V I O = 4 ma; V CC =4.5V 3.84 - - V I O = 5.2 ma; V CC = 6.0 V 5.34 - - V V OL LOW-level output voltage V I =V IH or V IL I O =20A; V CC = 2.0 V - - 0.1 V I O =20A; V CC = 4.5 V - - 0.1 V I O =20A; V CC = 6.0 V - - 0.1 V I O =4mA; V CC =4.5V - - 0.33 V I O =5.2mA; V CC =6.0V - - 0.33 V I I input leakage current V I =V CC or GND; V CC =6.0V - - 1.0 A I CC supply current V I =V CC or GND; I O =0A; V CC =6.0V - - 80 A T amb = 40 C to +125 C V IH HIGH-level input voltage V CC =2.0V 1.5 - - V V CC =4.5V 3.15 - - V V CC =6.0V 4.2 - - V V IL LOW-level input voltage V CC =2.0V - - 0.5 V V CC = 4.5 V - - 1.35 V V CC =6.0V - - 1.8 V V OH HIGH-level output voltage V I =V IH or V IL I O = 20 A; V CC = 2.0 V 1.9 - - V I O = 20 A; V CC = 4.5 V 4.4 - - V I O = 20 A; V CC = 6.0 V 5.9 - - V I O = 4 ma; V CC =4.5V 3.7 - - V I O = 5.2 ma; V CC = 6.0 V 5.2 - - V All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 8 of 23
Table 6. Static characteristics continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit V OL LOW-level output voltage V I =V IH or V IL I O =20A; V CC = 2.0 V - - 0.1 V I O =20A; V CC = 4.5 V - - 0.1 V I O =20A; V CC = 6.0 V - - 0.1 V I O =4mA; V CC = 4.5 V - - 0.4 V I O =5.2mA; V CC = 6.0 V - - 0.4 V I I input leakage current V I =V CC or GND; V CC =6.0V - - 1.0 A I CC supply current V I =V CC or GND; I O =0A; V CC =6.0V - - 160 A 11. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; t r =t f =6 ns; C L = 50 pf; see Figure 13. Symbol Parameter Conditions Min Typ Max Unit T amb = 25 C t pd propagation delay CP to TC; see Figure 7 [1] V CC = 2.0 V - 96 300 ns V CC = 4.5 V - 35 60 ns V CC = 6.0 V - 28 51 ns V CC =5.0V; C L =15pF - 30 - ns TE to TC; see Figure 8 V CC = 2.0 V - 50 175 ns V CC = 4.5 V - 18 35 ns V CC = 6.0 V - 14 30 ns PL to TC; see Figure 9 V CC = 2.0 V - 102 315 ns V CC = 4.5 V - 37 63 ns V CC = 6.0 V - 30 53 ns t PHL HIGH to LOW MR to TC; see Figure 9 propagation delay V CC = 2.0 V - 83 275 ns V CC = 4.5 V - 30 55 ns V CC = 6.0 V - 24 47 ns t t transition time see Figure 8 [2] V CC = 2.0 V - 19 75 ns V CC = 4.5 V - 7 15 ns V CC = 6.0 V - 6 13 ns All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 9 of 23
Table 7. Dynamic characteristics continued GND = 0 V; t r =t f =6 ns; C L = 50 pf; see Figure 13. Symbol Parameter Conditions Min Typ Max Unit t W pulse width CP HIGH or LOW; see Figure 7 V CC = 2.0 V 165 22 - ns V CC = 4.5 V 33 8 - ns V CC = 6.0 V 28 6 - ns MR LOW; see Figure 9 V CC = 2.0 V 125 39 - ns V CC = 4.5 V 25 14 - ns V CC = 6.0 V 21 11 - ns PL LOW; see Figure 9 V CC = 2.0 V 125 33 - ns V CC = 4.5 V 25 12 - ns V CC = 6.0 V 21 10 - ns t rec recovery time MR to CP, PL to CP; see Figure 10 V CC = 2.0 V 50 14 - ns V CC = 4.5 V 10 5 - ns V CC = 6.0 V 9 4 - ns t su set-up time PE to CP; see Figure 11 V CC = 2.0 V 75 22 - ns V CC = 4.5 V 15 8 - ns V CC = 6.0 V 13 6 - ns TE to CP; see Figure 12 V CC = 2.0 V 150 44 - ns V CC = 4.5 V 30 16 - ns V CC = 6.0 V 26 13 - ns Pn to CP; see Figure 11 V CC = 2.0 V 75 22 - ns V CC = 4.5 V 15 8 - ns V CC = 6.0 V 13 6 - ns t h hold time PE to CP; see Figure 11 V CC = 2.0 V 0 14 - ns V CC = 4.5 V 0 5 - ns V CC = 6.0 V 0 4 - ns TE to CP; see Figure 12 V CC = 2.0 V 0 30 - ns V CC = 4.5 V 0 11 - ns V CC = 6.0 V 0 9 - ns Pn to CP; see Figure 11 V CC = 2.0 V 0 17 - ns V CC = 4.5 V 0 6 - ns V CC = 6.0 V 0 5 - ns All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 10 of 23
Table 7. Dynamic characteristics continued GND = 0 V; t r =t f =6 ns; C L = 50 pf; see Figure 13. Symbol Parameter Conditions Min Typ Max Unit f max maximum frequency see Figure 7 C PD power dissipation capacitance T amb = 40 C to +85 C V CC = 2.0 V 3.0 10 - MHz V CC = 4.5 V 15 29 - MHz V CC = 6.0 V 18 35 - MHz V CC =5.0V; C L =15pF - 32 - MHz V I = GND to V CC [3] - 24 - pf t pd propagation delay CP to TC; see Figure 7 [1] V CC = 2.0 V - - 375 ns V CC = 4.5 V - - 75 ns V CC = 6.0 V - - 64 ns TE to TC; see Figure 8 V CC = 2.0 V - - 220 ns V CC = 4.5 V - - 44 ns V CC = 6.0 V - - 37 ns PL to TC; see Figure 9 V CC = 2.0 V - - 395 ns V CC = 4.5 V - - 79 ns V CC = 6.0 V - - 40 ns t PHL HIGH to LOW MR to TC; see Figure 9 propagation delay V CC = 2.0 V - - 345 ns V CC = 4.5 V - - 69 ns V CC = 6.0 V - - 59 ns t t transition time see Figure 8 [2] V CC = 2.0 V - - 95 ns V CC = 4.5 V - - 19 ns V CC = 6.0 V - - 16 ns t W pulse width CP HIGH or LOW; see Figure 7 V CC = 2.0 V 205 - - ns V CC = 4.5 V 41 - - ns V CC = 6.0 V 35 - - ns MR LOW; see Figure 9 V CC = 2.0 V 155 - - ns V CC = 4.5 V 31 - - ns V CC = 6.0 V 26 - - ns PL LOW; see Figure 9 V CC = 2.0 V 155 - - ns V CC = 4.5 V 31 - - ns V CC = 6.0 V 26 - - ns All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 11 of 23
Table 7. Dynamic characteristics continued GND = 0 V; t r =t f =6 ns; C L = 50 pf; see Figure 13. Symbol Parameter Conditions Min Typ Max Unit t rec recovery time MR to CP, PL to CP; see Figure 10 V CC = 2.0 V 65 - - ns V CC = 4.5 V 13 - - ns V CC = 6.0 V 11 - - ns t su set-up time PE to CP; see Figure 11 V CC = 2.0 V 95 - - ns V CC = 4.5 V 19 - - ns V CC = 6.0 V 16 - - ns TE to CP; see Figure 12 V CC = 2.0 V 190 - - ns V CC = 4.5 V 38 - - ns V CC = 6.0 V 33 - - ns Pn to CP; see Figure 11 V CC = 2.0 V 95 - - ns V CC = 4.5 V 19 - - ns V CC = 6.0 V 16 - - ns t h hold time PE to CP; see Figure 11 V CC = 2.0 V 0 - - ns V CC = 4.5 V 0 - - ns V CC = 6.0 V 0 - - ns TE to CP; see Figure 12 V CC = 2.0 V 0 - - ns V CC = 4.5 V 0 - - ns V CC = 6.0 V 0 - - ns Pn to CP; see Figure 11 V CC = 2.0 V 0 - - ns V CC = 4.5 V 0 - - ns V CC = 6.0 V 0 - - ns f max maximum frequency see Figure 7 V CC = 2.0 V 2.4 - - MHz V CC = 4.5 V 12 - - MHz V CC = 6.0 V 14 - - MHz All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 12 of 23
Table 7. Dynamic characteristics continued GND = 0 V; t r =t f =6 ns; C L = 50 pf; see Figure 13. Symbol Parameter Conditions Min Typ Max Unit T amb = 40 C to +125 C t pd propagation delay CP to TC; see Figure 7 [1] V CC = 2.0 V - - 450 ns V CC = 4.5 V - - 90 ns V CC = 6.0 V - - 77 ns TE to TC; see Figure 8 V CC = 2.0 V - - 265 ns V CC = 4.5 V - - 53 ns V CC = 6.0 V - - 45 ns PL to TC; see Figure 9 V CC = 2.0 V - - 475 ns V CC = 4.5 V - - 95 ns V CC = 6.0 V - - 81 ns t PHL HIGH to LOW MR to TC; see Figure 9 propagation delay V CC = 2.0 V - - 415 ns V CC = 4.5 V - - 83 ns V CC = 6.0 V - - 71 ns t t transition time see Figure 8 [2] V CC = 2.0 V - - 110 ns V CC = 4.5 V - - 22 ns V CC = 6.0 V - - 19 ns t W pulse width CP HIGH or LOW; see Figure 7 V CC = 2.0 V 250 - - ns V CC = 4.5 V 50 - - ns V CC = 6.0 V 43 - - ns MR LOW; see Figure 9 V CC = 2.0 V 190 - - ns V CC = 4.5 V 38 - - ns V CC = 6.0 V 32 - - ns PL LOW; see Figure 9 V CC = 2.0 V 190 - - ns V CC = 4.5 V 38 - - ns V CC = 6.0 V 32 - - ns t rec recovery time MR to CP, PL to CP; see Figure 10 V CC = 2.0 V 75 - - ns V CC = 4.5 V 15 - - ns V CC = 6.0 V 13 - - ns All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 13 of 23
Table 7. Dynamic characteristics continued GND = 0 V; t r =t f =6 ns; C L = 50 pf; see Figure 13. Symbol Parameter Conditions Min Typ Max Unit t su set-up time PE to CP; see Figure 11 V CC = 2.0 V 110 - - ns V CC = 4.5 V 22 - - ns V CC = 6.0 V 19 - - ns TE to CP; see Figure 12 V CC = 2.0 V 225 - - ns V CC = 4.5 V 45 - - ns V CC = 6.0 V 38 - - ns Pn to CP; see Figure 11 V CC = 2.0 V 110 - - ns V CC = 4.5 V 22 - - ns V CC = 6.0 V 19 - - ns t h hold time PE to CP; see Figure 11 V CC = 2.0 V 0 - - ns V CC = 4.5 V 0 - - ns V CC = 6.0 V 0 - - ns TE to CP; see Figure 12 V CC = 2.0 V 0 - - ns V CC = 4.5 V 0 - - ns V CC = 6.0 V 0 - - ns Pn to CP; see Figure 11 V CC = 2.0 V 0 - - ns V CC = 4.5 V 0 - - ns V CC = 6.0 V 0 - - ns f max maximum frequency see Figure 7 V CC = 2.0 V 2.0 - - MHz V CC = 4.5 V 10 - - MHz V CC = 6.0 V 12 - - MHz [1] t pd is the same as t PHL, t PLH. [2] t t is the same as t THL, t TLH. [3] C PD is used to determine the dynamic power dissipation (P D in W). P D =C PD V 2 CC f i N+(C L V 2 CC f o ) where: f i = input frequency in MHz; f o = output frequency in MHz; C L = output load capacitance in pf; V CC = supply voltage in V; N = number of inputs switching; (C L V 2 CC f o ) = sum of outputs. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 14 of 23
12. Waveforms V M = 0.5 V I V M = 0.5 V I Fig 7. Waveforms showing the clock input (CP) to TC propagation delays, the clock pulse width, the output transition times and the maximum clock pulse frequency Fig 8. Waveforms showing the TE to TC propagation delays V M = 0.5 V I V M = 0.5 V I Fig 9. Waveforms showing PL, MR, Pn to TC propagation delays Fig 10. Waveforms showing removal time for MR and PL All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 15 of 23
The shaded areas indicate when the input is permitted to change for predictable output performance. V M = 0.5 V I V M = 0.5 V I Fig 11. Waveforms showing hold and set-up times for Pn, PE to CP Fig 12. Waveforms showing hold and set-up times for MR or PE to CP Fig 13. Test data is given in Table 8. Definitions for test circuit: R T = Termination resistance should be equal to output impedance Z o of the pulse generator. C L = Load capacitance including jig and probe capacitance. Test circuit for measuring switching times Table 8. Test data Supply Input Load V CC V I t r, t f C L 2.0 V V CC 6 ns 50 pf 4.5 V V CC 6 ns 50 pf 6.0 V V CC 6 ns 50 pf 5.0 V V CC 6 ns 15 pf All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 16 of 23
13. Application information Fig 14. Programmable timer Fig 15. Divide-by-N counter All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 17 of 23
14. Package outline Fig 16. Package outline SOT109-1 (SO16) All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 18 of 23
Fig 17. Package outline SOT403-1 (TSSOP16) All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 19 of 23
15. Abbreviations Table 9. Acronym CMOS DUT ESD HBM MM Abbreviations Description Complementary Metal Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Machine Model 16. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes v.5 20160421 Product data sheet - v.4 Modifications: Type number DB (SOT338-1) removed. v.4 20160127 Product data sheet - v.3 Modifications: Type number N (SOT38-4) removed. v.3 20041112 Product data sheet - 74HC_HCT40103_CNV v.2 Modifications: The format of this data sheet has been redesigned to comply with the current presentation and information standard of Philips Semiconductors. Removed type number 74HCT40103. Inserted family specification. 74HC_HCT40103_CNV v.2 19970918 Product specification - 74HC_HCT40103 v.1 74HC_HCT40103 v.1 19901201 Product specification - - All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 20 of 23
17. Legal information 17.1 Data sheet status Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term short data sheet is explained in section Definitions. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 17.2 Definitions Draft The document is a draft version only. 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Customer is responsible for doing all necessary testing for the customer s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer s third party customer(s). NXP does not accept any liability in this respect. Limiting values Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 21 of 23
Export control This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors specifications such use shall be solely at customer s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors standard warranty and NXP Semiconductors product specifications. Translations A non-english (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 17.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 18. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 5 21 April 2016 22 of 23
19. Contents 1 General description...................... 1 2 Features and benefits.................... 1 3 Applications............................ 1 4 Ordering information..................... 2 5 Functional diagram...................... 2 6 Pinning information...................... 5 6.1 Pinning............................... 5 6.2 Pin description......................... 5 7 Functional description................... 6 7.1 Function table.......................... 6 8 Limiting values.......................... 6 9 Recommended operating conditions........ 7 10 Static characteristics..................... 7 11 Dynamic characteristics.................. 9 12 Waveforms............................ 15 13 Application information.................. 17 14 Package outline........................ 18 15 Abbreviations.......................... 20 16 Revision history........................ 20 17 Legal information....................... 21 17.1 Data sheet status...................... 21 17.2 Definitions............................ 21 17.3 Disclaimers........................... 21 17.4 Trademarks........................... 22 18 Contact information..................... 22 19 Contents.............................. 23 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section Legal information. NXP Semiconductors N.V. 2016. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 21 April 2016 Document identifier: