Keep your tentacles off my bus: Introducing Die Datenkrake. REcon 2013, Montréal Dmitry Nedospasov, Thorsten Schröder



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Transcription:

Keep your tentacles off my bus: Introducing Die Datenkrake. REcon 2013, Montréal Dmitry Nedospasov, Thorsten Schröder

About us Dmitry Nedospasov PhD Student TU Berlin Thorsten Schröder Founder, modzero AG

Voiding Warranty

Tools

LeCroy 7-Zi MSO Picoscope (4000) Read-Only Devices

Source: Arduino Project Arduino Source: GoodFET Project GoodFET Source: http://en.wikipedia.org/wiki/file:bus_pirate_v3a.jpg BusPirate µcontroller

Source: Xilinx Feldprogrammierbare Gatteranordnungen

But wait... There are even more FPGA boards.

Source: http://commons.wikimedia.org/wiki/file:lego_bits_box_2.jpg Source: Digilent SASEBO Source: Embedded Micro Mojo Feldprogrammierbare Gatteranordnungen

When in doubt...

Trigger-Warning the following slide may contain traces of rainbows.

Die Datenkrake

DDK Hardware Open-Source Hardware & Software User friendly interfaces and connectors Test pads, breakout of GPIO pins Terminated & unterminated Bread-boardable Firmware & bitstream updates via USB serial interface

DDK Hardware NXP LPC1765 ARM Cortex-M3 microcontroller - 100 MHz, 256kB Flash ROM, 64kB RAM Microsemi Actel A3PN125 FPGA - 125k system gates, 36 kbit SRAM, 71 IO FTDI FT230X Serial-USB converter - 3Mbaud

DDK Hardware µcontroler Controls FPGA power and reset Controls buffer power Provides clock for FPGA IEEE1532 ISP of FPGA

DDK Hardware FPGA 3 UARTs / 6 GPIO interfacing the µc for data exchange 16bit parallel bus interfacing the µc for data and command exchange 56 general purpose 3.3/5V tolerant, terminated I/O for interfacing your targets

Die Datenkrake

DDK Software µcontroller FreeRTOS Realtime Operating System Command Line Interface via USB

DDK Logic Released / public version provides basic bit-banging and commmodules Wishbone Bus to easily connect custom modules Compatible to most Wishbone compatible cores

DDK Logic uart tx wb clk i uart tx rst i clk rst stb i we i adr i[3:0] dat i[7:0] 4 8 stb i we i adr i[3:0] dat i[7:0] txi en data out[7:0] dout rdy dat o[7:0] 8 dout dat o[7:0] en data[7:0] 8 rdy Example: Connecting a UART TX module to the Wishbone

Targets

Hardware Fuzzing Fuzzing multiple hardware instances. Determine the current state of the target. Concurrent monitoring of embedded linux devices via serial interface Crash detection, target device reset and logging. Multiplexing signals to the device.

Odroid-U2 Shout out @miaubiz 1.8V UART 5V/2A wall wart Single UART, multiplexed to all of the devices. Automatic crash detection. Background logging (FIFO memory).

chx rst1 tx1 rx1 rst2 tx2 rx2 u1 u2 Hardware Fuzzing

Hardware Glitching Introducing transient, non-invasive faults (rise & hold-time violations). Attacks a single clock cycle. May cause "incorrect" values to be loaded into registers or memory locations. Require precise timing on the order of fractions of clock-cycles of the target. Two common forms: Voltage supply and clock glitching.

Register-Transfer Layer D Q D Q clk clk

Hardware Glitching Alter the clock period during execution resulting in incorrect intermediate values. Drop the voltage, corrupt read and write operations to memory. DDK includes PLLs, frequency dividers and multiple global clock signals. Multiple clock frequencies can be generated (i.e. 20ns, 10ns...). FPGA I/O pins are directly accessible.

chx oe clk rst I/O s1 s2 v cc v glitch m vcc v cc smartcard gnd v glitch m gnd Hardwareglitschen

Software Defined Radio Utilize digital RF transceivers with a digital serial output of data. Multiple transceivers and multiple configurations can be monitored simultaneously. Only certain parts of the payload are of interest while others can be discarded. Protocol decoding must keep up with the data rate of the target.

Software Defined Radio Example: Keykeriki - Difficulties & challenges 2.4GHz Nordic Semiconductor NRF24 family Enhanced Shockburst protocol 2Mbit/s RF (2MHz = 500ns per bit)

Typical SDR Source: http://userver.ftw.at/~valerio/files/sdrreport.pdf

Example: Nordic Semi

chx mode cs sck sdio RF gio Software Defined Radio

Die Datenkrake - Release github.com/ddk www.gnu.org/licenses/gpl-2.0.txt

Acknowledgements Daniel Mack, Joachim Steiger, Jonas Hilt, Felix von Leitner Hugo Fortier, Sam, Eric Preston and the REcon 2013 crew! Colleagues at SECT & modzero AG Microsemi Corporation - http://www.microsemi.com/

Get Schooled We had a Datenkraken Hardware-Hacking Training already: precon 2013 (Berlin) REcon 2013 (Montréal) There will be trainings: RUXCON/Breakpoint 2013 (Melbourne) On demand...

Logo Contest

Questions?

Thanks! http://datenkrake.org @diedatenkrake Thorsten Schröder http://modzero.ch @br3t Dmitry Nedospasov http://nedos.net @nedos