AN2544 Application note



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Application note Designing a low cost power supply using a VIPer12/22A-E in a buck configuration Introduction Many appliances today use nonisolated power supply to furnish low output power required to run a micro, LED display, and a few relays or AC switches. This type of power supply has a single rectifier so as to reference the neutral to output ground in order to fire TRIACs or AC switches. This article describes the use of the VIPer12A-E and the VIPer22A-E which are pin-for-pin compatible and can supply power for many applications. This paper provides an off-line, nonisolated power supply evaluation board based on the VIPer12/22A-E. Four different examples are covered. The VIPer12A-E is used for 12 V at 200 ma and 16 V at 200 ma. The VIPer22A-E is used for 12 V at 350 ma and 16 V at 350 ma. The same board can be used for any output voltage from 10 V to 35 V. For outputs less than 16 V, D6 and C4 are populated and W1 is omitted. For outputs greater than 16 V, D6 and C4 are omitted and W1 is populated. For more design detail, see AN1357 "VIPower: low cost power sullies using the VIPer12A-E in nonisolated application." The objective of this application note is to familiarize the end user with this reference design and to quickly modify it for different voltage output. This design gives: Lowest possible component count Integrated thermal overload protection About 200 mw at no-load consumption Efficiency measured between 70% to 80% at full load Integrated Short circuit protection Figure 1. Evaluation board (STEVAL-ISA035V1) Table 1. Operating conditions for the four samples Board version (with changes) Output voltage and current Input voltage range 85 V ac to 264 V ac Input voltage frequency range 50/60 Hz Output version 1 VIPer22ADIP-E 12 V at 350 ma 4.2 W Output version 2 VIPer12ADIP-E 12 V at 200 ma 2.4 W Output version 3 VIPer22ADIP-E 16 V at 350 ma 5.6 W Output version 4 VIPer12ADIP-E 16 V at 200 ma 3.2 W November 2007 Rev 4 1/17 www.st.com

Contents AN2544 Contents 1 Circuit operation............................................ 4 1.1 Input line rectification and line conducted filter...................... 4 1.2 Start circuit................................................. 4 1.3 Inductor selection............................................ 5 1.4 Design example............................................. 5 1.5 Design hints and trade-off..................................... 5 1.6 Board layout................................................ 9 1.7 Burst mode in no-load or very light load.......................... 11 1.8 Short circuit............................................... 12 1.9 Performance............................................... 13 1.10 EMI conducted............................................. 15 2 Conclusion................................................ 16 3 Revision history........................................... 16 2/17

List of figures List of figures Figure 1. Evaluation board (STEVAL-ISA035V1)........................................ 1 Figure 2. Inductor current: 470 µh VS 1000 µh.......................................... 6 Figure 3. Schematic for 12 V at 350 ma............................................... 7 Figure 4. Schematic for 16 V at 350 ma............................................... 8 Figure 5. Composite............................................................... 9 Figure 6. Top side................................................................ 9 Figure 7. Bottom side and surface mount components (viewed from top)...................... 9 Figure 8. Bad start............................................................... 11 Figure 9. Good start.............................................................. 11 Figure 10. Burst mode............................................................. 12 Figure 11. Operation during a short................................................... 12 Figure 12. Load regulations for 12 V output............................................. 14 Figure 13. Line regulation.......................................................... 14 Figure 14. Efficiency.............................................................. 15 Figure 15. VIPer22-E, 12 V at 350 ma output........................................... 15 Figure 16. VIPer12-E, 12 V at 200 ma output........................................... 15 Figure 17. VIPer22-E, 16 V at 350 ma output........................................... 16 Figure 18. VIPer12-E, 16 V at 200 ma output........................................... 16 3/17

Circuit operation AN2544 1 Circuit operation 1.1 Input line rectification and line conducted filter The circuit operations for all four versions are basically the same. The difference is in the circuit for startup. Version 1 will be described here with reference to Figure 3. The output of the converter is not isolated from the input. This makes neutral common to output ground thus giving a reference back to neutral. The buck is less expensive due to the fact that it does not use a transformer and an opto coupler. The AC line is applied through D1 which rectifies the line input every other half cycle. C1, L0, C2 form a pie filter to reduce EMI noise. The value of the capacitor is chosen to maintain a reasonable valley, because the caps are charged every other half cycle. Two diodes can be used in place of D1 to sustain burst pulses of 2 kv. R10 serves two purposes, one is for inrush limiting and the other is to act as a fuse in case of a catastrophic failure. A wire wound resistor handles the energy of the inrush. Flame proof resistor and a fuse can be used depending on system and safety requirements. C7 helps the EMI by balancing line and neutral noise without using an Xcap. This will pass EN55022 level "B". If the requirement is less, then this cap can be left out of the circuit. 1.2 Start circuit The voltage across C2 is fed to the drain, pin 5 through 8. Inside the VIPer, the constant current source delivers 1mA to the V dd pin 4. This current charges C3. When the voltage on the V dd pin reaches 14.5 V nominal, the current source turns off and the VIPer starts pulsing. During this time, the energy is being supplied from the V dd cap. The energy stored must be greater than the energy needed to supply the output current plus the energy to charge of the output capacitor, before the V dd cap falls below 9 V. This can be seen in Figure 8 and Figure 9. The value of the capacitor is therefore chosen to accommodate the startup time. During a short circuit, the V dd cap discharges below the minim value enabling the internal high voltage current generator to initiate a new startup sequence. The charging and discharging of the capacitor determine the time period that the power supply is to be on and off. This reduces the RMS heating effect on all components. The regulation circuit consists of Dz, C4 and D8. D8 peak charges C4 during the freewheeling time when D5 is conducting. During this time, the source or reference to the VIPer is one diode drop below ground, which compensates for the D8 drop. So basically the Zener voltage is the same as the output voltage. C4 is connected across V fb and source to filter the regulation voltage. Dz is a BZT52C12, ½ W Zener with a specified test current of 5 ma. These Zeners that are specified at a lower current give better accuracy of the output voltage. If the output voltage is lower than 16 V, the circuit can be configured as in Figure 3 where V dd is separated from the V fb pin. When the internal current source charges the V dd cap, V dd can reach 16V at worse case condition. A 16 V Zener with a 5% low tolerance can be 15.2 V plus the internal resistance to ground is 1230 Ω which is an additional 1.23 V for a total of 16.4 V. For 16 V output and higher, the V dd pin and the V fb pin can share a common diode and capacitor filter similar to Figure 4. 4/17

Circuit operation 1.3 Inductor selection A starting point for the inductor operating in discontinuous mode can be derived from the following formula which gives a good approximation of the inductor. Equation 1 Pout L = 2 ------------------------------- ( ) 2 f Id peak Where Id peak is the minimum peak drain current, 320 ma for the VIPer12A-E and 560 ma for the VIPer22A-E, f is the switching frequency at 60 khz. The maximum peak current limits the power delivered in the buck topology. Therefore, the calculation above is for an inductor that operates in discontinuous mode. If the current swings down to zero, than the peak current is twice the output. This limits the output current to 280 ma for a VIPer22A-E. If the inductor is a larger value, operating between continuous and discontinuous mode, we can reach 200 ma comfortably away from the current limit point. C6 has to be a low ESR capacitor to give the low ripple voltage Equation 2 V ripple = I ripple Cesr D5 needs to be a fast recovery diode but D6 and D8 can be standard diodes. DZ1 is used to clamp the voltage to 16 V. The nature of the buck topology is to peak charge at no-load. A Zener 3 to 4 V higher than the output voltage is recommended. 1.4 Design example Figure 3 is the schematic for the evaluation board. It is set up for 12 V with a maximum current of 350 ma. If less current is required, then the VIPer22A-E can be changed to a VIPer12A-E and C2 can be decreased from 10 µf to 4.7 µf. This delivers up to 200 ma. Figure 4 shows the same board but for 16 V output or higher, D6 and C4 can be left out. The jumper bridges the output voltage to the V dd pin. 1.5 Design hints and trade-off The value of L determines the boundary condition between continuous and discontinuous mode for a given output current. In order to operate in discontinuous mode, the inductor value has to be lower than Equation 3 1 L = -- R T ( 1 D) 2 Where R is the load resistance, T is the switching period, and D is the duty cycle. There are two points to consider. One is, the more discontinuous the higher the peak current. This point should be kept lower than the minimum pulse by pulse current limit of the VIPer22A-E which is 0.56 A. The other is if we use a larger value inductor to run continuous all of the time, we run into excess heat from switching losses of the MOSFET inside the VIPer. Of course, the inductor current rating must be higher than the output current to prevent the risk of saturating the core. 5/17

Circuit operation AN2544 Figure 2. Inductor current: 470 µh VS 1000 µh The blue trace is the current with 470 µh inductor and the purple trace is the current with a 1000 µh inductor. On the above scope plot in Figure 2, the trace represents the current going through the inductor. Current charges up the inductor during the time the MOSFET is on. At this time, the source pin is the same as the rectified line input and the current is ramping up. At 350 ma output current, the peak of the current is 550 ma for a 470 µh inductor, the blue trace. The worse case condition for the VIPer Idlim is 560 ma. So therefore we are close to the pulse by pulse current limit trip point. This is manifested by the output voltage dropping as the output current is being raised past the limit. 470 µh inductor is the minimum value that can be used from the calculations for a 350 ma output. A good compromise is a 1000 µh making the swing less, keeping the peak at 443 ma, away from the 560 ma current limit. Looking at the purple trace the turn-on losses are increased and the turn-off losses are decreased in the MOSFET inside the VIPer. It is best to choose the inductor to give ½ the ripple current between discontinuous to continuous. This is the best compromise when working close to the maximum current. The trade-off is a little more heat for the safety margin away from the current trip point. VIPer temperature rise with two different inductors at 350 ma is: Table 2. VIPer temperature rise with different inductors Inductor Maximum peak current VIPer22ADIP-E temperature rise 470 µh 550 ma 34 C 1000 µh 443 ma 40.5 C 6/17

Circuit operation Figure 3. Schematic for 12 V at 350 ma D6 S1MDICT DZ 12 V D8 S1MDICT R0 10 1 W D1 S1MDICT VIPer22ADIP-E U1 L1 90 TO 264 VAC L0 12 V @ 350 ma Cx.022 50 V 8 7 Drain 6 Drain 5 Drain Drain 1 2 Source Source Vdd 4 Fb 3 C7 0.1 u 1 KV C3 4.7uF 25 V C4 0.47 uf 25 V Line Neutral J1 C1 10 uf 400 V 470 uh DZ1 J2 1 2 R1 1K 16 V 2 pin C2 10 uf 400 V 1 mh D5 STTH1R06A C6 47 uf 50 V 2 1 2 pin Jumper = open 0 For 12 V @ 200 ma change: C2 4.7 uf 400 V U1 VIPer12ADIP-E Jumper open 7/17

Circuit operation AN2544 Figure 4. Schematic for 16 V at 350 ma U1 VIPer 22ADIP-E DZ 16V 1N5246 8 7 Drain 6 Drain Vdd 4 5 Drain Drain 1 2 Source Source Fb 3 90 TO 264 VAC R0 10 1 W C7 0.1 u 1 KV D1 S1MDICT L0 J1 2 pin 1 2 Line Neutral 470 uh R1 1K C1 10 uf 400 V C2 10 uf 400 V Jumper = Short circuit For 16 V @ 200 ma change: C2 4.7 uf 400 V U1 VIPer12ADIP-E Cx.022 C3 4.7 uf 25 V 0 D8 S1MDICT L1 1 mh D5 STTH1R06A ST C6 47 uf 50 V DZ1 20 V 16 V @ 350 ma J2 2 1 2 pi 8/17

Circuit operation 1.6 Board layout A composite view of the board shows a double-sided board with surface mount components on the bottom. The top is a ground plane which helps with EMI. The actual measurements of the PC board are 55 mm by 23 mm. Figure 5. Composite Figure 6. Top side Figure 7. Bottom side and surface mount components (viewed from top) 9/17

Circuit operation AN2544 Table 3. Bill of material for VIPer22A-E Buck 12 V at 350 ma Item Qty Ref. Part V/W Description CAT# 1 1 Cx 0.022 50 V X7R +/-10% GP SM Ceramic 2 2 C1,C2 10 µf 400 V 105 C UCC EKMG401ELL100MJ20S 3 1 C3 4.7 µf 25 V X7R +/-10% TDK C3216X7R1E475K 4 1 C4 0.47 µf 25 V X7R +/-10% TDK C2012X7R1E474K 5 1 C6 47 µf 50 V 105 C Low ESR Low ESR 6 1 C7 0.1 µ 1 kv X7R +/-15% Murata GRM55DR73A104KW011 7 1 DZ 12 V zener BZT5212FDICT 8 1 DZ1 16 V zener BZT5216FDICT 9 3 D1,D6,D8 S1MDICT SM GP Diode 1 kv 1 A S1MD 10 1 D5 STTH1R06A 600 V 1 A Ultrafast STMicroelectronics 11 2 J1, J2 2 pin Mouser 651-1751099 12 1 L0 470 µh 140 ma JW Miller 5300-33 13 1 L1 1 mh 400 ma Compostar Q3277 or JW Miller RL895-102K 14 1 R0 10 Ω 1 W wire wound ALSR1J-10 15 1 R1 1 kω 5% SM 1206 CERAMIC 16 1 U1 VIPer22ADIP-E STMicroelectronics Table 4. Bill of material for VIPer22A-E Buck 16 V at 350 ma For 16 V or higher operation. Omit 1 D8 S1MDICT SM GP Diode 1 kv 1A S1MD Omit 1 C4 0.47 µf 25 V X7R +/-10% TDK C2012X7R1E474K Add 1 Jumper Wire jumper 24 AWG The above board can be modified to any voltage output from 10 V to 15 V by changing DZ. To modify the board to 16 or higher, D6 and C4 can be omitted and the jumper wire can be installed. For 16 V operation or higher, V dd and Vf can share the same source without having the current leak through the Zener and Vf pin path. The output voltage can be changed by changing DZ from 16 V Zener to a higher value matching the output voltage. If less current is required, the board can be changed with a VIPer12A-E dip which is pin-forpin compatible with the VIPer22ADIP-E. Also one of the input capacitors, C2, can be reduced to 4.7 µf. Various data and waveforms from evaluation boards can be seen in the following pages. The V dd cap has to be sized according to the output load and the size of the output capacitor. 10/17

Circuit operation The VIPer internal 1 ma current source charges up the V dd capacitor. When the voltage on the V dd pin reaches the V dd startup threshold (Worse case is 13 V) the VIPer starts pulsing, raising the output voltage to the point of bootstrapping. The V dd capacitor needs to supply the energy to supply the necessary output current and to charge up the output capacitor, before the V dd voltage falls below the V dd under voltage shutdown threshold (worse case is 9 V). Figure 8 and 9 show a V dd cap that is not large enough to start up the evaluation board under a resistive load of 350 ma. Figure 8. Bad start Figure 9. Good start In Figure 8 the purple trace is the V dd voltage rising to ~14 V. The energy with the 2.2 µf capacitor does not store enough energy. As seen the output voltage (green trace) does not reach high enough to bootstrap, It succeeds the second time after there is a partial charge on the output cap. Figure 9 is using a 4.7 µf V dd cap. With adequate energy the power supply starts the first time. 1.7 Burst mode in no-load or very light load At very light load, the on-time becomes so small that some pulses are skipped in order to stay in regulation and meet energy requirements such as Blue Angel or Energy Star. This mode is called burst mode. It skips as many cycles as needed to maintain regulation. In the case below at no-load about 9 cycles are skipped to maintain an output. 11/17

Circuit operation AN2544 Figure 10. Burst mode 1.8 Short circuit The VIPer has pulse-by-pulse current limit. When the current ramps up to the current limit, the pulse is terminated. This is manifested by reducing the output voltage as the current is increased. The voltage decreases until it falls below the undervoltage shutdown threshold of 9 V, (pin4). During a short circuit the VIPer turns on and off. When the V dd reaches the starting voltage, the current is limited by the pulse-by-pulse current limit. The voltage falls to the undervoltage shutdown point and the cycle repeats itself at a 16% duty cycle. This reduces the RMS current going through the circuit as seen in Figure 11. Figure 11. Operation during a short 12/17

Circuit operation 1.9 Performance Note: Regulation for the VIPer22A-E and VIPer12A-E can be seen below. Keep in mind that the buck topology will peak charge at zero load. DZ1 will clamp the voltage to 3-4 V above the output. Load regulation is taken from 0.03 A to 0.35 A. The following measurements were taken on the appropriate version of the boards. Discrepancy of measurements can be present, which is to be expected due to the 5% tolerance of the Zener and equipment used for the measurements. The measurements shown are at room temperature. If higher operating temperatures are used, current loads must be adjusted accordingly. Table 5. VIPer22ADIP-E, 12 V at 350 ma VIPer22 buck 12 V / 350 ma Vin 12 V load 12 V W in Efficiency 90 V ac 0 15.81 0.12 90 V ac 0.03 12.58 0.45 90 V ac 0.35 11.7 5.64 72.6% 264 V ac 0.35 12.21 6.12 69.8% MIN 11.7 MAX 12.58 DELTA 0.88 Line reg. 6.0% +/- % load reg (.03 to max) 3.8% Ripple mv pp at 120 V ac 52 Blue Angel at no-load at 115 V ac in W 0.12 Short circuit ok Table 6. VIPer12ADIP-E, 12 V at 200 ma VIPer12 buck 12 V / 200 ma #1 Vin 12 V load 12 V W in Efficiency 90 V ac 0 15.6 0.15 90 V ac 0.03 12.7 0.495 90 V ac 0.2 11.85 3.06 77.5% 264 V ac 0.2 12.1 3.25 74.5% MIN 11.85 MAX 12.7 DELTA 0.85 Line Reg. 2.9% +/- % load reg (.03 to max) 3.6% 13/17

Circuit operation AN2544 Table 6. VIPer12ADIP-E, 12 V at 200 ma (continued) VIPer12 buck 12 V / 200 ma #1 Vin 12 V load 12 V W in Efficiency Ripple mv pp at 120 V ac 50 Blue Angel at no-load at 115 V ac in W 0.15 Short circuit ok 12 V output load regulation for VIPer12-E and VIPer22A-E is shown in Figure 12. Figure 12. Load regulations for 12 V output Load regulation for 12V output 17 16 V12 @12V V22 @ 12V 15 Voltage 14 13 12 11 10 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 Load Line regulation shown at three different current levels: 100 ma, 200 ma, and 350 ma. Figure 13. Line regulation Line regulation Vout @ 100ma Vout @ 200ma Vout @ 350ma 13 12.8 12.6 12.4 Output Voltage 12.2 12 11.8 11.6 11.4 11.2 11 80 130 180 230 Line Voltage 14/17

Circuit operation Figure 14. Efficiency Efficiency VS Input Line for 12V output effic. @ 100ma effic. @ 200ma effic. @ 350ma 85% 80% Efficiency 75% 70% 65% 60% 80 100 120 140 160 180 200 220 240 260 Input Line Efficiency is about 75% at 120 V ac. Efficiency is better at higher output voltages. 1.10 EMI conducted EMI was checked for all four versions for maximum peak reading. Figure 15. VIPer22-E, 12 V at 350 ma output Figure 16. VIPer12-E, 12 V at 200 ma output 15/17

Conclusion AN2544 Figure 17. VIPer22-E, 16 V at 350 ma output Figure 18. VIPer12-E, 16 V at 200 ma output 2 Conclusion Using the VIPer in the buck mode has its benefits for appliances and other industrial equipment which require a reference to neutral. For currents up to 350 ma and voltages greater than 10 V, it is beneficial to use this inexpensive power supply. The cost savings compared to a transformer, opto-coupler, and low parts count, makes this solution very attractive. 3 Revision history Table 7. Document revision history Date Revision Changes 06-Jul-2007 1 First issue 13-Sep-2007 2 21-Sep-2007 3 Modified: Figure 1 Note added in Section 1.9: Performance Minor text changes 22-Nov-2007 4 Modified: the titles of Table 5-6 and the titles of Figure 15-17 16/17

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