Why is Chip Design Moving to Asia?



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Why is Chip Design Moving to Asia? Drivers and Policy Implications East West Center, Honolulu, Hawaii, USA

Research Methodology Exploratory, semi-structured interviews (since 2002) 70 companies & 15 research institutions (US, Taiwan, Korea, China, Malaysia) that are doing chip design in Asia Sample contains global and regional carriers of chip design in Asia

Carriers of Asian Chip Design System companies Integrated device manufacturers (IDM) Contract manufacturers (EMS; ODM) fabless chip design houses Chip contract manufacturers ( foundries ) Design implementation services Chip packaging & testing chipless licensors of silicon intellectual properties (SIPs) Tool vendors (EDA; design testing)

Research findings Rapid growth of chip design investment in Asia All interviewed firms are planning to expand such activities Design implementation continues to play dominant role System specification is gaining in importance Substantial progress in complexity of design

Chip Design Flow Chart Market Analysis & Product Planning System/Application Level Specification Define Standards (Upstream) Market Specification Speed, Quality, Flexibility, Cost Asia s Advantage Advantage of Advanced Countries Behavioral Level Design RTL Level Design Gate Level Design Circuit Level Design Physical Level Design Post-Layout Verification Foundry Manufacturing, Packaging and Testing Semiconductor Material, Manufacturing Equipment EDA Software Support IC Design Implementation Flow (Downstream) Process Technology Source: Chang and Tsai, 2002

Drivers of Asian Chip Design Systemic combination of pull, push, and enabling factors is creating virtuous cycle pull factors explain what attracts design to particular locations "push" and enabling factors explain what tilts the balance in favor of geographical decentralization

Pull factors attract chip design to particular locations Demand (market size & sophistication) Supply (talent pool) Policies (tax rebates; regulations; IPR; infrastructure; education; legal framework)

Annual Cost of Employing a Chip Design Engineer* (US-$), 2002 Location Silicon Valley Canada Ireland Taiwan South Korea China India Annual Cost 300,000 150,000 75,000 <60,000 <65,000 28,000 (Shanghai) 24,000 (Suzhou) 30,000 *=including salary, benefits, equipment, office space and other infrastructure Sources: PMC-Sierra, Inc. Burnaby, Canada (for Silicon Valley, Canada, Ireland, India); plus interviews (Taiwan, South Korea, China)

Skill requirements and work organization designer bottleneck : US has failed to train enough engineers for the next generation Global market for design training Asian designers are trained using the latest tools and methodologies Global firms seek to bypass resistance to design automation

China Market World s largest market for telecom equipment (wired & wireless) (test bed for 3G) Ditto for handsets (launch market) Third largest market for semiconductors Sophisticated markets for digital CE (#2) & computers Leading export market for US, Japan, Taiwan and Korea

Push factors Global markets for technology & knowledge workers? changes in design methodology & organization ( vertical specialization ) Firms outsource stages of chip design to specialized suppliers (dis-integration of innovation value chain) and offshore design projects to new lower-cost locations (geographic dispersion)

Enabling Factors production - production & SCM - CRM - KIBS - EMS/ turnkey - ODM suppliers ICT-enhanced Information Mgmt communication tools & libraries remote control audio-visual codified> tacit Vertical Specialization disintegration dispersion modular re-use & recombination Innovation Global Flagship Networks re-integration concentrated dispersion diverse & asymmetric governance - design - licensing ( IP trade ) - standard consortia - R&D collaboration - SI: complex systems Knowledge Diffusion tacit> codified Transnational Knowledge Communities professional peer group networks diaspora of skilled migrants reverse brain drain IT mercenaries

GDN diversity Chinese system company defines system architecture contract manufacturing of electronic equipment (Taiwan) American IDM provides design platform European SIP provider fabless design houses (US; Taiwan) foundries (Taiwan, Singapore and China) chip packaging companies (Taiwan; China) tool vendors for design automation and testing from the US and India design support service providers( various Asian countries)

Who controls Global Design Networks? (1) General criteria rent distribution ownership who defines strategic direction?

Who controls Global Design Networks? (2) Design-specific criteria Which of the following functions are performed by whom and where? architecting business model platforms system integration bottleneck capabilities

Conclusions (1) Complexity is no longer an absolute constraint to internationalization of innovation Geographic proximity can be a disadvantage when design requires a large number of designers with diverse capabilities Pull and policy factors explain what attracts design to particular locations Changes in design methodology and organization explain what tilts the balance in favor of geographic decentralization

Conclusions (2) Open Questions Talent pool Can East Asian countries replicate the US model of attracting top talent from the global market for knowledge workers? Innovative Capabilities Strategy Can East Asian firms enter the global innovation race as sources of new technology and global standards? from fast follower to technology diversification technology leadership?

Strategies Definition Capabilities Comments Catchingup enter after growth stage lower-cost producer operational assimilate & improve foreign tech s decreasing returns razor-thin margins Fast- Follower enter early during growth stage quick market response process development prototype development footloose investment weak marketing skills flexible production system cost control where to move to? (paradigm shift)

Strategies Definition Capabilities Comments Technology Diversification recombine (mostly known) technologies to create new products & services economics of scope (technology) applied research international knowledge sourcing build on proven capabilities higher margins & limited uncertainty new opportunities (vertical specialization in GFNs) latecomer advantages IPs Technology Leader sets standard during introduction of new products/service basic research pure science defining standards higher margins strong entry deterrents high cost (R&D; regulations) superior IPs lower-cost imitators disruptive technologies

Thank you East West Center, Honolulu, Hawaii, USA