CBM2096. USB 2.0 Flash Disk Controller. Datasheet. Rev 1.0
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1 CBM2096 USB 2.0 Flash Disk Controller Datasheet Rev 1.0 Shenzhen Chipsbank Technologies Co.,Ltd. 7/F,Building No.12,Keji Central Road 2, Software Park, High-Tech Industrial Park, Shenzhen, P.R.China Tel: Fax: URL: Contained herein Copyright by Shenzhen Chipsbank Technologies Co.,Ltd. all rights reserved. CBM2096 Datasheet /02/2011
2 Revision History Date Rev No Description Initial release CBM2096 Datasheet /02/2011
3 Contents 1 DESCRIPTION FEATURES BLOCK DIAGRAM PIN ASSIGNMENT TQFP48 (TOP SIDE) PIN DESCRIPTION ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS RECOMMENDED OPERATING CONDITIONS STATIC CHARACTERISTICS DYNAMIC CHARACTERISTICS Normal NAND FLASH Dynamic characteristics ONFI NAND FLASH Dynamic characteristics TOGGLE NAND FLASH Dynamic characteristics MECHANICAL DIMENSIONS PIN CBM2096 PACKAGE OUTLINE DIMENSION COPYRIGHT NOTICE CBM2096 Datasheet /02/2011
4 1 Description Fastest & Securest USB 2.0 Flash Disk Controller with dedicated 32-bit microprocessor The CBM2096 is the USB 2.0 Flash Disk controller with the fastest transfer speed on the market. CBM2096 can reach theoretical flash access speed limit of over 32MByte/s for read and 20MByte/s for write. The on-the-fly ECC engine is capable of correcting up to 16/25/29/30bits per 1024 bytes page. For data security, CBM2096 is designed with both hardware and software data protection technology to prevent data corruption even if it is powered off or unplugged during data transfer. The CBM2096 supports all 8 /16 bit BUS wide async NAND flash memory available in the market. New flash can be supported by software re-configuration. The CBM2096 supports all 8 bit BUS wide ONFI/TOGGLE NAND flash memory available in the market. New flash can be supported by software re-configuration. The CBM2096 has both a) 5V to 3.3V LDO and b) power on reset circuits integrated. Thus greatly reduced BOM cost and eased layout burden. The CBM2096 can work properly with no external crystal. It was popularly used for UDP products. The CBM2096 runs smoothly with all available hosts and PC platforms. Complied with USB specification rev. 2.0, the CBM2096 can be supported without additional driver under Win XP, Win 2000, Windows Me, Mac OS and Linux OS. With device driver installed, it can support Win 98/98SE as well. Comprehensive applications, such as PC boot up, disk partitions, password check for security disk, are available as part of our standard mass production software package. The CBM2096 is available in 48-pin TQFP and 64-pin LQFP package, which are thinnest and smallest on the market. The 48-pin CBM2096 and the 64-pin CBM2096 all support up to 8 flash chips. Customers can choose different packages to meet their design requirement. 2 Features USB Interface High-speed USB 2.0 interface; Fastest data transfer rate on the market Single-channel mode(16bit): 32MB/s for Read, 20MB/s for Write Single-channel mode(8bit): 26MB/s for Read, 20MB/s for Write Fastest file copy rate on the market. On-the-fly ECC built-in Hardware enhances reliability ECC for NAND flash: 16/25/29/30 bit per page (1 page = 1024 bytes) Special wear leveling algorithm to improve the flash life-time Hardware & Software Data Protection Technology Prevent data corruption even if it is powered off or unplugged during data transfer. CBM2096 Datasheet /02/2011
5 SLC & MLC & TLC NAND Flash Interface Support 8-bit and 16-bit Samsung SLC&MLC&TLC NAND flash. Support 8-bit and 16-bit Toshiba SLC&MLC&TLC NAND flash. Support 8-bit and 16-bit Hynix SLC&MLC&TLC NAND flash. Support 8-bit and 16-bit Sandisk SLC&MLC&TLC NAND flash. Support 8-bit and 16-bit Micron/Intel SLC&MLC&TLC NAND flash. Support 8-bit and 16-bit ST/Numony SLC&MLC NAND flash. Support 8-bit and 16-bit Infineon SLC&MLC NAND flash. Support PowerChip SLC&MLC Nand flash Support Spansion 3.3V MirrorBit-Quad flash Support Actrans Nand Flash Support ONFI2.0 DDR mode flash Support Samsung Toggle mode flash Software configuration to support various new flash memories Supports up to 8 flash chips Proprietary 32-bit CISC microprocessor feature Proprietary 32-bit CISC processor for USB protocol processing and flash access. Single cycle instruction period Integrated 5v to 3.3v voltage regulator Disk partitions and password check for security disk available PC boot up as USB Zip Disk, USB Hard Disk or USB CDROM Auto run function Low power dissipation Operating current 60mA (Bus power compatible) Build-in LDO Output maximum current up to 300mA Build-in crystal Leading 0.16um CMOS technology 48-pin TQFP /64-pin LQFP package 48-pin CBM2096 supports up to 8 Flash Chips Windows, Mac and Linux compatible CBM2096 Datasheet /02/2011
6 3 Block Diagram CBM2096 Datasheet /02/2011
7 4 Pin Assignment 4.1 TQFP48 (Top Side) CBM2096 Datasheet /02/2011
8 5 Pin Description Brief CBM2096 pin functions are shown in the following tables. I: Input signal O: Output signal : Bi-direction signal PWR: Power signal GND: Ground signal : pull up PD: pull down CBM2096 TQFP48 Pin Description TQFP48 Pin No. Pin Name Type Description 1 VDD50 PWR Regulator 5V Power Input 2 VDD33 PWR Regulator 3.3V Power OUT 3 VDD18 PWR Regulator 1.8V Out 4 VPP PWR CORE 1.8V in 5 REXT I Connect External Resister for current reference 6 VDD33 PWR Padring 3.3V Power 7 DP USB Data D+ 8 DM USB Data D- 9 VSS GND Padring 3.3V / Logic 1.8V Ground 10 XI I Connect External Capacitor 11 XO O Connect External Capacitor 12 VSSU GND Analog 1.8V Ground 13 VDDU PWR Analog 1.8V Power 14 TEST_MODE 15 FDATA0_15 GPIO15 I PD Test Mode Enable Pin When high, test mode When low, normal mode Group 0 Flash Data Bus - bit 15 General port 15 CBM2096 Datasheet /02/2011
9 16 FDATA0_14 GPIO14 When select spi mode,as spi chip select. (configure as GPIO and clear pin_64( detail in spi_ctl[13].when select master mode, configure output, otherwise, configure as input.). Group 0 Flash Data Bus - bit 14 General port 14 When select spi mode, as clock out support ligh-tun sensor (configure as GPIO and clear pin_64( detail in spi_ctl[13].when select ligh-tun mode, configure output). 17 VSS GND Padring 3.3V / Logic 1.8V Ground FDATA0_13 GPIO13 FDATA0_12 GPIO12 FDATA0_11 GPIO11 FDATA0_10 GPIO10 FDATA0_9 GPIO9 FDATA0_8 GPIO8 24 X_LED Group 0 Flash Data Bus - bit 13 General port 13 Group 0 Flash Data Bus - bit 12 General port 12 Group 0 Flash Data Bus - bit 11 General port 11 Group 0 Flash Data Bus - bit 10 General port 10 Group 0 Flash Data Bus - bit 9 General port 9 Group 0 Flash Data Bus - bit 8 General port 8 When TEST_MODE =1, as scan clock input. When TEST_MODE =0, as LED Indication 25 FWRN O Group Flash Write Enable (active low) 26 FALE O Group Flash Address Latch Enable 27 WP I Write Protect Switch Input 28 FCLE O Group 29 VDD33 PWR Padring 3.3V Power 30 DQS PD Flash Command Latch Enable DQS, only for onfi/toggle nand flash 31 FCEN0 O Flash Chip Enable - Chip 0 (active low) 32 FRDN O Group Flash Read Enable (active low) FRB1 /INTR /SCK(I2c) FCEN3 FCEN2 I O Group Flash Ready_Busy 1, when select flash_rb1 mode, as Group Flash Ready_Busy1 signal input(detail in soft_flag [25]). 2, when select intr mode, as external interrupt input signal(detail in soft_flag [25]). 1, When select test-mode, as scan-chain output 2, When select i2c, as sck 3, When select chip select2/3 mode, as CE3 output 1, When select test_mode, As scan-chain input 2, when select chip select2/3 mode, as CE2 output.(active when disable test_mode) CBM2096 Datasheet /02/2011
10 36 X_CLK_OUT /FCEN1 37 FRB0 I Group Flash Ready_Busy FDATA0_0 GPIO0 FDATA0_1 GPIO1 FDATA0_2 GPIO2 FDATA0_3 GPIO3 FDATA0_4 GPIO4 FDATA0_5 GPIO5 FDATA0_6 GPIO6 FDATA0_7 GPIO7 46 TOGGLE_SEL I 1, When select clock input mode (1), X_CLK_OFF=1, as external input test clock. 2, When select chip select1 mode or spi master mode, as output. ( only active when X_CLK_OFF =0 or de-slect spi slve mode) (1), select chip select1 mode (detail in soft_flag [28]/[25]), as CE1 output (2), otherwise, as normal clock_out,which defined at config_r[20]. Group 0 Flash Data Bus - bit 0 General port 0 Group 0 Flash Data Bus - bit 1 General port 1 Group 0 Flash Data Bus - bit 2 General port 2 Group 0 Flash Data Bus - bit 3 General port 3 Group 0 Flash Data Bus - bit 4 General port 4 Group 0 Flash Data Bus - bit 5 General port 5 Group 0 Flash Data Bus - bit 6 General port 6 Group 0 Flash Data Bus - bit 7 General port 7 Toggle nand flash select (active low) 47 RESET I Reset Sign (active low) 48 VSS33A GND Analog 3.3V Ground CBM2096 Datasheet /02/2011
![( only active when X_CLK_OFF =0 or de-slect spi slve mode) (1), select chip select1 mode (detail in soft_flag [28]/[25]), as CE1 output (2), otherwise, as normal clock_out,which defined at](/docs-images/46/21162856/images/page_10.jpg "config_r[20].")
11 6 Electrical Characteristics 6.1 Absolute maximum ratings In accordance with the Absolute Maximum Rating System (IEC 60134). symbol parameter conditions min max unit VDD33 analog supply voltage v VDD18 digital supply voltage v VDD50 input voltage v Vesd electrostatic discharge voltage[1] ILI < 1 A DP, DM and GND pins other pins Tstg storage temperature [1] Equivalent to discharging a 100 pf capacitor via a 1.5 k resistor (Human Body Model). 6.2 Recommended operating conditions v symbol Parameter conditions min Typ max Unit VDD33 analog supply voltage V VDD18 digital supply voltage V VDD50 input voltage V VI(A) input voltage on analog pins DP DM Low/Full speed V High speed mv Tamb ambient temperature CBM2096 Datasheet /02/2011
![temperature -40 +125 [1] Equivalent to discharging a 100 pf capacitor via a 1.5 k resistor (Human Body Model). 6.](/docs-images/46/21162856/images/page_11.jpg "2 Recommended operating conditions v symbol Parameter conditions min Typ max Unit VDD33 analog supply voltage 3.0 3.3 3.6 V VDD18 digital supply voltage 1.62 1.8 1.98 V VDD50 input voltage 4.5 5 5.")
12 6.3 Static characteristics All parameters are measured at VCCA = VCCD = 3.0 to 3.6 V; VAGND = VDGND = 0 V; Tamb = 40 to 85 ; symbol Parameter Conditions min Typ max Unit ICC ICC(susp) operating supply current suspend supply current 6.4 Dynamic characteristics Full-speed transmitting and receiving; high-speed transmitting and receiving ma in suspend mode - 4 ma Normal NAND FLASH Dynamic characteristics All parameters are measured at VCCA = VCCD = 3.0 to 3.6 V; VAGND = VDGND = 0 V; Tamb = -40 to 85 ; symbol Parameter conditions min Typ max Unit Ts(FDATA*) Th(FDATA*) Ts (FCLE*) Th (FCLE*) Ts (FALE*) Th (FALE*) Ts (FCEN*) Tpw (FWRN*) Thh (FWRN*) Ta(FDATA*) Tpw (FRDN*) Thh (FRDN*) FDATA* setup time relative to rising FWRN* edge FDATA* hold time relative to falling FWRN* edge FCLE* setup time relative to falling FWRN* edge FCLE* hold time relative to rising FWRN* edge FALE* setup time relative to falling FWRN* edge FALE* hold time relative to rising FWRN* edge FCEN* setup time relative to falling FWRN* edge FWRN* Pulse Width FWRN* high hold time FDATA* access time relative to falling FRDN* edge FWRN* Pulse Width FWRN* high hold time Configured by firmware Configured by firmware Configured by firmware Configured by firmware Configured by firmware Configured by firmware Configured by firmware Configured by firmware Configured by firmware Configured by firmware Configured by firmware ns ns ns ns ns ns - 99 ns ns ns ns ns ns CBM2096 Datasheet /02/2011
13 Timing diagram for Writing of Data Timing diagram for Reading of Data CBM2096 Datasheet /02/2011
14 6.4.2 ONFI NAND FLASH Dynamic characteristics CBM2096 only support Mode0/Mode1/Mode2. CBM2096 Datasheet /02/2011
15 CBM2096 Datasheet /02/2011
16 CBM2096 Datasheet /02/2011
17 CBM2096 Datasheet /02/2011
18 CBM2096 Datasheet /02/2011
19 6.4.3 TOGGLE NAND FLASH Dynamic characteristics CBM2096 only support 66Mbps/80Mbps. CBM2096 Datasheet /02/2011
20 CBM2096 Datasheet /02/2011
21 CBM2096 Datasheet /02/2011
22 CBM2096 Datasheet /02/2011
23 CBM2096 Datasheet /02/2011
24 7 Mechanical Dimensions Pin CBM2096 Package Outline Dimension CBM2096 Datasheet /02/2011
25 8 Copyright Notice Copyright by Shenzhen Chipsbank Technologies Co.,Ltd. All Rights Reserved. Right to make changes Shenzhen Chipsbank Technologies Co.,Ltd. reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. The information contained in this manual is provided for the general use by our customers. Our customers should be aware that the personal computer field is the subject of many patents. Our customers should ensure that they take appropriate action so that their use of our products does not infringe upon any patents. It is the policy of Shenzhen Chipsbank Technologies Co.,Ltd. to respect the valid patent rights of third parties and not to infringe upon or assist others to infringe upon such rights. This manual is copyrighted by Shenzhen Chipsbank Technologies Co.,Ltd. You may not reproduce, transmit, transcribe, store in a retrieval system, or translate into any language, in any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual, or otherwise, any part of this publication without the expressly written permission from Shenzhen Chipsbank Technologies Co.,Ltd. CBM2096 Datasheet /02/2011
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