Design of an almost continuously controlled threephase static VAR compensator for power factor correction purposes

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1 Scentfc Research and Essays Vol. (), pp., January, alable onlne at DOI:./SRE. ISSN cademc Journals Full ength Research Paper Desgn of an almost contnuously controlled threephase statc VR compensator for power factor correcton purposes bdulkareem Mokf Obas* and Jagadeesh Pasupulet Department of Electrcal Power Engneerng, Unerst Tenaga Nasonal, Malaysa. ccepted October, In ths paper, a threephase fourwre automatc power factor correcton system s desgned and tested. Ths system employs threephase Wyeconnected thyrstor swtchedcapactor banks to generate a controllable statc VR. Each capactor bank s constructed of fe bnary weghted thyrstor swtchedcapactors. Ths arrangement leads to a capactor bank capable of generatng steppng reacte power hang thrty one equdstant nonzero leels. The controllng crcut of each capactor bank s desgned such that maxmum absolute deaton from lnear response s / of ts ratng. Each capactor s controlled by a sngle thyrstor shunted by a reerse dode. The system s capable of correctng laggng power factor up to unty or adjustng t accordng to user desre. Each capactor s connected to a seres reactor for protectng the sold state combnaton from nrush current occurrng at the frst nstant of compensator plug n to power system network. The proposed system s characterzed by neglgble no load operatng losses, no generaton of harmoncs, energy sang, and reducton of transmsson losses. The system s desgned and mplemented on PSpce whch s a computer program ery close n performance to real hardware and broadly adopted by manufacturng companes. Key words: apactor bank, power factor correcton, power qualty, statc VR. INTRODUTION Power factor mproement leads to a bg reducton of apparent power drawn from the ac source whch n turn saes energy and mnmzes the transmsson losses (Mehrdad, ; Da et al., ; upn et al., ). It generally employs means that control reacte power n power system network (Gyugy et al., ). The process s usually denoted by reacte power compensaton whch s a producte technology employed for mprong power systems performance. Ths technology seres customers and power system networks. Power qualty s an nsstng challenge n ac power systems, whereas reacte power compensaton technques offer strkng solutons on the *orrespondng author. Emal [email protected]. route of ts acheement. Reacte power control soles or attenuates many power system problems such as poor oltage regulaton, lne unbalance, poor power factor, and reduced effcency. There are so many technques approachng reacte power control, but the statc VR compensators are the most relable ones, snce they present hgh flexblty n desgn methodology and exhbt reasonable response amongst fast aryng enronments (Mller, ). Statc VR compensators are ether seres or shunt compensators. Seres compensators deal wth modfcaton of dstrbuton or transmsson parameters of the ac system, whle shunt compensators decde the load equalent mpedance (Mller, ; Teleke et al., ). Both types of compensators can be used to control the reacte power for power factor correcton purposes n ac power systems.

2 Sc. Res. Essays Synchronous condensers and manually swtched capactors or nductors can be used for power factor correcton purposes, but. statc VR compensators usng thyrstor swtched capactors and thyrstor controlled reactors are superor to them, snce they are characterzed by fast response and hgh desgn flexblty (Teleke et al., ). Fxed capactorthyrstor controlled reactor (FTR) compensators are wdely used for power factor correcton purposes. They offer the feasblty of contnuous reacte power control, but they exhbt full load operatng losses at relaxaton tme, snce the TR s operatng at ts full capacty n order to absorb the reacte power generated by the fxed capactor (hen et al., ). In addton they release large amounts of harmonc current components whch ncrease transmsson losses and dsturb the power system network oltage profle (Best and a Parra, ). The TR s a source of harmoncs, where the thrd harmonc for nstance s about % of the TR ratng (hen et al., ). Ths reeals the need for harmoncs flters whch add more complexty and more operatng and transmsson losses (ee and Wu, ). Statc VR compensators usng swtchedcapactor banks offer steppng responses n reacte power generaton mode and ther losses are proportonal to the reacte power demands (Nand et al., ). FTR and swtched capactor banks statc VR compensators are usually referred to as conentonal statc VR compensators whch are bascally characterzed by the employment of naturally commutated soldstate swtchng deces hang hgh oltage and current ratngs. Employment of conerters wth an approprate pulse wdth modulaton control technque, permts the mplementaton of statc VR compensators capable of generatng or absorbng reacte power wth fast tme response (Walker, ; Stahlkopf and Wlhelm, ). The recent deelopments n power electroncs deces offer hgh amount of flexblty n statc VR compensators desgn for power factor correcton and oltage control purposes. The new generatons of these deces are characterzed by fast responses, wde frequency spectrums, wde safe operatng areas, low swtchng losses, low ON and OFF tmes, and easy commutaton (Rashd, ; Bmal, ). Basng on the aboe facts and the recent analytcal computatons, Flexble Transmsson Systems (FTS) appear as a new concept n power transmsson systems (Idrs et al., ). These new technologes make t easy to present statc VR compensators hang fast response and capable of ncreasng the amount of apparent power through a transmsson lne n the neghborhood of ts thermal capacty, wthout exceedng ts stablty lmts. These new technologes are lmted to low oltage applcatons, snce they are employng fast soldstate swtchng deces hang relately low oltage and current ratngs (Rashd, ; Bmal, ). Here n ths paper, a relable swtchedcapactors technque s adopted for threephase automatc power factor correcton purposes. The technque s based on desgnng a swtchedcapactor bank exhbtng almost lnear response ersus reacte power demand. Ths technque soles the lnearty problem of statc VR generaton and offers the feasblty of operaton at hgh oltage and current ratngs, snce t employs sold state swtchng deces hang hgh ratngs. In addton, the proposed technque s harmonc free, thus no harmonc flters are requred. THE PITOR BNK ONFIGURTION The proposed capactor bank s composed of fe bnary weghted capactors as shown n Fgure a. Ths confguraton offers nonzero leels of possble capacte reacte current as shown n Fgure b. Each capactor s controlled by a sngle thyrstor shunted by a reerse dode. The thyrstor handles the poste half cycle of the capactor current and the dode deals wth the negate half cycle. Reactors S to S are current lmters. THE PROPOSED SINGEPHSE SYSTEM The snglephase power factor correcton system block dagram s shown n Fgure. The capactor bank trggerng crcut s excted by two sgnals. The frst sgnal s K, where K s the attenuaton factor of the current transformer (.T) crcutry and s the nstantaneous load current. The second sgnal s K*, where K* s the attenuaton factor of the oltage transformer (V.T) crcutry and s the nstantaneous phase oltage. The load oltage and current can be gen by: Vm sn t () I m sn( t ) Where V m s the load oltage ampltude n olts, I m s the load current ampltude n amperes, φ s load current power factor angle n radans, and t s tme n seconds. The frst zerocrossng detector n Fgure conerts K* to a rectangular waeform V whch s then dfferentated and halfwae rectfed by the frst R dfferentator/rectfer, formng V. The latter s a tran of pulses used to trgger the sample and hold crcut at ωt = nπ, where n s a poste odd nteger. The analogue dfferentator conerts K* to the analogue sgnal V ()

3 I I I I I I I I I I I I I I I I I I apactor bank current Obas and Pasupulet ne V T DT T DT T DT T DT T DT S S S S S Neutral (a) I I I I I I=Vw I I Steppng response I I I I near response I I I Maxmum error=i/ I I I I apacte reacte current demand Fgure. apactor bank, (a) confguraton, (b) expected reacte current response. (b) whch s then zerocrossng detected, formng the waeform V. The latter s processed smlar to V, formng V. These waeforms are shown n Fgure. The current sgnal K s sampled by the sample and hold crcut at ωt= nπ, where n s a poste odd nteger, yeldng an analogue sgnal proportonal drectly to the

4 nalogue dfferentator bt D VT VT VT VT VT mplfer Sample/hold crcut apactor bank Inducte load Sc. Res. Essays T.T K V T S D T S D T S D T S D T S D V.T R N Drng crcut U UB U UB U DB DB DB IN DB DB DB DB DB V K V R dfferentator /rectfer() K* NVRT V R dfferentator /rectfer() V apactor bank trggerng crcut Fgure. The proposed sngle phase power factor correcton system block dagram. V Zerocrossng detector() Zerocrossng detector() V reacte current component of the load current as follows: tn K KI sn t KI sn m The latter sgnal s amplfed and clamped upward by. olts producng the analogue oltage V whch s proportonal to the reacte current demand. V s the analogue nput of the bt analoguetodgtal conerter (bt D). For unty power factor correcton and at full compensator ratng, V wll hae a magntude of olts. The bt D starts conerson at ωt = (n)π/, where n s a poste odd nteger. The fe most sgnfcant dgts m () (DB, DB, DB, DB, and DB) of the bt D are employed for controllng the capactor bank swtchng deces (T, T, T, T, and T ) respectely. The nstantaneous capactor bank current s determned by the logc status of the bt D as follows: Vm DB DB DB DB DB () Where, s the basc capactance of the capactor bank. For DB, DB, DB, DB, and DB, logc zero refers to zero olts, whle logc one refers to olts. Note that when V s zero, all the dgtal outputs of the bt D are

5 Obas and Pasupulet K *.V V V.V V V.V.Vs ms ms V(VS) V.V.Vs ms ms V(U:).V.V V V.Vs ms ms V(VS) V V.Vs ms ms V(VS) V V.V s ms ms V(D:) Fgure. The snglephase basc oltage waeforms..v s ms ms V(D:), t, t logc zero. When V s olts, all the dgtal outputs are logc one. Table shows the capactor bank swtchng status as V ares from zero to olts. The drng crcut ncludes fe subcrcuts; each one of them deals wth one of the thyrstor (T to T ). hoosng approprate swtchng nstants wll protect the swtchng deces from nrush. The approprate swtchng of thyrstor occurs at ωt = (n)π/, where n s a poste odd nteger. t these nstants d/dt s zero and each of the capactors (,,,, and ) s charged to V m through ts correspondng dode and lmtng reactor. Note that when ths compensator s started, each of the aboe capactors charges through ts nddual dode and lmtng reactor to V m. No nrush current wll assocate the chargng and swtchng mechansms. THE PROPOSED THREEPHSE POWER FTOR ORRETION SYSTEM The power crcut of threephase power factor correcton system s shown n Fgure. It s smply composed of three dentcal capactor banks connected n star form., B, and are the nstantaneous compensator phase, whle, B, and are the power system nstantaneous phase oltages. The three phase nstantaneous load are, B, and, whle the three phase nstantaneous lne are, B, and. Each capactor bank wll respond accordng to Fgure b. The block dagram of the proposed threephase fourwre power factor correcton system s shown n Fgure. It comprses three dentcal oltage transformers and three dentcal current transformers. Here are three dentcal trggerng crcuts; each one of them deals wth a sngle capactor bank. Phase trggerng crcut s excted by the analogue sgnals K and K*, phase B trggerng crcut s excted by the analogue sgnals K B and K* B, and phase trggerng crcut s excted by the analogue sgnals K and K*. If the compensator s operated by a balanced threephase supply, then the controllng sgnals can be gen by K * * K V sn t () m

6 Sc. Res. Essays Table. The capactor bank status as V ares from to V. V (Volts) Status Status Status Status Status OFF OFF OFF OFF OFF. ON OFF OFF OFF OFF. OFF ON OFF OFF OFF. ON ON OFF OFF OFF. OFF OFF ON OFF OFF. ON OFF ON OFF OFF. OFF ON ON OFF OFF. ON ON ON OFF OFF. OFF OFF OFF ON OFF. ON OFF OFF ON OFF. OFF ON OFF ON OFF. ON ON OFF ON OFF. OFF OFF ON ON OFF. ON OFF ON ON OFF. OFF ON ON ON OFF. ON ON ON ON OFF OFF OFF OFF OFF ON. ON OFF OFF OFF ON. OFF ON OFF OFF ON. ON ON OFF OFF ON. OFF OFF ON OFF ON. ON OFF ON OFF ON. OFF ON ON OFF ON. ON ON ON OFF ON. OFF OFF OFF ON ON. ON OFF OFF ON ON. OFF ON OFF ON ON. ON ON OFF ON ON. OFF OFF ON ON ON. ON OFF ON ON ON. OFF ON ON ON ON. ON ON ON ON ON K K * * K K K K V sn t / * B m () B K V sn t / * m () m KI sn t () KI mb sn t / B () KI m sn t / () Where I m, I mb, and I m are the load phase ampltudes, whle φ, φ B, and φ are ther power factor angles. These threephase controllng sgnals are processed n the same manner adopted n the sngle phase power factor correcton system. The capactor bank of each phase wll respond accordng to the crteron of Table. SYSTEMS IRUITS DESIGN The snglephase and threephase automatc power factor correcton systems are desgned and mplemented usng the computer program PSpce. Datasheets of electronc parts and adng lteratures are consdered durng desgn process (Rashd, ; Bmal, ).

7 Ra D a Obas and Pasupulet B B N B B T D T D T D T D T D S S S S S T D S S D T T S D D N D T S D T S b Rb N Rc c T D T S S D T S T D S T S ompensator power crcut Three phase load Fgure. The power crcut of the threephase power factor correcton system. Fgures and show the crcut dagrams of the snglephase and the threephase automatc power factor correcton systems respectely. The smulaton results wll be extracted from runnng these systems on PSpce. RESUTS The basc capactance was chosen to be µf for both snglephase and threephase systems. The power system network has a frequency of Hz and a phase oltage of olts (r.m.s alue). onsequently, the snglephase reacte current ratng s (peak alue). Fgure shows PSpce tests for the snglephase system. The frst test corresponds to the case at whch the load mpedance (Z ) was. o. The power factor for ths load s. laggng. The reacte component of the load current was (peak alue) whch was wthn the compensator ratng. onsequently the compensator generated a capacte reacte current completely cancelled the load current reacte component yeldng a real total current ( T ) as shown n Fgure a. The second test corresponds to an nducte load of. o. The reacte component for that load was. (peak alue) whch exceeded the system ratng by. (peak alue). Therefore the power factor for that load was only mproed as shown n Fgure b. Fgure shows tests correspondng to the threephase system. DISUSSION Fgure a concerns a balanced threephase nducte

8 Phase capactor bank Phase drng crcut bt D mplfer Phase B capactor bank Phase B drng crcut bt D mplfer Phase capactor bank Phase drng crcut bt D mplfer Three phase load Sc. Res. Essays V.T B VB B V.T.T V V.T.T V.T N VGT VGT VGT VGT VGT VT VT VT VT VT U UB U UB U V D D D D D D D D V IN NVRT R dfferentator /rectfer() Sample/hold crcut V R dfferentator /rectfer() V Zerocrossng detector() K K*V V Zerocrossng detector() V nalogue dfferentator Phase trggerng crcut B VGT VGT VGT VGT VGT VT VT VT VT VT U UB U UB UD VB D VB D D IN D D D D D NVRT R dfferentator /rectfer() Sample/hold crcut VB R dfferentator /rectfer() VB Zerocrossng detector() KB K*VB VB Zerocrossng detector() VB nalogue dfferentator Phase B trggerng crcut VGT VGT VGT VGT VGT VT VT VT VT VT U UB U UB UD V D D D D D D D NVRT D V IN R dfferentator /rectfer() Sample/hold crcut V R dfferentator /rectfer() V Zerocrossng detector() K K*V V Zerocrossng detector() V nalogue dfferentator Phase trggerng crcut Fgure. The proposed threephase power factor correcton system scheme.

9 V V V GND S HFTB S HFTB RI HFTB N HFTB N HFTB urrent transformer V V FREQ = Hz VMP = V VOFF = Voltage transformer V oad mpedance V V V V V V V V V V SUB V V V Obas and Pasupulet K* V R U k Da/D R D BW V Zerocrossng detector() V U R n k T R D BW R dfferentator() K V U SD U T/T IN V nf V Sample/Hold crcut R k U T/T V V R k R VT R U N R VT R U N R VT R U N R VT R U N R VT R U N V R k V U Da/D U u Da/D nalogue dfferentator V V V V R U UB R n k Da/D D BW T R Zerocrossng detector() R dfferentator() R V.k U OP/D R k V mplfer QN Q R Q k k R R.k QN QN Q R Q k k R R.k QN QN Q R Q k k R R k QN QN Q R Q k k R R k QN QN Q R Q k k R R k QN R R k R k V V R k R k R k V V V V Da/D V R U Dbreak IN DB DB NVRT DB DB STTDB DB OVERDB DB REF V V bt D V U R k U OP/D V V R k V V V V V T U V R V DB T U U R n Da/D R V DB U R n Da/D UB T R V DB U R n Da/D U T R V DB U R n Da/D T R V UD DB U R n Da/D U R R T V.k Prcson comparators ogc crcut U V Da/D U V Da/D U V Da/D U V Da/D U V Da/D VT VT VT VT VT Output crcut VGT V T drng crcut V supply RVT k K* RVT k T drng crcut T S uf VGT V uf VGT T VGT V T drng crcut T drng crcut apactor bank drng crcut DT uf S uf VGT T DT uf S uf VGT T Bnary thyrstor swtchedcapactor bank DT uf S uf VGT T VGT V DT uf S uf VGT T DT VGT.mH R K RT. V T drng crcut apactor bank trggerng crcut Power crcut Fgure. The crcut dagram of the snglephase power factor correcton system. load operatng at a. laggng power factor and exhbtng balanced reacte current components of (peak alue). The compensator corrected the power factor to unty for the threephase load, snce the reacte current demands were wthn ts ratng. Fgure b concerns a balanced threephase nducte load exhbtng balanced reacte current components exceedng the compensator ratng, therefore the system was not capable to completely cancel the threephase reacte current components, but certanly had mproed the power factor. Fgure c shows the response of the threephase system to a threephase load balanced n magntude, but unbalanced n phase. Fnally, the compensator was completely relaxed whle t was dealng wth a balanced threephase real load as shown n Fgure d. oncluson The proposed snglephase and threephase automatc power factor correcton systems hae certan reacte

10 Sc. Res. Essays Fg. The crcut dagram of the threephase automatc power factor correcton system. Phase power crcut Phase B power crcut Phase power crcut supply Bnary thyrstor swtchedcapactor bank Bnary thyrstor swtchedcapactor bank T T T T T T T RVT k S HFTB DT S HFTB DT RI HFTB DT HFTB DT HFTB DT Implementaton = S HFTB N I S HFTB S HFTB VGT VGT VGT Implementaton = B S HFTB N VGT VGT VGT VGT S Voltage transformer urrent transformer supply supply.. RT RT T T T T T T RVT k RVT k DT DT N RI HFTB DT HFTB DT HFTB DT DT S Implementaton = RI HFTB DT K N HFTB DT HFTB DT DT N VGT VGT VGT S Voltage transformer N urrent transformer K VGT VGT VGT VGT Voltage transformer urrent transformer Bnary thyrstor swtchedcapactor bank. RT T T KB VGT V V V uf uf uf uf uf uf uf uf uf uf uf uf uf uf uf S S S S S S RVT k K* RVT k K*B RVT k K* S S S S S S S S S R uf uf uf uf uf uf uf uf uf uf oad mpedance RB R uf uf uf uf uf oad mpedance oad mpedance.mh.mh.mh B B B B Phase drng crcut Phase B drng crcut Phase drng crcut T drng crcut T drng crcut T drng crcut T drng crcut T drng crcut T drng crcut T drng crcut T drng crcut T drng crcut T drng crcut T drng crcut T drng crcut T drng crcut T drng crcut T drng crcut VGT V VGT V VGT V VGT V VGT V VGT V VGT V VGT V VGT V VGT V VGT V VGT V VGT V VGT V VGT V Q R.k R Q k QN Q R.k R Q k QN Q R k R Q k QN QN Q R k R Q k QN Q R.k R Q k QN Q R.k R Q k QN Q R k R Q k QN Q R k R Q k QN Q R k R Q k QN Q R.k R Q k QN Q R.k R Q k QN Q R k R Q k QN Q R k R Q k QN Q R k R Q k QN R Q k R k Q QN QN QN QN QN QN QN QN QN QN QN QN QN QN QN k R k R k R k R k R k R k R k R k R k R k R k R k R k R k R Fgure. The crcut dagram of the threephase power factor correcton system. N N N N N N N N N N N N N N N R R R R R R R R R R R R R R R U U U U U U U U U U U U U U U R R R R R R R R R R R R R R R VT VT VT VT VT VT VT VT VT VT VT VT VT VT VT Phase trggerng crcut Phase B trggerng crcut Phase trggerng crcut bt D Prcson comparators ogc crcut Output crcut bt D Prcson comparators ogc crcut Output crcut bt D Prcson comparators ogc crcut Output crcut U V Da/D U V Da/D U V Da/D.k.k.k V V V V VT VT VT V V V R R R R R R U T UB T U T V V V V U Da/D U Da/D U Da/D n n n R R R V U V Da/D U V Da/D U V Da/D V V DB DBB DB V V V V V V VT VT VT R R R R R V R R V V V V T UB T U T UD U Da/D U Da/D U Da/D IN DB DB NVRT DB DB STT DB DB OVER DB DB REF IN DB DB NVRT DB DB STT DB DB OVER DB DB REF n R GND n V GND n R R V V V R R DB DBB DB VB V V U V Da/D V U V Da/D V U V Da/D IN DB DB NVRT DB DB STT DB DB OVER DB DB REF GND R R R V V V VT VT VT U UD T U Dbreak U T U T VB U Da/D U Da/D U Da/D V Dbreak n n n R R R V V V V R k Dbreak R k DB DBB DB V U V V V V R k R k R R R V U V Da/D U V Da/D U V Da/D V V V OP/D R k R k V OP/D U Da/D VT U Da/D VT R k U Da/D VT n n n R UD T R U T R UB T R k OP/D V U R k V DB DBB DB V V V V U V V V R R R V V R k V V V U R k R k U V Da/D U V Da/D U V Da/D V U Da/D U Da/D U Da/D R k R k R R k R R VT VT R k V U Da/D VT n n n R k T U T UB T U V U Da/D V U Da/D R k DB DBB DB V V V R R R V V V R k V V V V VB V R k R k T U T UB T U V V V nalogue dfferentator Zerocrossng detector() R dfferentator() mplfer nalogue dfferentator Zerocrossng detector() R dfferentator() mplfer nalogue dfferentator Zerocrossng detector() R dfferentator() mplfer R k R k R k U V Da/D U V Da/D U V Da/D V V V R R R U V Da/D U V Da/D U V Da/D R V.k U V OP/D R V.k U V OP/D R V.k U V OP/D U Da/D U Da/D U Da/D D BW D BW D BW T T T u u u R R R V V V UD n UE n UF n k k k V V V R k R R k R R k R V VB V V V V V VB V V V V V VB V R k R k R k k R D BW Zerocrossng detector() R dfferentator() Sample/Hold crcut K*B V R U V VB k Da/D R D BW Zerocrossng detector() R dfferentator() Sample/Hold crcut k Da/D R D BW Zerocrossng detector() R dfferentator() Sample/Hold crcut V V V V V V R k R k R k R D BW R D BW R D BW T T T nf nf nf V V V U n UB n Da/D SUB U n SUB T/T SUB U V T/T U V T/T R k R k R k K KB K IN IN IN V V T/T V VB UB SD U U V R U V T/T V V V T/T V V R U U U K* U SD K* U SD V V V V V V V V

11 (Volt t),,, T (mp.) (Volt t),,, T (mp.) Obas and Pasupulet T o Z. o Z. T ms ms ms ms ms V(:) I() I(R) I(RVT) (a) ms ms ms ms ms V(:) I() I(R) I(RVT) (b) Fgure. (a) Unty power factor correcton, (b) power factor mproement. ac phase oltages V V B ac phase oltages V V B oad lne V ms ms ms ms V(V:PVS) V(B:) V(:) oad lne V ms ms ms ms V(R:) V(R:) B V(:) ms ms ms ms ompensator I(B) I() I() ac supply lne ac phase oltages B ms ms ms ms B I(R) I(R) I(R) ms ms ms ms I(R) I(R) a I(R) V B V ompensator ac supply lne ac phase oltages ms ms ms ms I() I(B) I() B ms ms ms ms I(R) I(R) I(R) B ms ms ms ms I(R) I(R) b I(R) V B V oad lne V ms ms ms ms B V(R:) V(R:) V(:) oad lne V ms ms B ms ms V(:) V(:) V(RVT:) ms ms ms ms ms ms ms ms ompensator I() I(B) I() I() I(B) I() ompensator B ac supply lne B ms ms ms ms B I(R) I(R) I(R) ms ms ms ms I(R) I(R) c I(R) ac supply lne ms ms ms ms I(R) I(R) I(R) B ms ms ms ms I(R) I(R) d I(R) Fgure. Performance of the threephase compensator durng (a) a balanced full load of. laggng power factor, (b) a balanced full load of. laggng power factor, (c) a full load balanced n magntude and unbalanced n phase, (d) a balanced full resste load.

12 Sc. Res. Essays current or reacte power ratngs. When the detected reacte power absorbed by the load s greater than the compensator ratng, the power factor wll not be corrected to unty, but certanly wll be mproed and the apparent power suppled by the ac supply wll be reduced. These systems respond almost lnearly throughout ther preassgned areas of operaton. They achee better power qualty by reducng the apparent power drawn from the ac supply and mnmzng the power transmsson losses. In addton, no harmoncs dsturbng the power system network are released, and hence no flterng s requred. The responses of both systems are settled down wthn the power system network fundamental cycle. There s a feasblty of utlzng ths technque for desgnng systems wth hgh oltage and current ratngs. Snce ths technque s not dealt wth accomplshng balanced threephase, the future work wll be extended to desgn an ntegrated system capable of acheng both power factor correcton and load balancng. REFERENES Best R, a Parra HZ (). Transent response of a statc Var shunt compensator. IEEE t Power Elect., ():. Bmal KB (). Power electroncs and motor dres. Elseer Inc. hen JH, ee WJ, hen MS (). Usng a statc Var compensator to balance a dstrbuton system. IEEE Ind. ppl., ():. Da D, S, Ma X, Tse K (). Slowscale nstablty of snglestage powerfactor correcton power supples. IEEE T rcuts Syst., ():. Gyugy, Otto R, Putman TH (). Prncples and applcatons of statc, thyrstorcontrolled shunt compensators. IEEE t Power ppl. Syst., PS:. Idrs RM, Kharuddn, Mustafa MW, Kalam (). Optmal allocaton of multtype FTS deces usng Bees lgorthm for T enhancement n deregulated power system, nt. re. Elect. Eng., ():. ee SY, Wu J (). Reacte power ompensaton and load balancng for unbalanced threephase four wre system by a combned system of an SV and a seres acte flter. IEE pelect Pow ppl., ():. upn JM, heneard, Peronnet J (). Energy effcency mproement through optmzaton of the power factor correcton. In: Proceed. th Int. onf. Elect. Dstr. Held Venna, pp.. Mehrdad M (). Sang through power qualty. In: Proceedng of the TwentySeenth Industral Energy Technology onference held at New Orleans, pp.. Mller TJ (). Reacte power ontrol n Electrc Systems. John Wlley & Sons. Nand S, Bswas P, Nandakumar V, Hegde R (). Two noel schemes sutable for statc swtchng of threephase deltaconnected capactor banks wth mnmum surge current. IEEE t Ind. ppl., ():. Rashd M (). Power electroncs handbook. cademc Press. Stahlkopf KE, Wlhelm MR (). Tghter controls for buser systems. IEEE Spectrum., ():. Teleke S, bdulahoc T, Thrnger T, Sensson J (). Dynamc performance comparson of synchronous condenser and SV. IEEE t Power Del., :. Walker (). Forcecommutated reacte power compensator. IEEE t Ind. ppl., I:.