Two s Compliment Negative integers are represented using two s compliment representation.
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1 Chapter 1 Data representation Binary numbers Base 2 numbers in which each binary digit is either a 0 or a 1 Ie b = 65d Integer storage sizes Unsigned Integers Signed Integers BYTE (1 byte) 0 to 255 (2 8 1) SBYTE -128 to 127 WORD (2 bytes) 0 to 65,535 (2 16 1) SWORD to (2 15 1) DWORD (4 bytes) 0 to (2 32 1) SDWORD to (2 31 1) QWORD (8 bytes) 0 to (2 64 1) SQWORD to (2 63 1) Hexadecimal numbers Base 16 numbers, each digit representing four binary bits. Ie. 7Ah = b = 90d Two s Compliment Negative integers are represented using two s compliment representation. Starting value Reverse the bits Add is the two s compliment Starting value Reverse Add 1 6A3D 95C2 95C2 is the two s compliment Boolean Operators NOT The NOT operation reverses a Boolean value. AND The output is only true when both operands are true. Otherwise, it is false. OR The output is false only when both operands are false.
2 Chapter 2 Basic Microcomputer Design The central processing unit (CPU) is where all the calculations and logic operations take place. It contains a limited number of storage locations called registers, a high-frequency clock, a control unit, and an arithmetic logic unit. The clock synchronizes the internal operations of the CPU. The control unit (CU) coordinates the sequencing of steps involved in executing machine instructions. The arithmetic logic unit (ALU) performs arithmetic operations such as addition and subtraction, and logical operations such as AND, OR, and NOT. A bus is a group of parallel wires that transfer data from part of the computer to another. The system bus of a computer usually consists of three different busses. The data bus transfers instructions and data between the CPU and memory. The control bus uses binary signals to synchronize the actions of all devices attached to the system bus. The address bus holds the addresses of instructions and data when the currently executing instruction transfers data between the CPU and memory. Instruction Execution Cycle The execution of a single machine instruction can be divided into a sequence of individual operations called the instruction execution cycle. Fetch: The control unit fetches the instruction, copying it from memory into the CPU and increments the program counter (a register containing the address of the next instruction about to be executed). Decode: The control unit determines the type of instruction to be executed. It passes zero or more operands to the arithmetic logic unit and sends signals to the ALU that indicate the type of operation to be performed. Fetch operands: If a memory operand is used, the control unit initiates a read operation to retrieve the input operand from memory. Execute: The ALU executes the instruction, sends its data to the output operand, and updates status flags providing information about the output. Store output operand: If the output operand is in memory, the control unit initiates a write operation to store the data. Pipelines The processor can execute the steps in parallel, a technique known as pipelining. The IA- 32 processor is a pipelined processor with a six-stage execution cycle. 1. Bus Interface Unit (BIU): accesses memory and provides input-output. 2. Code Prefetch Unit: receives machine instructions from the BIU and inserts them into a holding area named the instruction queue.
3 3. Instruction Decode Unit: decodes machine instructions from the prefetch queue and translates them into microcode. 4. Execution Unit: executes the microcode instructions produced by the instruction decode unit. 5. Segment Unit: translates logical addresses to linear addresses and performs protection checks. 6. Paging Unit: translates linear addresses into physical addresses, performs page protection checks, and keeps a list of recently accessed pages. Stages Cycles S1 S2 S3 S4 S5 S6 Cycles Stages S1 S2 S3 S4 S5 S6 Non-pipelined execution Six-stage pipeline execution Cycles Stages exe S1 S2 S3 S4 S5 I-3 I-3 I-3 I-3 I-3 I-3 S6 I-3 Cycles Stages S4 S1 S2 S3 u v S5 S I-3 4 I-4 I-3 5 I-4 I-3 6 I-4 I-3 7 I-3 I-4 8 I-4 I-3 9 I-4 I-3 10 I-4 Wasted cycles Superscalar (two or more execution cycles)
4 Modes of Operation Protected Mode Protected mode is the native state of the processor, in which all instructions and features are available. Programs are given separate memory areas called segments. Used by Windows. 4 GB of addressable memory. Real-address Mode Used by MS-DOS. 1 MB of addressable memory. Only one program can run at a time. Uses 20-bit linear addresses ranging from 0 to FFFFF. 8000: = Virtual-8086 Mode A hybrid of protected and real-address mode where each program is given its own realaddress computer. Registers Registers are high-speed storage locations directly inside the CPU, designed to be accessed at much higher speed than conventional memory. 32-bit General-Purpose Registers EAX EBX ECX EDX EBP ESP ESI EDI 16-bit Segment Registers EFLAGS EIP CS SS DS ES FS GS
5 Specialized uses EAX accumulator ECX loop counter ESP addresses data on the stack ESI, EDI memory transfer instructions EBP extended frame pointer EIP instruction pointer Status flags Status flags reflect the outcomes of arithmetic and logical operations performed by the CPU. The carry flag (CF) is set when the result of an unsigned arithmetic operation is too large to fit into the destination. The overflow flag (OF) is set when the result of a signed arithmetic operation is too wide to fit into the destination. The sign flag (SF) is set when the result of an arithmetic or logical operation generates a negative result. The zero flag (ZF) is set when the result of an arithmetic or logical operation generates a result of zero. The auxiliary carry flag is set when an arithmetic operation causes a carry from bit 3 to bit 4 in an 8-bit operand. The parity flag sums the number of bits that are set in a number, and indicates whether the sum is odd or even. Chapter 3 Basic Elements of Assembly Language Integer constants An integer constant is made up of an optional leading sign, one or more digits, and an optional suffix character called a radix. The radix may be o H hexadecimal o D decimal o B binary o Etc A hexadecimal constant beginning with a letter must have a leading zero. Integer expressions An integer expression is a mathematical expression involving integer values and arithmetic operators. Example: 16 / 5 3
6 Character constants A character constant is a single character enclosed in either single or double quotes. Example: A d String constants A string constant is a string of characters enclosed in either single or double quotes. Example: I m going to ace this final Reserved words Assembly has a list of words called reserved words which have special meaning and can only be used in their correct context. Identifiers An identifier is a programmer-chosen name. It might identify a variable, a constant, a procedure, or a code label. Directives A directive is a command that is recognized and acted upon by the assembler. Directives are part of the assembler s syntax, but are not related to the Intel instruction set. Instructions An instruction is a statement that is executed by the processor at runtime after the program has been loaded into memory and started. An instruction has four basic parts: o Label (optional) o Instruction mnemonic (required) o Operand(s) (usually required) o Comment (optional) Program Template TITLE Program Template INCLUDE Irvine32.inc.data ; (insert variables here).code main PROC ; (insert executable instructions here) exit main ENDP
7 ; (insert additional procedures here) END main Defining Data Intrinsic data types BYTE, SBYTE (8-bit) WORD, SWORD (16-bit) DWORD, SDWORD (32-bit) FWORD (48-bit) QWORD (64-bit) TBYTE (80-bit) Data definition statement A data definition statement sets aside storage in memory for a variable and may optionally assign a name to the variable. Examples of defining data o Value1 BYTE A o Value2 SBYTE -100 o Value3 BYTE? ;uninitialized o List BYTE 10,20,30,40,50 o String BYTE Good day,0 o List BYTE DUP(0) ;20 bytes, all equal to zero Little endian order All data types larger than a byte store their individual bytes in reverse order. The least significant byte occurs at the first (lowest) memory address. val1 DWORD h
8 Symbolic constants A symbolic constant is created by associating an identifier (a symbol) and either an integer expression or some text. Equal-sign directive o The equal-sign directive associates a symbol name with an integer expression. o Syntax: name = expression o Example: COUNT = 500; mov al,count o When a program is assembled, all occurrences of name are replaced by expression during the assembler s pre-processor step. o Can be redefined any number of times. EQU directive o The EQU directive associates a symbolic name with either an integer expression or some arbitrary text. o Syntax: name EQU expression o Example: presskey EQU < Press any key to continue,0> ;at top, before.data o Can not be redefined later. TEXTEQU directive o A text macro. o Example: count TEXTEQU %(5*2) ;same as count TEXTEQU <10> o Can be redefined later in the program Chapter 4 Data Transfer MOV Instruction The MOV instruction copies data from a source operand to a destination operand. MOV destination, source MOVZX Copies the contents of the source operand into a destination operand and zeroextends the value to either 16 or 32 bits. MOVSX Copies the contents of a source operand into a destination operand and signextends the value to either 16 or 32 bits. XCHG Exchanges the contents of two operands
9 Addition and Subtraction INC and DEC Adds 1 or subtracts 1 ADD Adds a source operand to a destination operand of the same size. SUB Subtracts a source operand from a destination operand. NEG Reverses the sign of a number by converting it to its two s compliment Data-related Operators The OFFSET operator returns the distance of a variable from the beginning of its enclosing segment. The PTR operator lets you override a variable s default size. The TYPE operator returns the size (in bytes) of each element in an array. The LENGTHOF operator returns the number of elements in an array. The SIZEOF operator returns the number of bytes used by an array initializer. Indirect Addressing MOV esi, OFFSET array MOV al, [esi] INC esi MOV al, [esi] JMP and LOOP JMP The JMP instruction causes an unconditional transfer to a target location inside the code segment. The location must be identified by a code label, which is translated by the assembler into an address. JMP targetlabel LOOP The LOOP instruction provides a simple way to repeat a block of statements a specific number of times. ECX is automatically used as a counter and is decremented each time the loop repeats. LOOP destination
10 Chapter 5 Select Procedures from Irvine32.inc DumpMem MOV esi, OFFSET array MOV ecx, LENGTHOF array MOV ebx, TYPE array call DumpMem All Read procedures save to EAX, AX, or AL. ReadString MOV edx, OFFSET string MOV ecx, (SIZEOF string) 1 call ReadString MOV bytecount, eax SetTextColor MOV eax, white + (blue *16) ;white on blue call SetTextColor All Write procedures output from EAX, AX, or AL. WriteString MOV edx, OFFSET prompt call WriteString Stack Operations PUSH A 32-bit PUSH operation decrements the stack pointer (ESP) by 4 and copies a value into the location in the stack pointed to by the stack pointer. There is also a 16-bit version. POP A POP operation removes a value from the stack and places it in a register or variable. PUSHFD, POPFD Pushes or pops from EFLAGS.
11 PUSHAD, PUSHA, POPAD, POPA The PUSHAD instruction pushes all of the 32-bit general-purpose registers on the stack. The POPAD instruction pops the same registers off the stack in reverse order. The PUSHA instruction pushes the 16-bit registers on the stack. The POPA instruction pops the same registers. Procedures PROC directive A procedure is a named block of statements that ends in a return statement. Example: o Sample PROC o o ret o sample ENDP CALL and RET The CALL instruction calls a procedure by directing the processor to begin execution at a new memory location. The procedure uses a RET instruction to bring the processor back to the point in the program where the procedure was called. Local Labels and Global Labels A code label (followed by a single colon) has a local scope, making it visible only to statements inside its enclosing procedure. A global label allows control to be transferred to labels outside the current procedure. To do this, follow the label name with two colons. USES Operator The USES operator, coupled with the PROC directive, lets you list the names of all the registers modified within a procedure. The procedure saves the registers to the stack before the procedure runs, then restores them afterwards.
12 Chapter 6 AND The AND instruction performs a Boolean (bitwise) AND operation between each pair of matching bits in two operands and places the result in the destination operand. AND destination, source If both bits equal 1, the result bit is 1; otherwise, it is 0. The AND instruction always clears the Overflow and Carry flags. It modifies the Sign, Zero, and Parity flags according to the value of the destination operand. OR The OR instruction performs a Boolean OR operation between each pair of matching bits in two operands and places the result in the destination operand. OR destination, source The OR instruction always clears the Carry and Overflow flags. It modifies the Sign, Zero, and Parity flags according to the value of the destination operand. XOR The XOR instruction performs a Boolean exclusive-or operation between each pair of matching bits in two operands, and stores the result in the destination operand. XOR destination, source The XOR instruction always clears the Overflow and Carry flags. It modifies the Sign, Zero, and Parity flags according to the value of the destination operand. NOT The NOT instruction toggles all bits in an operand. No flags are affected by the NOT instruction. TEST The TEST instruction performs an implied AND operation between each pair of matching bits in two operands and sets the flags accordingly. The only difference between TEST and AND is that TEST does not modify the destination operand. CMP The CMP instruction performs an implied subtraction of a source operand from a destination operand. Neither operand is modified. The CMP instruction changes the Overflow, Sign, Zero, Auxiliary Carry, and Parity flags according to the value the destination operand would have had if the SUB instruction were used. STC sets the carry flag CLC clears the carry flag
13 Conditional Jumps Jumps Based on Specific Flag Values JZ Jump if zero ZF = 1 JNZ Jump if not zero ZF = 0 JC Jump if carry CF = 1 JNC Jump if not carry CF = 0 JO Jump if overflow OF = 1 JNO Jump if not overflow OF = 0 JS Jump if signed SF = 1 JNS Jump if not signed SF = 0 JP Jump if parity PF = 1 JNP Jump if not parity PF = 0 Jumps Based on Equality JE Jump if equal JNE Jump if not equal JCXZ Jump if CX = 0 JECXZ Jump if ECX = 0 Jumps Based on Unsigned Comparisons JA JNBE JAE JNB JB JNAE JBE JNA Jumps Based on Signed Comparisons JG JNLE JGE JNL JL JNGE JLE JNG Jump if above Jump if not below or equal Jump if above or equal Jump if not below Jump if below Jump if not above or equal Jump if below or equal Jump if not above Jump if greater Jump if not less than or equal Jump if greater than or equal Jump if not less Jump if less Jump if not greater than or equal Jump if less than or equal Jump if not greater
14 Conditional Loops LOOPZ and LOOPE The LOOPZ instruction permits a loop to continue while the Zero flag is set and the unsigned value of ECX is greater than zero. The LOOPE (loop if equal) instruction is equivalent to LOOPZ. LOOPNZ and LOOPNE The LOOPNZ instruction permits a loop to continue while the unsigned value of ECX is greater than zero and the Zero flag is clear. The LOOPNE (loop if not equal) instruction is equivalent. Chapter 7 Shift and Rotate Instructions SHL The SHL instruction performs a logical left shift on the destination operand, filling the lowest bit with 0. The highest bit is moved to the Carry flag, and the bit that was in the Carry flag is lost. SHL destination, count SHR The SHR instruction performs a logical right shift on the destination operand, replacing the highest bit with a 0. The lowest bit is copied to the Carry flag, and the bit that was in the Carry flag is lost. SAL and SAR SAL (shift arithmetic left) is identical to the SHL instruction. The SAR instruction performs a right arithmetic shift on its destination operand. Rather than 0 placed in the first bit, a 0 or 1 is put there, depending on the sign of the operand. ROL The ROL instruction shifts each bit to the left. The highest bit is copied both into the Carry flag and into the lowest bit. ROR The ROR instruction shifts each bit to the right. The lowest bit is copied into the Carry flag and into the highest bit at the same time. RCL The RCL instruction shifts each bit to the left, copies the Carry flag to the least significant bit, and copies the most significant bit to the Carry flag. Think of the Carry flag as just an extra bit added to the high end of the number.
15 RCR The RCR instruction shifts each bit to the right, copies the Carry flag into the most significant bit, and copies the least significant bit into the Carry flag. SHLD The SHLD (shift left double) instruction shifts a destination operand a given number of bits to the left. The bit positions opened up by the shift are filled by the most significant bits of the source operand. The source operand is not affected, but the Sign, Zero, Auxiliary, Parity, and Carry flags are affected. SHRD The SHRD (shift right double) instruction shifts a destination operand a given number of bits to the right. The bit positions opened up by the shift are filled by the least significant bits of the source operand. Multiplication and Division Instructions MUL The MUL (unsigned multiplication) instruction multiplies an 8-, 16-, or 32-bit operand by either AL, AX, or EAX. AL r/m8 AX AX r/m16 DX:AX EAX r/m32 EDX:EAX The MUL instruction sets Carry and Overflow flags if the upper half of the product is not equal to zero. IMUL The IMUL instruction performs signed integer multiplication. IMUL sets the Carry and Overflow flags if the high-order product is not a sign extension of the low-order product. DIV The DIV (unsigned divide) instruction performs 8-bit, 16-bit, and 32-bit division on unsigned integers. Quotient Remainder AX r/m8 AL AH DX:AX r/m16 AX DX EDX:EAX r/m32 EAX EDX IDIV The IDIV (signed divide) instruction performs signed integer division. For both DIV and IDIV, all the arithmetic status flags are undefined after the operation.
16 Extended Addition and Subtraction ADC The ADC (add with carry) instruction adds both a source operand and the contents of the Carry flag to a destination operand. SBB The SBB (subtract with borrow) instruction subtracts both a source operand and the value of the Carry flag from a destination operand. Chapter 8 Local Variables A local variable is a variable that is created, used, and destroyed within a single procedure. LOCAL directive The LOCAL directive declares one or more local variables inside a procedure. It must be placed on the line immediately following a PROC directive. LOCAL varname:byte, var2:dword Stack Parameters INVOKE directive The INVOKE directive is a more powerful replacement for Intel s CALL instruction that lets you pass multiple arguments. ADDR operator The ADDR operator can be used to pass a pointer when calling a procedure with the INVOKE directive. INVOKE fillarray, ADDR myarray PROC directive The PROC directive permits you to declare a procedure name with a list of named parameters. PROTO directive The PROTO directive creates a prototype for an existing procedure. A prototype declares a procedure s name and parameter list. It allows you to call a procedure before defining it.
17 PROTO mysub INVOKE mysub mysub PROC mysub ENDP Stack Frames The stack frame is the area of the stack set aside for a procedure s return address, passed parameters, any saved registers, and local variables. Chapter 10 Structures A structure is a template or pattern given to a logically related group of variables. The individual variables in the structure are called fields. Program statements can access the structure as a single entity, or they can access individual fields. Coord STRUCT X WORD? Y WORD? Coord ENDS Point Coord <5,10> TYPE Point.X ; 2 Unions Whereas each field in a structure has an offset relative to the first byte of the structure, all the fields in a union start at the same offset. The field declarations in a union follow the same rules as for structures, except that each field can have only a single initializer. Macros A macro procedure is a named block of assembly language statements. Newline MACRO Call crlf ENDM Invoking macros Macroname arg1, arg2
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