a FEATURES Low V OS : 75 V Max Low V OS Drift: 1. V/ C Max Ultra-Stable vs. Time: 1.5 V/Month Max Low Noise:.6 V p-p Max Wide Input Voltage Range: 1 V Wide Supply Voltage Range: V to 18 V Fits 75,18A/8A, 71, AD51 Sockets 15 C Temperature-Tested Dice APPLICATIONS Wireless Base Station Control Circuits Optical Network Control Circuits Instrumentation Sensors and Controls Thermocouples RTDs Strain Bridges Shunt Current Measurements Precision Filters GENERAL DESCRIPTION The OP7 has very low input offset voltage (75 µv max for OP7E) which is obtained by trimming at the wafer stage. These low offset voltages generally eliminate any need for external nulling. The OP7 also features low input bias current (± na for OP7E) and high open-loop gain ( V/mV for OP7E). The low offsets and high open-loop gain make the OP7 particularly useful for high-gain instrumentation applications. The wide input voltage range of ±1 V minimum combined with high CMRR of 16 db (OP7E) and high input impedace provides high accuracy in the noninverting circuit configuration. Excellent linearity and gain accuracy can be maintained even at Ultralow Offset Voltage Operational Amplifiers OP7 PIN CONNECTIONS Epoxy Mini-Dip (P-Suffix) 8-Pin SO (S-Suffix) V OS TRIM 1 IN +IN V OP7 NC = NO CONNECT 8 V OS TRIM 7 V+ 6 OUT 5 NC high closed-loop gains. Stability of offsets and gain with time or variations in temperature is excellent. The accuracy and stability of the OP7, even at high gain, combined with the freedom from external nulling have made the OP7 an industry standard for instrumentation applications. The OP7 is available in two standard performance grades. The OP7E is specified for operation over the C to 7 C range, and OP7C over the C to +85 C temperature range. The OP7 is available in epoxy 8-lead Mini-DIP and 8-lead SOIC. It is a direct replacement for 75,18A, and OP5 amplifiers; 71-types may be directly replaced by removing the 71 s nulling potentiometer. For improved specifications, see the OP177 or OP1177. For ceramic DIP and TO-99 packages and standard micro circuit (SMD) versions, see the OP77. Figure 1. Simplified Schematic Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 916, Norwood, MA 6-916, U.S.A. Tel: 781/9-7 www.analog.com Fax: 781/6-87 Analog Devices, Inc.,
OP7 SPECIFICATIONS OP7E ELECTRICAL CHARACTERISTICS Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage 1 V OS 75 µv Long-Term V OS Stability V OS /Time. 1.5 µv/mo Input Offset Current I OS.5.8 na Input Bias Current I B ± 1. ±. na Input Noise Voltage e n p-p.1 Hz to 1 Hz.5.6 µv p-p Input Noise Voltage Density e n f O = 1 Hz 1. 18. nv Hz f O = 1 Hz 1. 1. nv Hz f O = 1 khz 9.6 11. nv Hz Input Noise Current I n p-p 1 pa p-p Input Noise Current Density I n f O = 1 Hz..8 pa Hz f O = 1 Hz.1. pa Hz f O = 1 khz.1.17 pa Hz Input Resistance Differential Mode R IN 15 5 mω Input Resistance Common-Mode R INCM 16 GΩ Input Voltage Range IVR ± 1 ± 1 V Common-Mode Rejection Ratio CMRR V CM = ± 1 V 16 1 db Power Supply Rejection Ratio PSRR V S = ± V to ±18 V 5 µv/v Large-Signal Voltage Gain A VO R L kω, V O = ±1 V 5 V/mV R L 5 Ω, V O = ±.5 V, V S = ± V 15 V/mV OUTPUT CHARACTERISTICS Output Voltage Swing V O R L 1 kω ±1.5 ± 1. V R L kω ±1. ± 1.8 V R L 1 kω ±1.5 ± 1. V DYNAMIC PERFORMANCE Slew Rate SR R L kω.1. V/µs Closed-Loop Bandwidth BW A VOL = 1 5..6 MHz Closed-Loop Output Resistance R O V O =, I O = 6 Ω Power Consumption P d V S = ±15 V, No Load 75 1 mw V S = ±1 V, No Load 6 mw Offset Adjustment Range R P = kω ± mv NOTES 1 Input offset voltage measurements are performed by automated test equipment approximately.5 seconds after application of power. Long-term input offset voltage stability refers to the averaged trend time of VOS vs. Time over extended periods after the first days of operation. Excluding the initial hour of operation, changes in VOS during the first operating days are typically.5 µv refer to the typical performance curves. Parameter is sample tested. Sample tested. Guaranteed by design. 5 Guaranteed but not tested. Specifications subject to change without notice. (V S = 15 V,, unless otherwise noted.)
OP7C ELECTRICAL CHARACTERISTICS OP7 Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage 1 V OS 6 15 µv Long-Term V OS Stability V OS /Time.. µv/mo Input Offset Current I OS.8 6. na Input Bias Current I B ± 1.8 ± 7. na Input Noise Voltage e n p-p.1 Hz to 1 Hz.8.65 µv p-p Input Noise Voltage Density e n f O = 1 Hz 1.5. nv Hz f O = 1 Hz 1. 1.5 nv Hz f O = 1 khz 9.8 11.5 nv Hz Input Noise Current I n p-p 15 5 pa p-p Input Noise Current Density I n f O = 1 Hz.5.9 pa Hz f O = 1 Hz.15.7 pa Hz f O = 1 khz.1.18 pa Hz Input Resistance- Differential Mode R IN 8 mω Input Resistance- Common-Mode R INCM 1 GΩ Input Voltage Range IVR ± 1 ± 1 V Common-Mode Rejection Ratio CMRR V CM = ± 1 V 1 1 db Power Supply Rejection Ratio PSRR V S = ± V to ±18 V 7 µv/v Large-Signal Voltage Gain A VO R L kω, V O = ±1 V 1 V/mV R L 5 Ω, V O = ±.5 V, V S = ± V 1 V/mV OUTPUT CHARACTERISTICS Output Voltage Swing V O R L 1 kω ±1. ± 1. V R L kω ±11.5 ± 1.8 V R L 1 kω ±1. V DYNAMIC PERFORMANCE Slew Rate SR R L kω.1. V/µs Closed-Loop Bandwidth BW A VOL = 1 5..6 MHz Closed-Loop Output Resistance R O V O =, I O = 6 Ω Power Consumption P d V S = ±15 V, No Load 8 15 mw V S = ±1 V, No Load 8 mw Offset Adjustment Range R P = kω ± mv NOTES 1 Input offset voltage measurements are performed by automated test equipment approximately.5 seconds after application of power. Long-term input offset voltage stability refers to the averaged trend time of VOS vs. Time over extended periods after the first days of operation. Excluding the initial hour of operation, changes in VOS during the first operating days are typically.5 µv refer to the typical performance curves. Parameter is sample tested. Sample tested. Guaranteed by design. 5 Guaranteed but not tested. Specifications subject to change without notice. (V S = 15 V,, unless otherwise noted.)
OP7 SPECIFICATIONS OP7E ELECTRICAL CHARACTERISTICS Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage 1 V OS 5 1 µv Voltage Drift without External Trim TCV OS. 1. µv/ C Voltage Drift with External Trim TCV OSN R P = kω. 1. µv/ C Input Offset Current I OS.9 5. na Input Offset Current Drift TCI OS 8 5 pa/ C Input Bias Current I B ± 1.5 ±5.5 na Input Bias Current Drift TCI B 1 5 pa/ C Input Voltage Range IVR ±1 ± 1.5 V Common-Mode Rejection Ratio CMRR V CM = ±1 V 1 1 db Power Supply Rejection Ratio PSRR V S = ± V to ± 18 V 7 µv/v Large-Signal Voltage Gain A VO R L kω, V O = ± 1 V 18 5 V/mV OUTPUT CHARACTERISTICS Output Voltage Swing V O R L 1 kω ±1 ± 1.6 V NOTES 1 Input offset voltage measurements are performed by automated test equipment approximately.5 seconds after application of power. Guaranteed by design. Sample tested. Specifications subject to change without notice. OP7C ELECTRICAL CHARACTERISTICS (V S = 15 V, C T A 7 C, unless otherwise noted.) Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Input Offset Voltage 1 V OS 85 5 µv Voltage Drift without External Trim TCV OS.5 1.8 µv/ C Voltage Drift with External Trim TCV OSN R P = kω. 1.8 µv/ C Input Offset Current I OS 1.6 8. na Input Offset Current Drift TCI OS 1 5 pa/ C Input Bias Current I B ±. ±9. na Input Bias Current Drift TCI B 18 5 pa/ C Input Voltage Range IVR ±1 ± 1.5 V Common-Mode Rejection Ratio CMRR V CM = ±1 V 97 1 db Power Supply Rejection Ratio PSRR V S = ± V to ± 18 V 1 51 µv/v Large-Signal Voltage Gain A VO R L kω, V O = ± 1 V 1 V/mV OUTPUT CHARACTERISTICS Output Voltage Swing V O R L 1 kω ±11 ± 1.6 V NOTES 1 Input offset voltage measurements are performed by automated test equipment approximately.5 seconds after application of power. Guaranteed by design. Sample tested. Specifications subject to change without notice. (V S = 15 V, C T A 85 C, unless otherwise noted.)
OP7 ABSOLUTE MAXIMUM RATINGS* Supply Voltage (V S )............................ ± V Input Voltage*................................ ± V Differential Input Voltage....................... ± V Output Short-Circuit Duration................ Indefinite Storage Temperature Range S, P Packages...................... 65 C to +15 C Operating Temperature Range OP7E............................... C to 7 C OP7C............................ C to +85 C Junction Temperature Range..................... 15 C Lead Temperature Range (Soldering, 6 sec)........ C *For supply voltages less than ± V, the absolute maximum input voltage is equal to the supply voltage. Package Type JA * JC Units 8-Lead Plastic DIP (P) 1 C/W 8-Lead SOIC (S) 158 C/W * JA is specified for worst case conditions, i.e., JA is specified for device in socket for P-DIP package, JA is specified for device soldered to printed circuit board for SO package. ORDERING GUIDE Temperature Package Package Branding Model Range Description Option Information OP7EP C to 7 C 8-Lead Epoxy DIP P-8 OP7CP C to 85 C 8-Lead Epoxy DIP P-8 OP7CS C to 85 C 8-Lead SOIC S-8 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP7 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE 5
OP7 Typical Performance Characteristics OPEN-LOOP GAIN V/mV 1 8 6 ABSOLUTE CHANGE IN INPUT OFFSET VOLTAGE V 5 15 1 5, T A = 7 C THERMAL SHOCK RESPONSE BAND DEVICE IMMERSED IN 7 C OIL BATH ABSOLUTE CHANGE IN INPUT OFFSET VOLTAGE V 5 15 1 5 OP7C OP7E 5 5 TEMPERATURE C 1 6 8 1 TIME s 1 5 TIME AFTER SUPPLY TURN-ON Minutes TPC 1. Open-Loop Gain vs. Temperature TPC. Offset Voltage Change Due to Thermal Shock TPC. Warm-Up Drift MAXIMUM ERROR REFERRED TO INPUT mv 1..8.6.. OP7C OP7E 1 1k 1k 1k MATCHED OR UNMATCHED SOURCE RESISTANCE TPC. Maximum Error vs. Source Resistance MAXIMUM ERROR REFERRED TO INPUT mv 1. 1..8.6.. C T A 7 C OP7C OP7E 1 1k 1k 1k MATCHED OR UNMATCHED SOURCE RESISTANCE TPC 5. Maximum Error vs. Source Resistance NON-INVERTING INPUT BIAS CURRENT ma 1 1 AT V DIFF < 1.V. I B < 7nA (OP7C) 1 1 DIFFERENTIAL INPUT VALUE V TPC 6. Input Bias Current vs. Differential Input Voltage INPUT BIAS CURRENT na 1 OP7C OP7E INPUT OFFSET CURRENT na.5. 1.5 1..5 OP7C OP7E VOLTAGE nv/div REFERRED TO INPUT 5mV/CM AT OUTPUT 5 5 TEMPERATURE C 1 5 5 1 TEMPERATURE C TIME 1s/DIV TPC 7. Input Bias Current vs. Temperature TPC 8. Input Offset Current vs. Temperature TPC 9. Low Frequency Noise 6
OP7 INPUT NOISE VOLTAGE nv/ Hz 1 1 1 R S1 = R S = K THERMAL NOISE SOURCE RESISTORS INCLUDED EXCLUDED R S = 1. 1. 1 1 1k TPC 1. Total Input Noise Voltage vs. Frequency RMS NOISE V 1 1.1 1. 1 1 1k TPC 11. Input Wideband Noise vs Bandwidth (.1 Hz to Frequency Indicated) CMRR db 1 OP7 1 OP7C 11 1 9 8 7 6 1. 1 1 1k 1k 1k FREQUENCY HZ TPC 1. CMRR vs. Frequency CMRR db 1 1 11 1 9 8 7 OP7C OP7 OPEN-LOOP GAIN V/mV 1 8 6 OPEN-LOOP GAIN db 1 8 6 1. 1 1 1k 1k 1k FREQUENCY HZ TPC 1. PSRR vs. Frequency 5 1 15 POWER SUPPLY VOLTAGE V TPC 1. Open-Loop Gain vs Power Supply Voltage.1 1 1 1 1k 1k 1k 1M 1M TPC 15. Open-Loop Frequency Response CLOSED-LOOP GAIN db 1 8 6 1 1 1k 1k 1k 1M 1M TPC 16. Closed-Loop Response for Various Gain Configurations PEAK-TO-PEAK AMPLITUDE V 8 16 1 8 1k 1k 1k TPC 17. Maximum Output Swing vs. Frequency 1M ABSOLUTE VALUE OF OFFSET VOLTAGE V 15 1 5 V IN = 1mV POSITIVE SWING NEGATIVE SWING 1 1k 1k LOAD RESISTANCE TO GROUND TPC 18. Maximum Output Voltage vs. Load Resistance 7
OP7 INPUT NOISE VOLTAGE nv/ Hz 1 1 1 V IN (PIN ) = +1mV, V O = 15V V IN (PIN ) = 1mV, V O = +15V 1. 6 TPC 19. Power Consumption vs. Power Supply INPUT NOISE VOLTAGE nv/ Hz 1 1 1 V IN (PIN ) = +1mV, V O = 15V V IN (PIN ) = 1mV, V O = +15V 1. 6 TPC. Output Short-Circuit Current vs. Time ABSOLUTE VALUE OF OFFSET VOLTAGE V 1 R S = 1 5 5 TEMPERATURE C OP7C OP7E 1 TPC 1. Untrimmed Offset Voltage vs. Temperature ABSOLUTE VALUE OF OFFSET VOLTAGE V 1 V OS TRIMMED TO < 5 V AT 5 C NULLING POT = k OP7C OP7E 5 5 TEMPERATURE C OP7C OP7E 1 TOTAL DRIFT WITH TIME V 16 1 8 8 1. V/mo. TREND LINE. V/mo. TREND LINE. V/mo. TREND LINE. V/mo. TREND LINE. V/mo. TREND LINE. V/mo. TREND LINE 16 1 5 6 7 8 9 1 11 1 TIME Months TPC. Trimmed Offset Voltage vs. Temperature TPC. Offset Voltage Stability vs. Time 8
OP7 R IN 7 V+ V 6 OP7C A1 R5 1k R k R 1k SUM MODE BIAS RF 7 V+ V E RF O = E IN I BIAS RF 6 E O AD7115 OR AD851A E IN 1V 1k R 1k 7 V+ FD D1 6 OP7 FD D V R 1k R 1k R5 1k 7 V+ V 6 V TO 1V OP7 = R R R E O Figure. Typical Offset Voltage Test Circuit Figure 5. Burn-In circuit E 1 1k R 1k +15V E R 1k 7 E R 1k R5.5k 15V 6 OP7C E O Figure. Typical Low-Frequency Noise Circuit R Figure 6. High-Speed, Low VOS Composite Amplifier SENDING JUNCTION V+ E 7 6 E O REFERENCE JUNCTION R OP7 R V = R R R Figure. Optional Offset Nulling Circuit Figure 7. Adjustment-Free Precision Summing Amplifier 9
OP7 TYPICAL APPLICATIONS APPLICATIONS INFORMATION OP7 series units may be substituted directly into 75, 18A/ 8A* and OP5 sockets with or without removal of external compensation or nulling components. Additionally, the OP7 may be used in unnulled 71 type sockets. However, if conventional 71 nulling circuitry is in use, it should be modified or removed to enable proper OP7 operation. OP7 offset voltage may be nulled to zero through use of a potentiometer (see offset nulling circuit diagram). PRECISION ABSOLUTE-VALUE CIRCUIT The OP7 provides stable operation with load capacitance of up to 5 pf and ± 1 V swings; larger capacitances should be decoupled with a 5 Q decoupling resistor. Figure 8. High-Stability Thermocouple Amplifier Stray thermoelectric voltages generated by dissimilar metals at the contacts to the input terminals can degrade drift performance. Therefore, best operation will be obtained when both input contacts are maintained at the same temperature, preferably close to the package temperature. *TO-99 Package only Figure 9. Precision Absolute-Value Circuit 1
OP7 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead SO DIP (S-Suffix).1968 (5.).189 (.8).157 (.).197 (.8) 8 5 1. (6.).8 (5.8) PIN 1.98 (.5). (.1) SEATING PLANE.5 (1.7) BSC.19 (.9).18 (.5).688 (1.75).5 (1.5).98 (.5).75 (.19) 8.196 (.5) 5.99 (.5).5 (1.7).16 (.1) Revision History Location Page Data Sheet changed from REV. to. Edits to FEATURES..................................................................................... 1 Edits to ORDERING GUIDE.............................................................................. 1 Edits to PIN CONNECTION drawings...................................................................... 1 Edits to ABSOLUTE MAXIMUM RATINGS................................................................. Deleted ELECTRICAL CHARACTERISTICS.............................................................. Deleted OP7D Column from ELECTRICAL CHARACTERISTICS............................................ 5 Edits to TPCs........................................................................................ 7 9 Edits to HIGH-SPEED, LOW V OS COMPOSITE AMPLIFIER................................................... 9 11
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