Capture/Compare/Pulse Width Modulation (CCP) Programming Hi Hsiao-Lung Chan Dept Electrical Engineering Chang Gung University, Taiwan chanhl@mail.cgu.edu.twcgu
CCP1 control register 2
CCP high and low registers CCP pins 3
Compare mode Match occurs when the content of Timer1 (or Timer3) is equal to CCPR1H:CCPR1L. CCP1 pin perform one of the following actions Toggle the CCP1 pin Drive high the CCP1 pin Drive low the CCP1 pin Remain unaffected but generate software interrupt Trigger a special event with a hardware interrupt and clear the timer 4
Compare mode operation 5
PIR1 (Peripheral interrupt flag register1) containing CCP1IF flag 6
Timer1 Set interrupt flag TMR1IF on overflow CCP Special Event Trigger TMR1H TMR1L TMR1ON T1SYNC T1OSO/T1CKI T1OSCEN T1OSI Fosc/4 T0PS1:T0PS0 TMR1CS 7
Timer3 block diagram Set interrupt flag TMR3IF on overflow CCP Special Trigger Fosc/4 T3CKPS1:T3CKPS0 8
T3CON (Timer 3 control) register 9
A 1-Hz pulse is fed into Timer3 pin. Toggle LED every 10 pulses using CCP Compare mode MOVLW 0x02 ; Compare mode, toggle on match MOVWF CCP1CON MOVLW 0x42 ; Timer3 for compare mode, no prescale MOVWF T3CON BCF TRISC, CCP1 ; CCP1 pin as output BSF TRISC, TCKI ; T3 CLK pin as input MOVLW D 10 MOVWF CCPR1L MOVLW 0x0 MOVWF CCPR1H OVER CLRF TMR3H CLRF TMR3L BCF PIR1, CCP1IF BSF T3CON, TMR3ON ; start Timer3 B1 BTFSS PIR1, CCP1IF BRA B1 BCF T3CON, TMR3ON ; stop Timer3 GOTO OVER 10
T1CON (Timer 1 Control) Register 11
Generate a square wave with a 40 ms period and 50% duty cycle on CCP1 pin if XTAL = 10 MHz MOVLW 0x02 ; Compare mode, toggle on match MOVWF CCP1CON MOVLW 0x0 ; Use Timer1 for compare mode MOVWF T3CON MOVLW 00 0x0 ; Timer1, internal clock, no prescale MOVWF T1CON BCF TRISC, CCP1 ; CCP1 pin as output MOVLW MOVWF MOVLW 0C3 0xC3 CCPR1H 0x50 ; 20 ms / 0.4 s = 50,000 = 0xC350 MOVWF CCPR1L OVER CLRF TMR1H CLRF TMR1L BCF PIR1, CCP1IF BSF T1CON, TMR1ON ; start Timer1 B1 BTFSS PIR1, CCP1IF ; monitor Timer1 flag BRA BCF GOTO B1 T1CON, TMR1ON ; stop Timer1 OVER 12
Capture mode An event at CCP pin cause the content of Timer1 (or Timer3) be loaded into CCPR1H:CCPR1L every falling-edge pulse every rising-edge pulse every 4 th rising-edge pulse every 16 th rising-edge pulse 13
Measure the period of a pulse 14
Measure the period of a pulse (cont.) MOVLW 0x05 ; Capture mode, rising edge MOVWF CCP1CON MOVLW 0x0 ; Timer1 for capture MOVWF T3CON MOVLW 0x0 ; Timer1, internal clock, no prescale MOVWF T1CON CLRF TRISB CLRF TRISD BSF TRISC, CCP1 ; CCP1 pin as input 15
Measure the period of a pulse (cont.) OVER CLRF TMR1H CLRF TMR1L BCF PIR1, CCP1IF RE_1 BTFSS PIR1, CCP1IF BRA RE_1 BSF T1CON, TM13ON ; start Timer1 RE_2 BTFSS PIR1, CCP1IF BRA RE_2 BCF T1CON, TM13ON ; stop Timer1 MOVFF TMR1L, PORTB MOVFF TMR1H, PORTD GOTO OVER 16
Measure pulse width Pulse-width-modulated (PWM) output A fixed frequency and variable duty cycle MAX6666/6667 temperature sensors from Maxim Corp. Output is a square wave with a frequency of 35 Hz at 25 0 C Temperature ( 0 C) = 235 (400 x t1) / t2 17
Measure pulse width (cont.) FLAG EQU 0x10 ; flag register DISP EQU 0x0 ; flag for capture complete RF EQU 0x1 ; flag for rising or falling edge ORG 0x0000 GOTO MAIN ORG 0x0008 BTFSC PIR1, CCP1IF ; Is it CCP1 interrupt? GOTO CCP_ISR RETFIE MAIN MOVLW 0x05 ; Capture mode, rising edge MOVWF CCP1CON MOVLW 0x0 ; Timer1 for capture MOVWF T3CON MOVLW 0x0 ; Timer1, internal clock, no prescale MOVWF T1CON 18
Measure the period of a pulse (cont.) CLRF TRISB CLRF TRISD BSF TRISC, CCP1 ; CCP1 pin as input BSF PIE1, CCP1IE ; enable CCP1 interrupt BSF INTCON, PEIE ; enable peripheral interrupt BSF INTCON, GIE ; enable global interrupt BCF PIR1, CCP1IF OVER CLRF TMR1H CLRF TMR1L WAIT BTFSS FLAG, DISP ; Is capture complete? BRA WAIT BCF FLAG, DISP ; clear DISP flag for next capture MOVLW 0x03 SUBWF TMR1L, F ; subtract the overhead MOVFF MOVFF GOTO TMR1L, PORTB TMR1H, PORTD OVER 19
Measure the period of a pulse (cont.) CCP_ISR BTFSS FLAG, RF ; Is it rising edge GOTO RISE_ISR GOTO FALL_ISR RISE_ISR ISR BSF T1CON, TM13ON ; start Timer1 BSF FLAG, RF ; ready for falling edge BCF CCP1CON, 0 ; detect falling edge BCF PIR1, CCP1IF ; clear interrupt RETFIE FALL_ ISR BCF T1CON, TM1ON ; stop Timer1 BSF FLAG, DISP ; capture complete BCF FLAG, RF ; ready for rising edge BSF CCP1CON, 0 ; detect rising edge BCF PIR1, CCP1IF ; clear interrupt RETFIE 20
PWM mode Create pulses with variable widths DC motor control CCP module uses Timer2 21
PWM mode operation 22
Set the period and duty cycle of PWM Period of PWM Tpwm = (PR2 + 1) x 4 x Tosc x N (N: prescaler of 1, 4, or 16) Duty cycle of PWM DC1B1 DC1B0 Decimal points 0 0 0 0 1 0.25 1 0 0.5 1 1 0.75 Ex1. PR2 = 50 and 20% duty cycle 50*20%= 10 8-bit CCPR1L = 10 and 2-bit of DC1B1:0=00 00001010.00 Ex1. PR2 = 50 and 25% duty cycle 50*25%= 12.5 8-bit CCPR1L = 12 and 2-bit of DC1B1:0=00 00001100.10 23
Timer2 block diagram 8-bit timer Set interrupt flag TMR2IF Fosc/4 T2CKPS1:T2CKPS0 TOUTPS3:TOUTPS0 CCP Special Event Trigger 24
T2CON (Timer2 Control) register 25
Create a 2.5 khz PWM with a 75% duty cycle CLRF CCP1CON MOVLW D 249 MOVWF PR2 MOVLW D 186 ; 75% duty cycle MOVWF CCPR1L BCF TRISC, CCP1 ; make PWM pin an output MOVLW 0x01 ; Timer2, 4 prescale, no postscaler MOVWF T2CON MOVLW 0x3C ; PWM mode, 11 for DC1B1:B0 MOVWF CCP1CON CLRF TMR2 BSF T2CON, TMR2ON ; start Timer2 AGAIN BCF PIR1, TMR2IF ; clear Timer2 flag OVER BTFSS PIR1, TMR2IF ; wait for the end of period BRA OVER GOTO AGAIN 26
Reference M.A. Mazidi, R.D. Mckinlay, D Causey, PIC Microcontroller and Embedded Systems Using Assembly and C for PIC18, Pearson Education Inc., 2008. 27