1/22/16. You Tube Video. Definitions. Duty Cycle: on-time per period (specified in per cent)

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1 Definition Pulse Width Modulation (PWM) is simply a way of getting the micro-controller to manage pulsing a pin on and off at a set period and duty cycle. The LPC11U24 has four timers with four match registers each that can be used to create a PWM output on a pin. The period is the inverse of frequency of the pulses and the duty cycle is the ratio of the on time vs. off time. Using a timer or a PWM peripheral of a micro-controller has the benefitof not needing software intervention to toggle the pin, freeing the software to execute less time critical tasks. The PWM output can be used for a variety of things including dimming an LED, controlling motor speed, or setting a servo s position. 2 1

2 You Tube Video 3 Definitions Duty Cycle: on-time per period (specified in per cent) 4 2

3 Types of Pulse Width Pulse center fixed, edges modulated Leading edge fixed, tailing edge modulated Trailing edge fixed, leading edge modulated Pulse width constant, period modulated 5 Types of Pulse Width 6 3

4 Applications to DC Motors The average voltage supplied to a DC motor is proportional to the duty cycle. Both brushed and brushless motors can be used with PWM. Both analog and digital control techniques and components are available. 7 Advantages of PWM Average value proportional to duty cycle. Fast switching possible due to MOSFETS and power transistors at speeds in excess of 100 khz. Digital signal is resistant to noise. Less heat dissipated versus using resistors for intermediate voltage values. 8 4

5 Applications of PWM Motor control. Electric stove heater. Lamp dimmers. Voltage regulation convert 12 volts to 5 volts by having a 41.7% duty cycle. Sound production: PWM controlled signals give sound effects similar to a chorus. Power transfer: PWM used to reduce the total power given to a load without relying on resistive losses. 9 Average Value in PWM Low-pass filter smooths out transients from harmonic effects. 10 5

6 PWM Used to Transmit Data Clock signal is found inside PWM signal. More resistant to noise effects than binary data alone. Effective at data transmission over long distances. 11 Frequency of the PWM Signal Lower Limits Upper Limits 1. Must be at least 10 times higher than the control system frequency. 2. Higher than 20kHz audible frequency of sounds to avoid annoying sound disturbances, caused by magnetostriction. 3. If too low the motor is pulsed, not continuous, because the motor s inductance can not maintain the current. 4. Inverse of frequency should be much less than the motor/load time constant. 5. Higher error from ripple voltages. 1. If too high the inductance of the motor causes the current drawn to be unstable. 2. MOSFET transistor generates heat during switching. 3. Limited by resolution of controller. 4. Eddy currents generated in electromagnetic coils which lead to adverse heating. 5. Heat losses in electromagnetic materials is proportional to frequency squared. 12 6

7 1/22/16 Where can I Buy a PWM Controller? Texas Instruments Digikey Mouser Electronics Critical Velocity Motor Control SMALL Texas Instruments TAS5508B 8-Channel Digital Audio PWM Processor 64 pin chip, max 192 khz frequency $ khz frequency Continuous 28 amps $ amps, used for hybrid vehicles $ H U G E 13 PWM Module Each channel has a dedicated counter Programmable duty and period Independently adjustable clock, polarity, and alignment 14 7

8 PWM Module - Other Features 16-bit and 32-bit resolution supported Two PWM channels can be concatenated together Four source clocks (A, SA, B, SB) Emergency Shutdown Some changes take a complete cycle to be implemented Modes of Operation: Normal: everything is available Wait: Low-power consumption and clock disabled Freeze: Option to disable clock is available 15 PWM Enable Register Located at $00E0 Code Warrior variable: PWME Set PWMEx to 0 to disable the channel Set PWMEx to 1 to enable it Channel is activated when bit is set If 16-bit resolution used, then PWME4/2/0 are deactivated 16 8

9 PWM Polarity Register Located at $00E1 Code Warrior variable : PWMPOL Set PPOLx to 0, signal goes from low to high Set PPOLx to 1, signal goes from high to low 17 PWM Clock Select Register Located at $00E2 Code Warrior variable : PWMCLK Set PCLK5/4/1/0 to 0 to use clock A Set PCLK5/4/1/0 to 1 to use clock SA Set PCLK3/2 to 0 to use clock B Set PCLK3/2 to 1 to use clock SB 18 9

10 PWM Prescaler Register Located at $00E3 Variable: PWMPRCLK Used to prescale clocks A and B Presclarer = Bus Clock Frequency ( Resolution ) ( PWM Frequency) Bus Clock Frequency = N (2 1) ( PWM Frequency) 19 PWM Scale A Register Located at $00E8 Code Warrior variable: PWMSCLA Store a hexadecimal value in order to change the clock frequency of SA Note: if set to $00, PWMSCLA is set to 256 Clock A Frequency Clock SA Frequency = 2 PWMSCLA 20 10

11 PWM Scale B Register Located at $00E9 Code Warrior variable: PWMSCLB Store a hexadecimal value in order to change the clock frequency of SA Note: if set to $00, PWMSCLB is set to 256 Clock B Frequency Clock SB Frequency = 2 PWMSCLB 21 PWM Center Align Register Located at $00E4 Code Warrior variable: PWMCAE Set CAEx to 0 for left align signal Set CAEx to 1 for center align signal Note: can only be set when channel is disabled 22 11

12 Signal Alignment Signal changes when counter is equal to period register In the center aligned mode, the PWM counter goes from a down-count to a up-count to down-count, etc. In the left aligned mode, the PWM counter is a up-counter and rests to zero when it overflows 23 PWM Control Register Located at $00E5 Code Warrior variable: PWMCTL Set CONxy to 0 to keep PWM channels separate (8-bit) Set CONxy to 1 to concatenate PWM channels x and y together (16- bit). Channel y determines the configuration x becomes the high byte and y becomes the low byte Bits PSWAI and PFRZ set either wait or freeze mode Changes only occur when channels are disabled 24 12

13 PWM Counter Register Located at $00EC through $00F1 Code Warrior variable: PWMCNTx One per channel It tracks the cycle counts It can be read If written to, the count is reset to $00 and a up-count starts 25 PWM Period Register Located at $00F2 through $00F7 Variable: PWMPERx Store a hexadecimal value to limit maximum value of counter Changes occur when: Current period ends Counter is written to Channel is disabled Left-Aligned: PWM Source Frequency PWMPERx = PWM Signal Frequency Center-Aligned: PWM Source Frequency PWMPERx = 2 PWM Signal Frequency 26 13

14 PWM Duty Register Located at $00F8 through $00FD Code Warrior variable: PWMDTYx Store a hexadecimal value to control when signal changes Changes occur when: Current period ends Counter written to Channel is disabled Duty Cycle PWMPERx Polarity = 0: PWMDTYx = PWMPERx Duty Cycle PWMPERx Polarity = 1: PWMDTYx = PWM Shutdown Register Located at $00FE Code Warrior variable: PWMSDN PWMENA: Enables and disables emergency shut down PWMIF (Interrupt flag): Set when an input is detected in pin 5 PWMIE (Interrupt Enable): Enables and disables CPU interrupts PWMRSTRT: Resets the counters PWMLVL (Shutdown Output Level): Determines if output is high or low when shutdown PWM5IN (Input Status): Reflects status of pin 5 PWM5INL: Determines active level of pin

15 How it all works Clock A, SA, B, or SB 29 Example Desired Signal: 8 khz PWM signal Duty Cycle of 30% Left Aligned Channel 1 Low High 8-bit channel Prescaler = 8 3 (2 1) ( 8 10 ) = PWMPRCLK = $ PWMPER1 = = = 250 $FA PWMDTY1 = = 175 $AF 100 PWMCLK = $00 PWMCAE = $00 PWMPOL = $00 PWMCTL = $00 PWME = $