Numerical and exerimental study on surge current limitations of wire-bonded ower diodes Thomas Hunger 1, Oliver Schilling 1, Frank Wolter 1 nfineon Technologies AG, Max-Planck-Straße 5, 5581 Warstein, Germany nfineon Technologies AG, Am Cameon 1-1, 8557 Neubiberg, Germany Abstract Forward surge currents are considered both exerimentally and numerically for wire bonded silicon free wheeling diodes. Measurements indicate that the destruction threshold is not given by the onset of intrinsic conductivity. nstead the failure signature indicates a urely temerature driven destruction mechanism caused by the limited ruggedness of the front side contact against excessive heating. The deendence of the surge current limit on ulse width is investigated for different diode tyes both exerimentally and in theoretical models. The transient thermal behaviour is imortant for a quantitative analysis of the surge current leading to a good understanding of exerimental data. A simle analytical formula for the maximum surge current is derived. The failure mode is studied in more detail via a finite element simulation. Finally the influence of higher junction temeratures on the surge current is discussed. 1 ntroduction The ability of silicon ower diodes to withstand a raid forward current load is an imortant criterion that has to be regarded in the selection of the roer device for a ower electronic alication. The ossible failure mechanisms and the hysics that dominate the regime of high surge current densities have been discussed for Si and SiC diodes [1,]: n general it has to be taken into account that the current-voltage (-V) characteristic can be drastically influenced by the deendence of mobility µ and intrinsic carrier concentration n i on temerature when certain current densities are exceeded. An analysis of the -V characteristic for tyical wire bonded Si-diodes is art of this work to differentiate whether the regime of strong µ(t) or n i (T) deendence has to be regarded (µ: mobility, n i : intrinsic carrier concentration). Further secific focus is laid uon the influence of ulse width on the surge current caability. Historically, diodes have been emloyed in assive inut rectifier circuits rior to their extensive use as free wheeling diodes (FWDs) in inverter stages. n a rectifier circuit the time deendence of on-state current is closely linked to the frequency f=5hz of the suly voltage. Therefore 1ms sinusoidal half wave ulses are tyically alied to characterise the surge current caability. But there are working conditions that demand other ulse durations t P. f the 1⅔ Hz ower line used in railway ower suly is considered t P =ms may occur at the inut rectifier. Furthermore a rectifying action of the FWDs may also haen if energy is regenerated from the motor through the inverter into the DC link caacity at frequencies below 5Hz giving rise to t P ~1ms. On the other hand short current ulses have to be withstood by the diodes if the energy in the DC link caacitor discharges during a bridge short circuit. The circuit consisting of the stray inductances and the caacitance of the inverter gives rise to damed current oscillations characterised by small ulse widths far below 1ms. We focus our research on fast silicon in diodes (nfineon EmCon TM technology) usually used as FWD in standard GBT modules. The aer is organized as follows. First, exerimental results are discussed. Tyical failure signatures are shown. Then a scaling of all datasets onto a single curve is discussed based on considerations of thermal imedance. Finite element simulations are erformed to analyse the microscoic failure mechanism leading to the observed failure signatures. Surge current exeriments The surge current is usually measured via halfsine-current of a certain ulse length t P. Mostly, t P =1ms from a transferred 5Hz line is used. Fig. 1 and show tyical -V characteristics taken for a succession of ulses.
14 Current [a.u.] 1 1 8 4 (b) (c) (d) (a) 4 8 1 1 14 Vf [V] Fig. 1 -V characteristics of 1ms half sine ulses subsequently taken at different eak currents (curves (a) (d)). Curve (d) is slightly above the destruction threshold, the red curve far above the destruction. 1 1 (a) Vf 5 1 (c) 5 1 1 1 (b) 5 1 (d) 5 1 Fig. Time deendencies of the current and the forward voltage V f for the ulses (a) (d) of fig. 1. The curves (a) (c) in fig. 1 deict -V curves which are tyical for diodes both in the u- and downward branch of the sinusoidal current. This is also observable in fig. where the time deendencies of the current and the forward voltage dro V f are shown. Curve (d), however, shows deviations between the branches in fig. 1. This is seen in fig. as a deviation of V(t) from the sinusoidal behaviour. The measured on-state characteristics at high current density do not show signs of current limitation by µ(t) as reorted by Silber and Robertson [1] for the case of diodes with full surface contact. This indicates that the failure mechanisms of the secific wired bonded FWDs under investigation are not based on µ(t) or n i (T)- deendence. The wire bonded FWDs seem to be destroyed at an earlier stage. A closer understanding of the destruction mode is gathered by taking the failure signature into account. A FWD after destruction is shown in fig.. Fig. Failure signature of a FWD destroyed by a surge current overload. There are molten areas located around the bond wedges (red arrows). The failure signature indicates a local heating u to the destruction of the aluminium metallization layer. Possibly, the underlying silicon diffuses into the aluminium and vice versa and hence sike formation occurs. The destruction of the uer n junction is a consequence. ndeed, the loss of the blocking caability is the most sensitive indicator to determine the destruction threshold during surge current exeriments. The failure signatures oint to a thermal limitation of the surge current caability. Therefore, we consider the amount of energy E alied to the silicon E = P( t') dt' = V ( t') ( t') dt' (1) during a surge ulse. We assume a linear -V characteristic V ( t) = V + R ( t) () Furthermore, we neglect V and, by using the current, obtain t) = sin( πt / t ) ( π E = R ²( t') dt' = R t () E = ρ V c T (ρ Assuming that the energy is the mass density, c the secific heat) is stored in a certain volume V we get a temerature increase T t = const. (4) n eqn. (4) the constant value reresents the critical temerature rise which will destroy the device irreversibly. From this oint of view ²t should be indeendent of the ulse witdh t. n fig. 4 we lot ²t as a function of t taken with different diode tyes. The main difference between the diode tyes is their blocking voltage and hence the silicon die thickness. As it is clearly visible, the surge current integral ²t decreases with shorter ulse length in contrast to the rediction of eqn. (4). For the exlanation
heat conduction has to be taken into consideration. ²t [a.u.] 1 1 1 1 Tye A Tye B Tye C,1 1 1 1 t_ [ms] Fig. 4 The exerimentally determined surge current integral ²t as a function of the ulse width t for three different diode tyes. The lines serve only as a guide. Analytical aroach to the thermal limitation of surge currents The simle aroach leading to ²t=const. does not reflect the real transient thermal behaviour which is dominated by both thermal conduction and the heating of thermal caacities. The thermal imedance Z th is defined by means of the equation for the temerature rise T T ( t) = Z th ( t) P (5) for a ste function P = P Θ( t). () To be able to aly eqn. (5) the ulse ower of a sinusoidal current (see eqn. (1) and ()) is aroximated as an effective square ulse with a temerature indeendent resistance R: E π P = = R = R eff (7) t Based on the assumtion of equal destruction temeratures, eqn. (5) and (7) finally result in a simle formula for the deendence of eak current on ulse duration t : ( t ) Z th (1ms) =. (8) (1ms) Z th ( t ) The eak current of a ulse t deends only on the square root of the ratio of its thermal imedance value with resect to a reference ulse (here 1 ms). Fig. 5 shows the exerimental data from fig. 4 normalized to their 1ms values together with scaling curves according to eqn. (8) based on Z th simulations. The datasets for all diode tyes under investigation scale onto one single curve. That means the surge current of all diodes is limited by the same hysical mechanism. The square root behaviour redicted by eqn. (8) is also lotted in fig. 4 assuming two different models for the underlying Z th calculation (Z th1, Z th ). The thermal imedance curves are comuted via a finite element aroach because of the lack of reliable exerimental Z th -data on such short time scales. Zth1 is calculated under the assumtion of a homogeneous ower loss in the diode volume whereas a ower loss only at the diode surface was used for Zth. _(t_) / _(1ms) 1, 1,,1 Tye A Tye B Tye C Tye D Zth1 Zth,1 1 1 1 t_ [ms] Fig. 5 Normalized eak currents for different diode tyes. All data fall onto a single curve. Zth1 and Zth are calculated according to eqn. (8) based on two different Zth models. For ulse times t > 5ms the data are very well fitted by the curve labelled Zth1. Only towards shorter times the scaling underestimates the surge caability. The scaling redicted by the curve marked Zth (ower generation at die surface) deviates stronger comared to the Zth1 -grah. This is due to the difference in temerature increases T if both rinciles are comared, i.e. heat creation in a finite volume (case 1) and the heat transort in a semi-infinite slab with ower generation only at the surface (case ) []. Case 1 ( T t ) leads to a stronger deendence of temerature rise on time than case ( T t ). Hence, the sloe of the thermal imedance of case 1 is steeer. Therefore, Zth1 describes the exerimental data better than Zth esecially for short ulse durations as can be seen in fig. 5. From the comarison between exeriment and theory we conclude that for short heating times in the order of <1ms the Z th is not sufficiently described by a surface load condition, but the instantaneous dissiation of ower in a finite volume ( body load-condition ) has to be regarded. For very short ulse durations a saturation of ²t is exected since the body-load condition corresonds to the assumtions of eqn. (4). The reason for the remaining deviation between the exerimental data and the thermal imedance scaling at short times can be discussed as follows. The dynamics of the aluminium sike formation is governed by the interdiffusion of sili-
con and aluminium. This diffusion is strongly temerature deendent. But temerature alone is not sufficient since the ulse time and thus the diffusion time is also of imortance. Therefore, the thermal imedance scaling, which is based only on the temerature argument, underestimates the actual surge current limit for short ulse durations because there is not enough time for a sufficient siking. To summarize this aragrah we highlight that the ulse width deendent surge current caability of the wire bonded FWDs can be described by their thermal imedance behaviour. Eqn. (8) can be used for aroximating surge current limits for varying ulse widths if the 1ms ²t value and the correct Z th (t) curve is known in the resective time frame. The aroximation yields a lower bound for short ulse durations. However, it has to be ointed out, that the analysis based on the thermal imedance is not sufficient to exlain the mechanism of destruction in detail since it will only rovide an estimation of the average temerature rise. D modelling is necessary to understand the mechanism leading to the tyical failure fingerrint as deicted in fig.. The material models describing the heat conductivity, heat caacity and electrical resistivity of the comonents coer, aluminium, ceramic (Al O ) and solder include temerature deendencies. 4.1 Descrition of diode model ANSYS as a multi-urose finite element simulator does not rovide the caability of solving the drift-diffusion equations for a full descrition of the semiconducting device. The method to simulate a surge current load in forward direction is described below. The diode is oerated in a condition of strong injection. Hence, the drift region is flooded by free carriers. A resistivity value can be formally defined under these conditions. To differentiate between the drift region and the region in which the on-state voltage is strongly influenced by the diffusion voltage of the n-junction the diode is slit into two searate layers similar to the SPCE nodes in refs. [5,], namely anode-middle and middle-cathode. The uer volume contains the + anode and the + n - -junction. The drift region and the backward n - n-junction form the lower volume element as sketched in fig. 7. 4 Finite element simulations Comutations based on a finite element scheme are executed to investigate the failure mechanism in detail. The commercially available simulator ANSYS [4] is used for the numerical solution of the couled thermal-electric field. Fig. shows the model setu. t consists of a diode mounted by a soldering layer onto a ceramic substrate with double sided coer layers. The substrate itself is soldered to a coer base late, which is fixed to a heat sink. The diode s surface metallization is connected to an emitter track via one aluminium bond wire. Fig. Geometry and finite element mesh of the device simulated consisting of a diode body together with a bond wire and a substrate soldered to a base late and a heat sink. Fig. 7 Diode cross section. The nodes anode, middle and cathode are indicated. The layers of the + n - and the n - n junctions are marked acting as additional heat sources. The temerature deendent -V characteristics of both segments are then simlified further on via a linearization according to V (, T ) = V ( T ) + RD ( T ) () The current nodes for determining R D from the - V curves are chosen at one tenth of and at nominal current. The arameter V (T) is now identified with the voltage dro at the junction itself. n the simulation it accounts for an additional source of the heat density according to ( T ) = V ( T ) j / t, (1) with j the current density and t the thickness of the junction. The arameter R D (T) is transferred into a resistivity as ρ = R D ( T ) A / D, (11) A is the area of the volume and D its thickness. This aroach is reasonable because the wirebonded diodes fail rior to reaching the µ or even n i limits as shown in revious sections.
4. Simulation results Fig. 8 shows snashots taken at different times during a simulation run for =17A and t =1ms. The areas in the vicinity of the bond wedge get hottest during the sinusoidal current ulse. This corresonds very well to the failure signature shown in fig. where the molten aluminium is located around the wedge. the whole wedge area is heated. Here the simulation oints out the bond wire itself as the hottest art. This is not surrising as one comes closer to the DC limits. All the ulses t <1ms are limited by the temerature swing of diode s metallization. For shorter ulse widths a stronger localization of the hot sots near the wedge is observable. Fig. 8 Snashots of temerature distribution taken at t=.5t,.5t,.75t and t during the simulation for =17A and t =1ms. The area around the bond wedge shows the highest temerature during the ulse. T [ C] 7 5 4 1 near wedge below wedge below diode below solder =17A, t =1ms 4 8 1 Fig. Temeratures taken at different locations as a function of time. near wedge refers to a osition beside the wedge on the metallization. The time-deendent temerature resonse taken at different locations is lotted in fig. ( =17A, t =1ms). Obviously the bond wire itself has a cooling imact on the surface if a 1ms ulse is concerned, since the hottest oint is always located some distance away from it. The comarison of the temerature distribution on the diode taken for different ulse durations t is shown in fig. 1. For long ulses (here 1ms) Fig. 1 Snashots of temerature distributions taken at t=.t for different ulse durations t. Significant differences are visible. _(t_) / _(1ms) 1 1,1 FEM result Zth,1 1 1 1 t_ [ms] Fig. 11 Normalized eak currents from the finite element simulation ( FEM result ) in comarison to the result based on the thermal imedance according to eqn. (8). Assuming that the failure can be described by equal temerature of the hot sot, the deendence of maximum surge current on ulse width can be derived from the finite element calculations. The result is given in fig. 11 together with the rediction exected from the thermal imedance model of eqn. (8). The finite simulation results resemble the scaled thermal imedance data for ulse durations t >5ms. The thermal imedance used here is comuted for the secific test diode with one bond wire. The deviations for
small ulse widths can be exlained by the high local temerature gradients which are of the order of the finite element mesh size used. Locally imroving the mesh near the wedge would enhance the match of the results. The comuted are too small comared to real exeriments. This is mainly due to too high R D values used in the current simulation. Another imrovement can be obtained by including the latent heat of the solder joint because the simulations suggest a solder temerature above the melting level. However, the basic simulation result of a correct resemblance of the failure signature would not be affected. 4. Extending limits Currently, efforts are made to increase the oeration temerature of GBT modules u to a maximum junction temerature T j =15 C. Therefore, the influence on the surge current caabilities of the diodes is exlained hereafter. Fig. 1 shows the temeratures for different starting levels of T c =15 C and 15 C under equal load conditions. The eak temeratures differ by nearly the amount of the starting difference. From that we get for a certain ulse width by alying eqn. (5) and (7): 1, 1 = T T,, (1) T i = T fail TC, i. (i=1,) Defining the uer temerature T fail as 5 C results in a surge current reduction in the range of 5 er cent which fits very well to exerimental findings. T [ C] 45 4 5 5 reference Tj 15 C 5µm Al NTV 15 =15A, t =1ms 1 4 8 1 Fig. 1 Temerature resonses taken for different simulation setus. reference : T c =15 C, 5µm Al metallization; Tj 15 C : T c =15 C; 5µm Al : T c =15 C, 5µm Al metallization; NTV : T c =15 C, µm silver as solder layer. Fig. 1 shows the imact of the to metallization on the surge current. The temerature is significantly lowered by increasing the thickness of the to metallization. This is mainly due to a reduced layer resistance and hence lower heating. However, the technological realization of such thick layers is a challenge. Another aroach is the exchange of the solder material (for standard simulation setu a 1µm thick Sn layer is alied) towards thinner layers and better heat conduction. Fig. 1 shows the temerature resonse at the to of the diode using a µm silver layer with reduced mass density for modelling of the low temerature sintered joint. Comared to the Sn solder a significant reduction is visible. 5 Conclusions This aer studies the surge current limitations of wire bonded silicon free wheeling diodes both exerimentally and numerically. An analytical formula describing the eak current limit for different ulse widths based on the thermal imedance is derived. t is useable for the determination of a lower bound for the actual. Finite element simulations are used for the study of the destruction mode. The temerature distribution found numerical corresonds to the exerimentally gathered failure signatures. Finally, the extension to higher oeration temeratures is discussed. Only a small reduction of in the range of 5 er cent is exected if starting conditions are lifted from 15 C to 15 C. Further technological levers for enhancing the surge current caability are discussed. Discussions with Peter Türkes are acknowledged. Literature [1] Silber, D. and Robertson, M.J.: Solid State Electr. 1 (17) 17-14 [] Udal, A. and Velmre, E.: Microelectr. Reliab. 1/11 (17) 171-174 [] Clemente, S.: EEE Trans. Power Electr. 8 (1) 7-41 [4] www.cadfem.de, www.ansys.com [5] Kraus, R. et al.: Proc. EEE. PESC 8, vol. (18) 17-171 [] Türkes, P.: riv. comm. Next we discuss ossible extensions of the surge current caabilities without changing the silicon of the in diodes itself. First we consider a thicker metallization layer on to of the diode.