AN-5082 Power56 Wave-Soldering Board Assembly Considerations

Similar documents
RoHS-Compliant Through-Hole VI Chip Soldering Recommendations

AND8464/D. Board Level Application Note for 0402, 0502 and 0603 DSN2 Packages APPLICATION NOTE

Edition Published by Infineon Technologies AG Munich, Germany 2013 Infineon Technologies AG All Rights Reserved.

PCB Quality Inspection. Student Manual

Solder Reflow Guide for Surface Mount Devices

Customer Service Note Lead Frame Package User Guidelines

Molded. By July. A chip scale. and Omega. Guidelines. layer on the silicon chip. of mold. aluminum or. Bottom view. Rev. 1.

Application Note. Soldering Methods and Procedures for 1st and 2nd Generation Power Modules. Overview. Analysis of a Good Solder Joint

Suggested PCB Land Pattern Designs for Leaded and Leadless Packages, and Surface Mount Guidelines for Leadless Packages

PCB Assembly Guidelines for Intersil Wafer Level Chip Scale Package Devices

Assembly of LPCC Packages AN-0001

Lead-free Wave Soldering Some Insight on How to Develop a Process that Works

PIN IN PASTE APPLICATION NOTE.

Technical Note Recommended Soldering Parameters

Wave Soldering Problems

How do you create a RoHS Compliancy-Lead-free Roadmap?

Application Note AN Discrete Power Quad Flat No-Lead (PQFN) Board Mounting Application Note

BGA - Ball Grid Array Inspection Workshop. Bob Willis leadfreesoldering.com

Flip Chip Package Qualification of RF-IC Packages

SURFACE MOUNT LED LAMP STANDARD BRIGHT 0606

Selective Soldering Defects and How to Prevent Them

Auditing Contract Manufacturing Processes

SURFACE FINISHING FOR PRINTED CIRCUIT BOARDS

Application Note AN Audio Power Quad Flat No-Lead (PQFN) Board Mounting Application Note

Antenna Part Number: FR05-S1-R-0-105

Mounting Instructions for SP4 Power Modules

Soldering Methods and Procedures for Vicor Power Modules

IPC DRM-SMT-F. Area Array Components Chip Components J-Lead Components Gull Wing Components Class 1 Class 2 Class 3 Photos

How to Build a Printed Circuit Board. Advanced Circuits Inc 2004

Good Boards = Results

Handling, soldering & mounting instructions

8-bit Atmel Microcontrollers. Application Note. Atmel AVR211: Wafer Level Chip Scale Packages

Fractus Compact Reach Xtend

Lead-free Defects in Reflow Soldering

Through-Hole Solder Joint Evaluation

Edition Published by Infineon Technologies AG Munich, Germany 2012 Infineon Technologies AG All Rights Reserved.

Bob Willis leadfreesoldering.com

Electronic Board Assembly

Application Note AN DirectFET Technology Inspection Application Note

JEDEC SOLID STATE TECHNOLOGY ASSOCIATION

CHAPTER 4 SOLDERING GUIDELINES AND SMD FOOTPRINT DESIGN. page. Introduction 4-2. Axial and radial leaded devices 4-2. Surface-mount devices 4-3

TN0991 Technical note

PCB Land Pattern Design and Surface Mount Guidelines for QFN Packages

IP4234CZ6. 1. Product profile. Single USB 2.0 ESD protection to IEC level General description. 1.2 Features. 1.

Quad Flat Package (QFP)

noclean Characterization of No-Clean Solder Paste Residues: The Relationship to In-Circuit Testing

PCB inspection is more important today than ever before!

Soldering of EconoPACK TM, EconoPIM TM, EconoBRIDGE TM, EconoPACK +, EconoDUAL, EasyPACK and EasyPIM TM - Modules

How To Fit A 2Mm Exposed Pad To A Dfn Package

Designing with High-Density BGA Packages for Altera Devices

Training & Reference Guide

JOHANSON DIELECTRICS INC Bledsoe Street, Sylmar, Ca Phone (818) Fax (818)

How to avoid Layout and Assembly got chas with advanced packages

Handling and Processing Details for Ceramic LEDs Application Note

1mm Flexible Printed Circuit (FPC) Connectors

Acceptability of Printed Circuit Board Assemblies

AN114. Scope. Safety. Materials H AND SOLDERING TUTORIAL FOR FINE PITCH QFP DEVICES. Optional. Required. 5. Solder flux - liquid type in dispenser

Soldering of SMD Film Capacitors in Practical Lead Free Processes

Soldering And Staking OEpic TOSA/ROSA Flex Circuits To PWBs.

Figure 1 (end) Application Specification provides application requirements for MICTOR Right Angle Connectors for SMT PC Board Applications

Surface mount reflow soldering

Application Specification Dual In- Line Memory Module (DIMM) Sockets- DDR2 Solder Tail 05 APR 11 Rev D

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

Specification for Electroless Nickel/ Electroless Palladium/ Immersion Gold (ENEPIG) Plating for Printed Circuit Boards

APPLICATION NOTE PCB Design and SMT Assembly/Rework Guidelines for MCM-L Packages

Polyimide labels for Printed Circuit Boards

WCAP-CSGP Ceramic Capacitors

Be the best. PCBA Design Guidelines and DFM Requirements. Glenn Miner Engineering Manager March 6, 2014 DFM DFT. DFx DFC DFQ

IPC-SM-840C. Qualification and Performance of Permanent Solder Mask IPC-SM-840C. The Institute for. Interconnecting. and Packaging Electronic Circuits

Processing of SMD LEDs Application note


Collin's Lab: Soldering

Cleanliness of Electronic PCB Assemblies Leads to Medical Device Reliability

Printed Circuits. Danilo Manstretta. microlab.unipv.it/ AA 2012/2013 Lezioni di Tecnologie e Materiali per l Elettronica

Electronics and Soldering Notes

Introduction to the Plastic Ball Grid Array (PBGA)

SMD Power Elements Design Guide. 50 A SMD Technology Small Size High Current

Surface Mount LEDs - Applications Application Note

DVD-PTH-E Through-Hole Solder Joint Workmanship Standards

DVD-111C Advanced Hand Soldering Techniques

What is surface mount?

Wafer Level Chip Scale Package (WLCSP)

Rework stations: Meeting the challenges of lead-free solders

Application Note AN-0994 Maximizing the Effectiveness of your SMD Assemblies

JEDEC SOLID STATE TECHNOLOGY ASSOCIATION

Medium power Schottky barrier single diode

Ball Grid Array (BGA) Technology

First Published in the ECWC 10 Conference at IPC Printed Circuits Expo, Apex and Designer Summit 2005, Anaheim, Calif., Feb.

BSP52T1 MEDIUM POWER NPN SILICON SURFACE MOUNT DARLINGTON TRANSISTOR

uclamp0541z Ultra Small μclamp 1-Line ESD Protection

17 IMPLEMENTATION OF LEAD-FREE SOLDERING TECHNOLOGY. Eva Kotrčová České Vysoké Učení Technické Fakulta Elektrotechnická Katedra Elektrotechnologie

Investigation of Components Attachment onto Low Temperature Flex Circuit

Component Candidacy of Second Side Reflow with Lead-Free Solder

Work Instruction SUPPLIER PRINTED CIRCUIT BOARD REQUIREMENTS

Q&A. Contract Manufacturing Q&A. Q&A for those involved in Contract Manufacturing using Nelco Electronic Materials

Lead-free Hand-soldering Ending the Nightmares

INTEGRATED CIRCUITS DATA SHEET. SAA digit LED-driver with I 2 C-Bus interface. Product specification File under Integrated Circuits, IC01

Solutions without Boundaries. PCB Surface Finishes. Todd Henninger, C.I.D. Sr. Field Applications Engineer Midwest Region

Lead Free Wave Soldering

Transcription:

www.fairchildsemi.com AN-5082 Power56 Wave-Soldering Board Assembly Considerations Introduction PQFN packages are commonly mounted on board through reflow process. The board mounting guidelines through reflow process for Fairchild s Power56 package is provided in a separte note AN-9036. In the industry today, wave soldering is also becoming a common large-scale soldering process in mounting components on boards. This application note provides guidelines on mounting the Power56 package through wave soldering. Recommendations on the land pad and stencil designs for adhesive printing are also included. Wave Soldering Process A typical wave soldering process is illustrated below Figure 1. is applied on the board and the components are mounted. The assembly is then subjected to high temperature environment to cure the adhesive. The board is then flipped so that the components are at the bottom side of the board as it goes through the wave soldering system. The system consists typically of solder fluxing, preheating zones, solder wave and the cooling zone. As the board enters the conveyorized process, solder flux is either sprayed or foamed into the components. Then goes to the preheating zones, normally by convection, where the flux is activated. The assembly then goes to wave soldering. The assembly is slowly cooled down after. Temperature settings in the wave soldering system are dependent on the recommendation of the solder flux vendor, the type of solder alloy used and the sensitivity of the components used to elevated temperature. PC Board Printing / Dispensing Component Placement Curing Pre-heating stage (Solder Flux Activation) 2 nd Wave (Laminar 1 st Wave (Turbulent Flow) Flow) Flux Application (Spray or Foaming) Board turn Figure 1. Typical Wave Soldering Process Flow Rev. 1.0 4/13/15

Assembly Consideration 3.91 In order to achieve a good wave soldering process for the Power56 package, the following factors must be taken into consideration: PCB Mask Configuration PCB Surface Finish PCB Land Pad Design and Layout Solder Flux Wave Soldering 4.87 1.27 1.77 7.61 Recommendations for the above-mentioned factors are detailed below. Board Mask Configuration The pad configuration of the board can either be Solder Mask Defined (SMD) or Non-Solder Mask Defined (NSMD). For wave soldering, any of the PCB mask configurations can be used. SMD pad, however, showed to have an added advantage over NSMD pads; the mask on top of the land can serve as an added spacer between the board pad and component, allowing more room for flux to flow and easy filling the space between the component bottom terminations and board with solder. Board Surface Finish Hot Air Surface Leveling (HASL) and Organic Solderability Preservatives (OSP) are two common board surface finishes used in the industry today. Both types of surface finish were tested and showed to be compatible for wave soldering the Power56 using the recommended land pattern is shown in Figure 2. In various land pattern options evaluated, it is observed that the wetting mechanism using OSP surface finish differs from HASL. Easy solder filling is observed in HASL than in OSP. This may be explained by the coalescence of molten solder and the molten HASL metallization. However, it is not uncommon for HASL to have inconsistent solder coating thickness which affects the leveling in board mounting in this type of package. Conversely, the OSP may be inferior in wetting compared to HASL but it is known to consistently produce thin coatings. In order to achieve proper wetting for OSP metal, a good choice of solder flux is necessary and it should be applied to where the solder needs to flow. The recommended land pad designs had been tested to be compatible for both types of surface finishes using a no-clean flux. Board Land Pad Design Below is the recommended land pad design for wave soldering the Power56. 1.49 1.27 3.81 Figure 2. Land Pattern Design for Power56 Wave Soldering (Dimensions are in millimeters) Conveyor direction during wave soldering Printed adhesives Land pad pattern Power56 Figure 3. Overlaid Power56 on the Board Land Pad and the Printed (Dimensions are in millimeters) In wave soldering, the land pad dimensions should be larger than the nominal package footprint dimensions. This is to allow the molten solder from the wave to have a path to flow through the land pad at the bottom of the package. Component orientation with respect to the direction of the equipment conveyor is critical for good soldering results. This is illustrated in Figure 3 above; the lead pads layout is aligned with the movement of the conveyor. This component orientation with respect to conveyor movement.61 Ø.50 Rev. 1.0 4/13/15 2

prevents formation of solder bridging, solder skipping or shadowing. In wave soldering Power56, the adhesive must be chosen appropriately to ensure that this will hold the component in place through the entire wave soldering process flow. It must be tacky enough and have sufficient volume after print that the component won t move or fall off during transport from component placement to cure. It must have good adhesion strength after cure to prevent it from falling off during the wave soldering process, from flux spray, to preheating and up to wave-soldering. The wet adhesive must also maintain its consistency in continuous printing or dispensing process. print for Power56 is shown in Figure 3. Printing the adhesive instead of dispensing is recommended to achieve better planarity and consistent volume. The amount of printed adhesive should be applied sufficiently. Too little adhesive may not be able to hold the component during placement and wave soldering. On the other hand, too much adhesive may spread up to the land pads during placement; this can cause solder non-wetting to the component leads and board pads. must be cured according to the curing conditions recommended by the supplier and it must be fully cured before wave soldering. The recommended stencil thickness for adhesive printing is 6mils. Solder Flux Flux selection is important in wave soldering. Solder flux with low solid content is preferred; because of its low viscosity, it can easily wick up solderable pads under the component, flowing under the narrow space in between the component and the board by capillary action, and facilitating solder wetting during wave soldering. This flux can either be applied by spray or foaming. On the other hand, flux with high solid content has its own advantage; it is more flexible to different wave soldering conditions because of its ability to hold the active components of the flux longer which facilitates solder wetting. No clean type solder flux is recommended. With the absence of standoff of the PQFN package and narrow spaces in between the component and the board, it is difficult to remove the trap solder residues in these areas in board cleaning, thus flux materials with low corrosive content is preferred. Wave Soldering A standard wave soldering machine usually consists of the fluxing zone, preheating zone, soldering zone and cleaning zone (cleaning would depend on the type of flux used). Preheat temperatures and the preheating time should be set according to the flux specification. Too high temperature and too long preheat time may break down the flux activation systems which causes shorts/icicles. On the other hand, too low preheat temperature may cause skips or unwanted residues left on the PCB. Dual wave soldering is becoming common in the industry. A typical dual wave soldering profile is shown in Figure 4. The 1 st wave which has turbulent wave crest ensures wetting of all the land pads allowing the molten solder to find its way to all joints on the PCB. The 2 nd wave, which has a laminar flow, drains the excess solder from the board after the 1 st wave thus removing the solder bridges. Solder bath temperature must consider the maximum temperature specified for the package (260 C). Wave soldering profile (preheat ramp rate, speed, peak temperature) would depend on the wave soldering equipment and the materials used. Figure 4. Typical Dual Wave Solder Profile Inspection of Wave Soldered Power56 Inspection of the mounted component should be done with the use of 10-20x magnification scope and transmission or laminograph x-ray. A well-reflowed solder joint shows evidence of wetting and adherence wherein the solder merges to the soldered surface forming a contact angle of 90. The solder joints should normally have a smooth appearance. On certain occasion, a matte, dull or grainy solder joints may appear, this can be due to the solder alloy used, the component termination or board pad surface finish, or the soldering process used. IPC- A-610 provides the inspection methodology and acceptance criteria for this package. For wave soldering process, the assembly is prone to solder bridging, skips, icicles and other solder joint defects. It is proper to set controls in inspecting the solder joints especially that the leads and drain are not exposed for PQFNs. Controls can be done visually and through x-ray inspection. Figure 5 shows the top and pin side view of the Power56 that has already been wave soldered on board. The solder coverage at the drain and flat pin areas of a soldered unit can t be inspected visually since it s not exposed. The appropriate control for this is through x-ray inspection of the solder coverage between the land pad and the solderable surfaces at the bottom of the component. Figure 6 is a typical x-ray image of the wave soldered Power56. X-ray inspection is also reliable to detect solder bridging and solder skips. Rev. 1.0 4/13/15 3

(a) (b) Figure 5. Wave Soldered Power56 (a) View from Top and (b) View from the Side Showing the Gate and Source Leads Figure 6. X-ray Image of a Wave Soldered Power56 Destructive inspection such as cross-sectioning may be performed for sample monitoring during development stage. With this, it can be verified whether there s a significant tilt of the mounted package due to adhesive print or wave soldering process. Solder Joint Power56 PCB Solder Joint Figure 7. Cross-Section of the Wave Soldered Power56 Rev. 1.0 4/13/15 4

References [1] FSC-QAR-0024, Guideline on the Methodology of Board Level Characterization [2] IPC2221, IPC standard, Generic Standard on Printed Board Design [3] Board-Level Evaluation of Power Qual Flat No-Lead (PQFN) Packages, Fairchild Semiconductor Power Seminar 2008-2009 white paper [4] IPC-TM-650, IPC Test Methods Manual, Solderability, Wave Solder Method [5] IPC/EIA J-STD-001, and EIA Joint Standard, Requirements for Soldered Electrical and Electronic Assemblies [6] IPC-A-610, IPC standard, Acceptability of Electronic Assemblies [7] IPC7351, IPC standard, Generic Requirements for Surface Mount Design and Land Pattern Standard [8] IPC9701, IPC standard, Performance Test Methods and Qualification Requirements for Surface Mount Solder Attachments [9] IPC/JEDEC J-STD-033, IPC and JEDEC Joint Standard, Handling, Packing, Shipping and Use of Moisture/Reflow Sensitive Surface Mount Devices [10] AN-9036, Fairchild Application Notes, Guidelines for Using Fairchild s Power56 DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Rev. 1.0 4/13/15 5