Evaluation Board for AD9/AD9/ AD9 Clock Distribution ICs AD9/PCB, AD9/PCB, AD9/PCB EVALUATION BOARD DESCRIPTION This data sheet describes the evaluation board for the AD9, AD9, and AD9 clock distribution ICs. To properly use the evaluation board, please also reference the current data sheet for the appropriate part. The current data sheet is available on the Analog Devices website located at www.analog.com/clocks. DEVICE DESCRIPTION The AD9, AD9, and AD9 clock ICs provide multioutput clock distribution in a design that emphasizes low jitter and phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements also benefit from these parts. The AD9 offers three independent clock outputs, selectable as either LVDS or CMOS levels. The AD9 provides three outputs, two of which are LVPECL outputs, while the third can be set to either LVDS or CMOS. The AD9 offers two independent clock outputs, one as LVPECL, the other is selectable as either LVDS or CMOS levels. The LVPECL outputs operate to. GHz, the LVDS outputs operate to 00 MHz, and the CMOS outputs operate to 0 MHz. Each output has a programmable divider, which can be set to divide by a selected set of integers ranging from to. The phase of one clock output relative to another clock output is set by means of a divider phase select function that serves as a coarse timing adjustment. The LVDS/CMOS outputs feature a delay element with three selectable full-scale delay values (. ns,.0 ns, and. ns), each with steps of fine adjustment. The AD9/AD9/AD9 clock ICs do not require an external controller for operation or setup. These devices are programmed by means of pins (S0 to S0) using -level logic. The required logic levels are provided by the parts. EVALUATION BOARD DIGITAL PICTURE Figure. 0-00 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 90, Norwood, MA 00-90, U.S.A. Tel:.9.00 www.analog.com Fax:.. 00 Analog Devices, Inc. All rights reserved.
AD9/PCB, AD9/PCB, AD9/PCB TABLE OF CONTENTS Evaluation Board Description... Device Description... Evaluation Board Digital Picture... Revision History... Setting up the Evaluation Board... Hardware... Software... Configuring the Board... Inputs... Outputs... Schematics... Ordering Information... Ordering Guide... ESD Caution... Programming the Board... REVISION HISTORY /0 Revision 0: Initial Version Rev. 0 Page of
AD9/PCB, AD9/PCB, AD9/PCB SETTING UP THE EVALUATION BOARD HARDWARE The AD9/AD9/AD9 evaluation board requires a. V power supply. Some form of input clock must be provided, usually from a signal generator. A high speed oscilloscope is helpful in order to see the waveforms present at the clock outputs. SOFTWARE No software is required to program the AD9/AD9/AD9. All of the programming of the part is provided by the headers and shunts on the evaluation board itself (see the Programming the Board section). PROGRAMMING THE BOARD The digital logic on the AD9/AD9/AD9 is completely combinational and controlled by the pins labeled S0 to S0. Each of these pins must be set to one of four voltage levels (four-state logic). A set of four-position headers is provided to allow for programming the part using removable shunts. Four-State Digital Logic Table shows the four-state digital logic inputs and their logic levels and voltages. Table. Four-State Digital Logic Voltage Settings Logic Input Voltage Description. V Tie pin to. ⅔ ⅔ () Internally generated voltage reference provided at Pin. Can drive up to all of the logic inputs. Do not use for other purposes. ⅓ N/C ⅓ () Internal self-bias of pin. Leave pin as no connect. 0 0 V Tie pin to ground. The ⅔ () voltage is set by connecting the input to the pin on the chip. The ⅓ () voltage is obtained by not driving the input pin at all, thus allowing it to self-bias. To program the AD9/AD9/AD9 evaluation board, first determine the logic levels/voltages that should be applied to the digital inputs. A programming reference appears in the data sheet. Set each of the programming pins (S0 to S0) to the appropriate logic level by attaching a shunt to the proper position on each of the four-position headers. To the left of the row of headers, a label indicates the logic level of each row of pins. To the right of the row of headers, a corresponding label indicates the voltage level of each row of pins. Note that the row corresponding to a logic level of ⅓ shows that the connection is N/C. When the ⅓ logic level is needed, the shunt should be placed on the pins, but there is no connection to the device pin for this logic level. To program the AD9 to have all outputs on in LVDS mode, for example, the S and S programming pins must be set to ⅓ (). On the AD9/AD9/AD9 evaluation board, locate the -position headers that correspond to digital inputs S and S. Then, referring to the label to the left side of the row of headers, attach the shunts across the pins corresponding to the marking for logic level ⅓. Note that the label to the right of the row of headers indicates that this is an N/C as far as voltage is concerned. Rev. 0 Page of
AD9/PCB, AD9/PCB, AD9/PCB CONFIGURING THE BOARD INPUTS Clock Input The input clock is configured to receive a single-ended signal from bench hardware and convert it to a differential signal at the part. This is done by a balun, terminated with a 0 Ω resistor, followed by coupling capacitors on both the true and complimentary inputs of the part. SYNCB Circuit The SYNCB input allows a sync pulse to be produced without requiring external circuitry. The evaluation board is populated with both a momentary switch and an SMA connector labeled SYNCB. To create a SYNCB signal, depress the momentary switch. To release the SYNCB signal, release the momentary switch. An external SYNCB signal can also be applied to the evaluation board through a cable connected to the SMA connector labeled SYNCB. OUTPUTS AD9 The AD9 has three LVDS/CMOS outputs. These outputs are all terminated with a 00 Ω resistor on the evaluation board with the assumption that LVDS is selected. To use CMOS outputs, this 00 Ω resistor should be removed. AD9 The AD9 has two LVPECL output and one LVDS/CMOS outputs. OUT0 and OUT are both LVPECL. Each LVPECL output is terminated with a 00 Ω resistor to ground, followed by an ac coupling capacitor. There are pads for an alternate termination scheme on the evaluation board. This alternate scheme creates a Thevenin equivalent 0 Ω termination to V. This scheme is utilized by removing the 00 Ω resistors to ground, replacing the ac coupling cap with a 0 Ω resistor and adding the appropriate termination resistors. These resistors attach to the pads located near the SMA connectors. The LVDS/CMOS output (OUT) is terminated with a 00 Ω resistor on the evaluation board with the assumption that LVDS is selected. To use CMOS outputs, this 00 Ω resistor should be removed. AD9 The AD9 has the same default termination scheme and options as the AD9. The only difference is that the AD9 has only one LVPECL output, and one LVDS/CMOS output. Rev. 0 Page of
AD9/PCB, AD9/PCB, AD9/PCB SCHEMATICS C 9 0 0 9 T J J C C S C C C NF C C U C 0 9 C9 C0 C C C C J J J J C C C C C0 C C C C Figure. AD9/AD9/AD9 Evaluation Board Schematic, Page 0-00 Rev. 0 Page of
AD9/PCB, AD9/PCB, AD9/PCB 0-00 S0 S S0 S S S S S S S S9 Figure. AD9/AD9/AD9 Evaluation Board Schematic, Page Rev. 0 Page of
AD9/PCB, AD9/PCB, AD9/PCB ORDERING INFORMATION ORDERING GUIDE Model AD9/PCB AD9/PCB AD9/PCB Description Evaluation Board Evaluation Board Evaluation Board ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 Page of
AD9/PCB, AD9/PCB, AD9/PCB NOTES 00 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. EB0-0-/0(0) Rev. 0 Page of