TL026C DIFFERENTIAL HIGH-FREQUENCY AMPLIFIER WITH AGC



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TL026C DIFFERENTIAL HIGH-FREQUENCY AMPLIFIER WITH AGC Low Output Common-Mode Sensitivity to AGC Voltages Input and Output Impedances Independent of AGC Voltage Peak Gain... 38 db Typ Wide AGC Range... 50 db Typ 3-dB Bandwidth... 50 MHz Other Characteristics Similar to NE592 and ua733 SLFS007A JUNE 1985 REVISED JULY 1990 1 description 4 IN OUT 8 5 IN OUT This device is a monolithic two-stage highfrequency amplifier with differential inputs and outputs. Internal feedback provides wide bandwidth, low phase distortion, and excellent gain stability. Variable gain based on signal summation provides large AGC control over a wide bandwidth with low harmonic distortion. Emitter-follower outputs enable the device to drive capacitive loads. All stages are current-source biased to obtain high common-mode and supply-voltage rejection ratios. The gain may be electronically attenuated by applying a control voltage to the AGC pin. No external compensation components are required. This device is particularly useful in TV and radio IF and RF AGC circuits, as well as magnetic-tape and disk-file systems where AGC is needed. Other applications include video and pulse amplifiers where a large AGC range, wide bandwidth, low phase shift, and excellent gain stability are required. The TL026C is characterized for operation from 0 C to 70 C. absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, V CC (see Note 1)............................................................ 8 V Supply voltage, V CC (see Note 1).......................................................... 8 V Differential input voltage.................................................................... ± 5 V Common-mode input voltage................................................................ ± 6 V Output current.......................................................................... ±10 ma Continuous total dissipation........................................... See Dissipation Rating Table Operating free-air temperature range.................................................. 0 C to 70 C Storage temperature range....................................................... 65 C to 150 C Lead temperature range 1,6 mm (1/16 inch) from case for 10 seconds.......................... 260 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond those indicated in the recommended operating conditions section of this specification is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltages are with respect to the midpoint of VCC and VCC except differential input and output voltages. PACKAGE DISSIPATION RATING TABLE TA 25 C POWER RATING symbol AGC OPERATING FACTOR ABOVE TA = 25 C IN AGC V CC OUT D OR P PACKAGE (TOP VIEW) TA = 70 C POWER RATING D 725 mw 5.8 mw/ C 464 mw P 1000 mw 8.0 mw/ C 640 mw 2 1 2 3 4 8 7 6 5 IN REF OUT V CC OUT 7 REF OUT PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 1990, Texas Instruments Incorporated POST OFFICE BOX 655303 DALLAS, TEXAS 75265 1

TL026C DIFFERENTIAL HIGH-FREQUENCY AMPLIFIER WITH AGC SLFS007A JUNE 1985 REVISED JULY 1990 recommended operating conditions MIN NOM MAX UNIT Supply voltage, VCC 3 6 8 V Supply voltage, VCC 3 6 8 V Operating free-air temperature range, TA 0 70 C electrical characteristics at 25 C operating free-air temperature, V CC = ±6 V, V AGC = 0, REF OUT pin open (unless otherwise specified) AVD PARAMETER FIGURE TEST CONDITIONS MIN TYP MAX UNIT Large-signal differential voltage amplification AVD Change in voltage amplification 1 1 VO(PP) = 3 V, RL = 2 kω 65 85 105 V/V VIPP = 28.5 mv, RL = 2 kω, VAGC Vref = ±180 mv 50 db Vref Voltage at REF OUT Iref = 1 ma to 100 µa 1.3 1.5 V BW Bandwidth ( 3 db) 2 VO(PP) = 1 V, VAGC Vref = ±180 mv 50 MHz IIO Input offset current 0.4 5 µa IIB Input bias current 10 30 µa VICR Common-mode input voltage range 3 ±1 V VOC Common-mode output voltage 1 RL = 3.25 3.75 4.25 V VOC Change in common-mode output voltage 1 VAGC = 0 to 2 V, RL = 300 mv VOO Output offset voltage 1 VID = 0, RL = 0.75 V VO(PP) Maximum peak-to-peak output voltage swing 1 RL = 2 kω 3 4 V ri Input resistance at AGC, IN, or IN 10 30 kω ro Output resistance 20 Ω CMRR Common-mode mode rejection ratio 3 ksvr Supply voltage rejection ratio ( VCC / VIO) 4 VIC = ±1 V, f = 100 khz 60 86 VIC = ±1 V, f = 5 mhz 60 VCC = ± 0.5 V, VCC = ± 0.5 V db 50 70 db Vn Broadband equivalent noise voltage 4 BW = 1 khz to 10 MHz 12 µv tpd Propagation delay time 2 VO = 1 V 6 10 ns tr Rise time 2 VO = 1 V 4.5 12 ns Isink(max) Maximum output sink current VID = 1 V, VO = 3 V 3 4 ma ICC Supply current No load, No signal 22 27 ma 2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TL026C DIFFERENTIAL HIGH-FREQUENCY AMPLIFIER WITH AGC SLFS007A JUNE 1985 REVISED JULY 1990 electrical characteristics over recommended operating free-air temperature range, V CC± = ±6 V, V AGC = 0, REF OUT pin open (unless otherwise specified) PARAMETER FIGURE TEST CONDITIONS MIN TYP MAX UNIT AVD Large-signal differential voltage amplification 1 VO(PP) = 3 V, RL = 2 kω 55 115 V/V IIO Input offset current 6 µa IIB Input bias current 40 µa VICR Common-mode input voltage range 3 ±1 V VOO Output offset voltage 1 VID = 0, RL = 1.5 V VO(PP) Maximum peak-to-peak output voltage swing 1 RL = 2 kω 2.8 V ri Input resistance at AGC, IN, or IN 8 kω CMRR Common-mode rejection ratio 3 VIC = ±1 V, f = 100 khz 50 db ksvr Supply voltage rejection ratio ( VCC / VIO) 4 VCC = ± 0.5 V, VCC = ± 0.5 V 50 db Isink(max) Maximum output sink current VID = 1 V, VO = 3 V 2.8 4 ma ICC Supply current 1 No load, No signal 30 ma PARAMETER MEASUREMENT INFORMATION AGC REF OUT VAGC Vref 0.2 µf IN OUT VO IN VID VOD RL OUT VID 0.2 µf VO 50 Ω 50 Ω V OC V O V O 2 50 Ω 50 Ω 1 kω 1 kω Figure 1. Test Circuit Figure 2. Test Circuit 50 Ω 0.2 µf VO VIC 50 Ω 0.2 µf 1 kω 1 kω VO VOD RL = 2 kω Figure 3. Test Circuit Figure 4. Test Circuit POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3

TL026C DIFFERENTIAL HIGH-FREQUENCY AMPLIFIER WITH AGC SLFS007A JUNE 1985 REVISED JULY 1990 TYPICAL CHARACTERISTICS Differential Voltage Amplification V/ V VD A 100 90 80 70 60 50 40 30 20 10 DIFFERENTIAL VOLTAGE AMPLIFICATION vs DIFFERENTIAL GAIN-CONTROL VOLTAGE TA = 25 C TA = 70 C VCC = 6 V VCC = 6 V TA = 0 C 0 200 100 0 100 200 VAGC Vref Differential Gain-Control Voltage mv Figure 5 4 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TL026C DIFFERENTIAL HIGH-FREQUENCY AMPLIFIER WITH AGC APPLICATION INFORMATION SLFS007A JUNE 1985 REVISED JULY 1990 gain characteristics Figure 5 shows the differential voltage amplification versus the differential gain-control voltage (V AGC V ref ). V AGC is the absolute voltage applied to the A GC input and V ref is the dc voltage at the REF OUT output. As V AGC increases with respect to V ref, the TL026C gain changes from maximum to minimum. As shown in Figure 5 for example, V AGC would have to vary from approximately 180 mv less than V ref to approximately 180 mv greater than V ref to change the gain from maximum to minimum. The total signal change in V AGC is defined by the following equation. V AGC = V ref 180 mv (V ref 180 mv) V AGC = 360 mv However, because V AGC varies as the ac AGC signal varies and also differentially around V ref, then V AGC should have an ac signal component and a dc component. To preserve the dc and thermal tracking of the device, this dc voltage must be generated from V ref. To apply proper bias to the AGC input, the external circuit used to generate V AGC must combine these two voltages. Figures 6 and 7 show two circuits that will perform this operation and are easy to implement. The circuits use a standard dual operational amplifier for AGC feedback. By providing rectification and the required feedback gain, these circuits are also complete AGC systems. circuit operation Amplifier A1 amplifies and inverts the rectified and filtered AGC signal voltage V C producing output voltage V1. Amplifier A2 is a differential amplifier that inverts V1 again and adds the scaled V ref voltage. This conditioning makes V AGC the sum of the signal plus the scaled V ref. As the signal voltage increases, V AGC increases and the gain of the TL026C is reduced. This maintains a constant output level. feedback circuit equations Following the AGC input signal (Figures 6 and 7) from the OUT output through the feedback amplifiers to the AGC input produces the following equations: 1. AC ouput to diode D1, assuming sinusoidal signals V O = V OP (sin (wt)) where: V OP = peak voltage of V O (1) (2) 2. Diode D1 and capacitor C1 output V C = V OP V F where: VF = forward voltage drop of D1 V C = voltage across capacitor C1 3. A1 output V1 R2 R1 V C 4. A2 output (R3 = R4) V AGC R2 R1 V C 2 R6 R5 R6 V ref (3) (4) (5) POST OFFICE BOX 655303 DALLAS, TEXAS 75265 5

TL026C DIFFERENTIAL HIGH-FREQUENCY AMPLIFIER WITH AGC SLFS007A JUNE 1985 REVISED JULY 1990 APPLICATION INFORMATION Amplifier A2 inverts V1 producing a positive AGC signal voltage. Therefore, the input voltage to the TL026C AGC pin consists of an AGC signal equal to: R2 R1 V C (6) and a dc voltage derived from V ref, defined as the quiescent value of V AGC. V AGC (q) 2 R6 R5 R6 V ref (7) For the initial resistor calculations, V ref is assumed to be typically 1.4 V making quiescent V AGC approximately 1.22 V (V AGC (q) = V ref 180 mv). This voltage allows the TL026C to operate at maximum gain under no-signal and low-signal conditions. In addition, with V ref used as both internal and external reference, its variation from device to device automatically adjusts the overall bias and makes AGC operation essentially independent of the absolute value of V ref. The resistor divider needs to be calculated only once and is valid for the full tolerance of V ref. output voltage limits (see Figures 6 and 7) The output voltage level desired must fall within the following limits: 1. Because the data sheet minimum output swing is 3 V peak-to-peak using a 2-kΩ load resistor, the user-selected design limit for the peak output swing should not exceed 1.5 V. 2. The voltage drop of the rectifying diode determines the lower voltage limit. When a silicon diode is used, this voltage is approximately 0.7 V. The output voltage V O must have sufficient amplitude to exceed the rectifying diode drop. Aschottky diode can be used to reduce the V O level required. gain calculations for a peak output voltage of 1 V A peak output voltage of 1 V was chosen for gain calculations because it is approximately midway between the limits of conditions 1 and 2 in the preceding paragraph. Using equation 3 (V C = V OP V d ), V C is calculated as follows: V C = 1 V 0.7 V V C = 0.3 V Therefore, the gain of A1 must produce a voltage V1 that is equal to or greater than the total change in V AGC for maximum TL026C gain change. With a total change in V AGC of 360 mv and using equation 4, the calculation is as follows: V1 V C V AGC V C R2 R1 0.36 0.3 1.2 If R1 is 10 kω, R2 is 1.2 time R1 or 12 kω. Since the output voltage for this circuit must be between 0.85 V and 1.3 V, the component values in Figures 6 and 7 provide a nominal 1-V peak output limit. This limit is the best choice to allow for temperature variations of the diode and minimum output voltage specification. 6 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

TL026C DIFFERENTIAL HIGH-FREQUENCY AMPLIFIER WITH AGC APPLICATION INFORMATION SLFS007A JUNE 1985 REVISED JULY 1990 The circuit values in Figures 6 and 7 will produce the best results in this general application. Because of rectification and device input constraints, the circuit in Figure 6 will not provide attenuation and has about 32 db of control range. The circuit shown in Figure 7 will have approximately 25% variation in the peak output voltage limit due to the variation in gain of the TL592 device to device. In addition, if a lower output voltage is desired, the output of the TL026C can be used for approximately 40 mv of controlled signal. considerations for the use of the TL026C To obtain the most reliable results, RF breadboarding techniques must be used. A groundplane board should be used and power supplies should be bypassed with 0.1-µF capacitors. Input leads and output leads should be as short as possible and separated from each other. A peak input voltage greater than 200 mv will begin to saturate the input stages of the TL026C and, while the circuit is in the AGC mode, the output signal may become distorted. To observe the output signal of TL026C or TL592, low-capacitance FET probes or the output voltage divider technique shown in Figure 6 should be used. VI 50 Ω 10 kω VAGC TL026C IN IN 50 Ω AGC 10 kω A2 REF OUT 30 kω 0.1 µf OUT OUT V1 0.1 µf 12 kω A1 1/2 TL082 10 kω 1N914 D1 0.1 µf 1.8 kω 200 Ω Vout To Scope Monitor 1/2 TL082 20 kω NOTE: VCC = 6 V and VCC = 6 V for TL026C and amplifiers A1 and A2. Figure 6. Typical Application Circuit With No Attenuation POST OFFICE BOX 655303 DALLAS, TEXAS 75265 7

TL026C DIFFERENTIAL HIGH-FREQUENCY AMPLIFIER WITH AGC SLFS007A JUNE 1985 REVISED JULY 1990 APPLICATION INFORMATION 1N914 R1 R2 R3 R4 10 kω 12 kω 10 kω 10 kω 0.1 µf 1/2 TL082 A1 R5 1/2 TL082 A2 VAGC 30 kω R6 20 kω 510 Ω REF OUT VOUT VOUT To Scope Monitor 1.8 kω 200 Ω 0.1 µf 0.1 µf X20 Gain TL592 2 kω 0.1 µf 2 kω OUT OUT TL026C IN IN AGC 50 Ω 50 Ω VI NOTE: VCC = 6 V and VCC = 6 V for TL026C and amplifiers A1 and A2. Figure 7. Typical Application Circuit With Attenuation 8 POST OFFICE BOX 655303 DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan TL026CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) TL026CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) TL026CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) TL026CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) TL026CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) TL026CPSR ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) (2) Lead/Ball Finish (6) MSL Peak Temp TL026ID OBSOLETE SOIC D 8 TBD Call TI Call TI (3) Op Temp ( C) CU NIPDAU Level-2-260C-1 YEAR 0 to 70 TL026C CU NIPDAU Level-2-260C-1 YEAR 0 to 70 TL026C CU NIPDAU Level-2-260C-1 YEAR 0 to 70 TL026C CU NIPDAU N / A for Pkg Type 0 to 70 TL026CP CU NIPDAU N / A for Pkg Type 0 to 70 TL026CP CU NIPDAU Level-1-260C-UNLIM 0 to 70 T026 Device Marking (4/5) Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant TL026CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL026CPSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TL026CDR SOIC D 8 2500 340.5 338.1 20.6 TL026CPSR SO PS 8 2000 367.0 367.0 38.0 Pack Materials-Page 2

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