SG1731/SG2731/SG3731. Description. Features. High Reliability Features. Block Diagram DC MOTOR PULSE WIDTH MODULATOR



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DC MOTOR PULSE WIDTH MODULATOR SG1731/SG2731/SG3731 Description The SG1731 is a pulse width modulator circuit designed specifically for DC motor control. It provides a bi-directional pulse train output in response to the magnitude and polarity of an analog error signal input. The device is useful as the control element in motor-driven servo systems for precision positioning and speed control, as well as in audio modulators and amplifiers using carrier frequencies to 350 khz. The circuit contains a triangle waveform oscillator, a wideband operational amplifier for error voltage generation, a summing/ scaling network for level-shifting the triangle waveform, externally programmable PWM comparators and dual ±100 ma, ±22 totem pole drivers with commutation diodes for full bridge output. A SHUTDOWN terminal forces the drivers into a floating highimpedance state when driven LOW. Supply voltage to the control circuitry and to the output drivers may be from either dual positive and negative supplies, or single-ended. Features ±3.5 to ±15 Control Supply ±2.5 to ±22 Driver Supply Dual 100 ma Source/Sink Output Drivers 5 khz to 350 khz Oscillator Range High Slew Rate Error Amplifier Adjustable Deadband Operation Digital SHUTDOWN Input High Reliability Features Available to MIL-STD-883 Available to DSCC Standard Microcircuit Drawing (SMD) MSC-AMS level S Processing Available Block Diagram 500 Figure 1 Block Diagram May 2015 Rev. 1.4 www.microsemi.com 1 2015 Microsemi Corporation

Absolute Maximum Ratings (Note 1) Supply oltage (± S )... ±18 Analog Inputs... ± S Digital Inputs (SHUTDOWN)... - S -0.3 to - S +18 Output Driver Supply oltage (± O )... ±25 Source/Sink Output Current (continuous)... 200 ma Source/Sink Output Current (peak, 500 ns)... 400 ma Note 1. alues beyond which damage may occur. Extended operation at the maximum levels may degrade performance and affect reliability. Thermal Data J Package: Thermal Resistance-Junction to Case, θ JC... 30 C/W Thermal Resistance-Junction to Ambient, θ JA... 80 C/W N Package: Thermal Resistance-Junction to Case, θ JC... 40 C/W Thermal Resistance-Junction to Ambient, θ JA... 65 C/W L Package: Thermal Resistance-Junction to Case, θ JC... 35 C/W Thermal Resistance-Junction to Ambient, θ JA... 120 C/W Output Driver Diode Current (continuous)... 200 ma Output Driver Diode Current (peak, 500 ns)... 400 ma Operating Junction Temperature Hermetic (J - Package)... 150 C Plastic (N - Package)... 150 C Storage Temperature Range... -65 C to 150 C Lead Temperature (Soldering, 10 Seconds)... 300 C RoHS Peak Package Solder Reflow Temp.(40 sec. max. exp.)... 260 C (+0, -5) Note A. Junction Temperature Calculation: T J = T A + (P D x θ JA ). Note B. The above numbers for θ JC are maximums for the limiting thermal resistance of the package in a standard mounting configuration. The θ JA numbers are meant to be guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow. Recommended Operating Conditions (Note 2) Supply oltage Range (± S )... ±3.5 to ±15 Error Amp Common-Mode Range... - S + 3 to S - 3 Output Driver Supply oltage Range... ±2.5 to ±22 Source/Sink Output Current (continuous)... 100 ma Source/Sink Output Current (peak, 500 ns)... 200 ma Output Driver Diode Current (continuous)... 100 ma Output Driver Diode Current (peak, 500 ns)... 200 ma Note 2. Range over which the device is functional and parameter limits are guaranteed. Electrical Characteristics Oscillator Frequency Range... 10 Hz to 350 khz Oscillator oltage (Peak-to-Peak)...1 to 10 Oscillator Timing Capacitor (C T )... 200 pf to 2.5 µf Operating Ambient Temperature Range SG1731... SG2731... -25 C to 85 C SG3731... 0 C to 70 C (Unless otherwise specified, these specfiications apply over the operating ambient temperatures for SG1731 with -55 C T A 125 C, SG2731 with -25 C T A 85 C, SG3731 with 0 C T A 70 C, S = ±15, and O = ±22. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.) Oscillator Section C T Charging Current Parameter 2 ± Input Bias Current Initial Oscillator Frequency Temperature Stability (Note 3) Error Amplifier Section (Note 5) Input Offset oltage Input Bias Current Input Offset Current Open Loop oltage Gain Output oltage Swing Common-Mode Rejection Ratio Slew Rate (Notes 3 and 4) Unity Gain Bandwidth (Notes 3 and 4) PWM Comparators Test Conditions T A = 25 C T A = T MIN to T MAX CM = ±5 C T = 1000 pf, 2 ± = ±5,T A = 25 C C T = 1000 pf, 2 ± = ±5 R L = 2 kω R L = 2 kω T A = 25 C T A = 25 C SG1731/2731/3731 Min. Typ. Max. Input Bias Current ± T = ±3 6 450 400 22.5 70 ±10 70 5 0.7 500 25.0 10 1 550 600-20 27.5 10 10 3 600 Units khz % m na db db /µs MHz 2

Electrical Characteristics (Continued) Parameter SHUTDOWN Section Logic Threshold SHUTDOWN HIGH Current SHUTDOWN LOW Current Output Drivers (Each Output) HIGH Output oltage LOW Output oltage Driver Risetime Driver Falltime Total Supply Current S Supply Current O Supply Current - S = -3.5 to -15 SHUTDOWN = - S +2.4 SHUTDOWN = - S I SOURCE = 20 ma I SOURCE = 100 ma I SINK = 20 ma I SINK = 100 ma C L = 1000 pf = 1000 pf C L SHUTDOWN = - S + 0.8 SHUTDOWN = - S + 0.8 Test Conditions SG1731/2731/3731 Min. Typ. Max. S +0.8 19.2 19.0 S +2.0 400-1.0-19.2-19.0 300 300 14 6 Units ma ns ns ma ma Note 3. These parameters, although guaranteed, are not tested in production. Note 4. Unity Gain Inverting 10 kω Feedback Resistance. Application Information SUPPLY OLTAGE The SG1731 requires a supply voltage for the control circuitry ( S ) and for the power output drivers ( O ). Each supply may be either balanced positive and negative with respect to ground, or single-ended. The only restrictions are: 1. The voltage between + S and - S must be at least 7.0 ; but no more than 44. 2. The voltage between + O and - O must be at least 5.0 ; but no more than 44. 3. + O must be at least 5 more positive than - S. This eliminates the combination of a single-ended positive control supply with a single-ended negative driver supply. Note 5. CM = ±12. As a design aid, the solutions to Equation 1 over the recommended range of T OSC and OSC are given in graphic form in Figure 1. The lower limit on T OSC is 1.85 µs, corresponding to a maximum frequency of 350 khz. The maximum value of OSC, (2 +) - (2 -), is 10 peak-to-peak for linear waveforms. SUBSTRATE CONNECTION The substrate connection (Pin 10) must always be connected to either - S or - O, whichever is more negative. The substrate must also be well bypassed to ground with a high quality capacitor. OSCILLATOR The triangle oscillator consists of two voltage comparators, a set/reset flip-flop, a bi-directional 500 current source, and an external timing capacitor C T. A positive reference voltage (2 +) applied to Pin 2 determines the positive peak value of the triangle, and a negative reference voltage (2 -) at Pin 7 sets the negative peak value of the triangle waveform. Since the value of the internal current source is fixed at a nominal ±500, the oscillator period is a function of the selected peak-to-peak voltage excursion and the value of C T. The theoretical expression for the oscillator period is: T OSC = 2C T d (Eq.1) 5 x 10-4 where C T is the timing capacitor in Farads and d is OSC in olts peak-to-peak. Figure 2 SG1731 Oscillator Period S. OSC and C T ERROR AMPLIFIER The error amplifier of the SG1731 is a conventional internallycompensated operational amplifier with low output impedance. All of the usual feedback and frequency compensation techniques may be use to control the closed-loop gain characteristics. The control supply voltage ± S will determine the input common mode range and output voltage swing; both will extend to within 3 of the S supply. PULSE WIDTH MODULATION 1 ms 2 ms 5 ms 10 ms 20 ms Pulse width modulation occurs by comparing the triangle waveform to a fixed upper (+ T ) and lower (- T ) threshold voltage. A crossing above the upper threshold causes Output A to switch to the HIGH state, and a crossing below 3

Application Information (Continued) the lower threshold causes Output B to switch to the HIGH state. If ± S is less than ±8 then ± T can be obtained with resistors from ± S. If ± S is greater than ±8 use zeners. Threshold crossings are generated by shifting the triangle waveform up and down with the error voltage (Pin 5). A positive error voltage will result in a pulse width modulated output at Driver A (Pin 13). Similarly, a negative error voltage produces a pulse train at Driver B (Pin 12). Figure 2 illustrates this process for the case where + is greater than T. It is important to note that the triangle shifting circuit also attenuates the waveform seen at C T by a factor of 2. This results in a waveform at the PWM comparators with a positive peak of + and a negative peak of -, and must be taken into account when selecting the values for + T and - T. Figure 3 - Pulse Width Modulation with No Deadband Application Circuits +15 +22 9 15 22 +10 Figure 4 In this simple battery-powered position servo, the control supply and driver supply are both single-ended positive with respect to ground. Figure 5 A high torque position servo is obtained by buffering the output drivers to obtain higher output current. 10 4

Application Circuits (Continued) +15 +10 200 pf +22 +40 15 10 22 22 Figure 6 Bi-directional speed control results when the feedback voltage transducer is a tachometer. Figure 7 The two-quadrant transfer function of the SG1731 is ideal for pulse width modulated audio power amplifiers. Connection Diagrams & Ordering Information (See Notes Below) Package Part No. Ambient Temperature Range Connection Diagram 16-PIN CERAMIC DIP J - PACKAGE 16-PIN PLASTIC DIP N - PACKAGE SG1731J- 883B SG1731J-DESC SG1731J SG2731N -25 C to 85 C SG3731N 0 C to 70 C + T 1 16 + S 2 + 2 15 SHUTDOWN N. I. INPUT 3 14 + O IN. INPUT 4 13 OUTPUT A ERROR C T 2-5 6 7 12 11 10 OUTPUT B - O SUBSTRATE - T 8 9 - S N Package: RoHS Compliant / Pb-free Transition DC: 0503 N Package: RoHS / Pb-free 100% Matte Tin Lead Finish 20-PIN CERAMIC LEADLESS CHIP CARRIER L- PACKAGE SG1731L SG1731L- 883B 1 NC 2 +T 3 2Δ+ 4 N. I. INPUT 5 IN. INPUT 6 NC 7 ERROR 8 CT 9 2Δ- 10 -T 4 5 6 7 8 3 2 1 20 19 9 10 11 12 13 18 17 16 15 14 11 NC 12 -S 13 SUBSTRATE 14 -O 15 OUTPUT B 16 NC 17 OUTPUT A 18 +O 19 SHUTDOWN 20 +S Note 1. All packages are viewed from the top. Note 2. Contact factory for leadless chip carrier availability. Note 3. Hermetic Packages J, L use Sn63/Pb37 hot solder lead finish, Contact factory for availability of RoHS versions. 5

Package Outline Dimensions Controlling dimensions are in inches, metric equivalents are shown for general information. DIM MILLIMETERS INCHES MIN MAX MIN MAX A - 5.08-0.200 D b 0.38 0.51 0.015 0.020 b2 1.04 1.65 0.045 0.065 16 9 c 0.20 0.38 0.008 0.015 E 1 8 b2 ea D 19.30 19.94 0.760 0.785 E 5.59 7.11 0.220 0.280 e 2.54 BSC 0.100 BSC ea 7.37 7.87 0.290 0.310 Seating Plane H e b Q A L c θ H 0.63 1.78 0.025 0.070 L 3.18 5.08 0.125 0.200 α - 15-15 Q 0.51 1.02 0.020 0.040 Note: Dimensions do not include protrusions; these shall not exceed 0.155mm (.006 ) on any side. Lead dimension shall not include solder coverage. Figure 8 J 16-Pin Ceramic Dual Inline Package Dimensions DIM MILLIMETERS INCHES MIN MAX MIN MAX D A - 5.33-0.210 A1 0.38-0.015 - A2 3.30 Typ. 0.130 Typ. E1 b 0.36 0.56 0.014 0.022 1 b1 1.14 1.78 0.045 0.070 b1 c 0.20 0.36 0.008 0.014 E D 18.67 19.69 0.735 0.775 A2 e b SEATING PLANE A A1 L θ c e 2.54 BSC 0.100 BSC E 7.62 8.26 0.300 0.325 E1 6.10 7.11 0.240 0.280 L 2.92 0.381 0.115 0.150 θ - 15-15 Note: Dimensions do not include protrusions; these shall not exceed 0.155mm (.006 ) on any side. Lead dimension shall not include solder coverage. Figure 9 N 16-Pin Plastic Dual Inline Package Dimensions 6

Package Outline Dimensions (Continued) E3 A A1 3 L2 D 8 E L DIM MILLIMETERS INCHES MIN MAX MIN MAX D/E 8.64 9.14 0.340 0.360 E3-8.128-0.320 e 1.270 BSC 0.050 BSC B1 0.635 TYP 0.025 TYP L 1.02 1.52 0.040 0.060 A 1.626 2.286 0.064 0.090 h 1.016 TYP 0.040 TYP A1 1.372 1.68 0.054 0.066 A2-1.168-0.046 L2 1.91 2.41 0.075 0.95 B3 0.203R 0.008R A2 h 1 18 B1 e B3 13 Note: All exposed metalized area shall be gold plated 60 micro-inch minimum thickness over nickel plated unless otherwise specified in purchase order. Figure 10 L 20-Pin Ceramic LCC Package Outline Dimensions 7

Microsemi Corporate Headquarters One Enterprise, Aliso iejo, CA 92656 USA Within the USA: +1 (800) 713-4113 Outside the USA: +1 (949) 380-6100 Sales: +1 (949) 380-6136 Fax: +1 (949) 215-4996 E-mail: sales.support@microsemi.com 2015 Microsemi Corporation. All rights reserved. Microsemi and the Microsemi logo are trademarks of Microsemi Corporation. All other trademarks and service marks are the property of their respective owners. Microsemi Corporation (Nasdaq: MSCC) offers a comprehensive portfolio of semiconductor and system solutions for communications, defense & security, aerospace and industrial markets. Products include high-performance and radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices and precise time solutions, setting the world s standard for time; voice processing devices; RF solutions; discrete components; security technologies and scalable anti-tamper products; Power-over-Ethernet ICs and midspans; as well as custom design capabilities and services. Microsemi is headquartered in Aliso iejo, Calif., and has approximately 3,400 employees globally. Learn more at www.microsemi.com. Microsemi makes no warranty, representation, or guarantee regarding the information contained herein or the suitability of its products and services for any particular purpose, nor does Microsemi assume any liability whatsoever arising out of the application or use of any product or circuit. The products sold hereunder and any other products sold by Microsemi have been subject to limited testing and should not be used in conjunction with mission-critical equipment or applications. Any performance specifications are believed to be reliable but are not verified, and Buyer must conduct and complete all performance and other testing of the products, alone and together with, or installed in, any end-products. Buyer shall not rely on any data and performance specifications or parameters provided by Microsemi. It is the Buyer's responsibility to independently determine suitability of any products and to test and verify the same. The information provided by Microsemi hereunder is provided "as is, where is" and with all faults, and the entire risk associated with such information is entirely with the Buyer. Microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other IP rights, whether with regard to such information itself or anything described by such information. Information provided in this document is proprietary to Microsemi, and Microsemi reserves the right to make any changes to the information in this document or to any products and services at any time without notice. SG1731-1.4/05.15